Beruflich Dokumente
Kultur Dokumente
Chapter 20
Polyphase FIR Filter
Implementation
for Communication Systems
M 1 k
1
y( m ) x( mM ) x ( n) ( n mM )
1 j 2
x(n)e
n
x ( n) M
m M M k 1
Folding term
ESIEE, Slide 4 Copyright © 2003 Texas Instruments. All rights reserved.
Downsampling 2 of 2
Anti-aliasing Filter
fc : (Fe/M)/2
x(n) H(z) M y(m)
Fe Fe/M
H(zM) M M H(z)
Y (z) y( n) z
n
n
x( m ) z
m
L m
X zL
fC : (Fe/L)/2
x(m) L H(z) y(n)
Fe LFe
mM 1
H z h( n ) z n
n0
Let n=lM+k
M 1 N / M 1
H z z Ek z
k M with E k z hlM k z l
k 0 l 0
E0(zM)
z-1
E1(zM) MTe Time
z-1
• M-1 filter evaluation over M
Fe Fe/M
ESIEE, Slide 9 Copyright © 2003 Texas Instruments. All rights reserved.
Polyphase Implementation of FIR Filters
Decimation Case 3 of 4
Using noble identity
z-1
M EM-1(z)
MTe Time
Fe Fe/M
• No more useless computations, but one sampling period over M, CPU is
burdned with N MAC/s.
E1(z)
N/M
EM-1(z)
MTe Time
Fe Fe/M
• Commutator runs at Fe,. At each input sample only one component is computed and accu-
mulated with the result of the previous one. The result is output when the last component
is reached and accumulator is reset. This spreads the processing load over MTe.
ESIEE, Slide 11 Copyright © 2003 Texas Instruments. All rights reserved.
Polyphase Implementation of FIR Filters
Interpolation Case 1 of 5
L H(z) L R(zL)
lL1
H z h( n) z n
n0
Let n=mL+L-1-k
L 1 N / L 1
H z z ( L 1 k )
Rk z L with Rk z hmL L 1 k z m
k 0 m 0
L R0(zL)
z-1
Fe LFe
ESIEE, Slide 13 Copyright © 2003 Texas Instruments. All rights reserved.
Polyphase Implementation of FIR Filters
Interpolation Case 3 of 5
Using noble identity
R1(z) L
z-1
RM-1(z) L
Fe LFe
R1(z)
N/L
RM-1(z)
Te/L Time
Fe LFe
• For each output sampling instant one polyphase component is computed.
When we reach again the first component (M-1) a new input sample is inputed
in the delay line of each polyphase component.
ESIEE, Slide 15 Copyright © 2003 Texas Instruments. All rights reserved.
Polyphase Implementation of FIR Filters
Interpolation Case 5 of 5
Linear Periodically Varying Time system
z-1 z-1
z-1 z-1
h0 hL h2L
QPSK modulator
Ak Cos() RCF DAC
fk
fk: Phase
bits computation
Bk
Sin() RCF DAC
Fb Fs Fe
Bit Symbol Sample
frequency frequency frequency
Equivalent system
16 H(z)
N / L 1
Rk z hmL L 1 k z m With N=112 and L=16
m 0
.text
_firinit:
ST #coefs2,*(adbufQ) ;pointer to current coefs pointer
STM #filbufQ,AR2 ;zeroed initial buffer condition
RPT #Lfil-1
STL A,*AR2+
RET
Bit Symbol
processing processing
ADC RCF
ADC RCF
Fe Fb Fs
E0(z)
E1(z)
EM-1(z)