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WALLACE TREE

MULTIPLIER
BY
RASHMI SINGH (219EC2160)
PANYAM MAHITHA (219EC2192)
INTRODUCTION

 Faster than simple Array Multiplier

 A Wallace tree multiplier is a parallel multiplier which uses the


carry save addition algorithm to reduce the latency.
ALGORITHM

Any multiplier has 3 stages:

1. Partial Products

2. Addition of Partial Products

3. Final Addition
STAGE 1
Products (each blue square) are the result of a
simple and gate

All products are done simultaneously


Requires a lot of Hardware (N^2 AND gates)
The main challenge lies in adding the columns
STAGE 2 - STEP1
To add up columns, add three rows at a time
The result for each set of three rows is
a set of two rows
Each resulting set of rows has a row for the sum
and a row for the carry-out
Odd rows are left alone
Red: full adder output
Yellow: half adder output
Green: left alone
STAGE 2 – STEP2
Repeat the process
This time, there are two sets of three rows
Result in two sets of two rows
This stage takes a lot of hardware as well
Gray boxes indicate the summation bits have been
moved down to the carry-out row
STAGE 2 – STEP 3
Repeat the process
This time, there is only one set of three rows, plus an extra row for carry down
Result is three rows, two from the set of three
plus the one carried down

Each step takes as long as a full adder


because that is the slowest part

All additions are done in parallel


STAGE 3
Final result is calculated by adding final two rows
In this example, the 5LSBs need not be added
Result is that Wallace tree multiplication takes about the same
amount of time as a 2N bit ripple carry adder
TIME DELAYS
Stage 1’s total time: 1 AND gate

Stage 2’s total time: 4 times the full adder delay (in this example)

Stage 3’s total delay time is the greatest, because there can be delays as the
carries are propagated in the final addition

The time taken for stage 2 is saved by having fewer delays in stage 3
TREE STRUCTURE OF PARTIAL PRODUCT MATRIX
EXAMPLE
ARCHITECTURE
ARRAY MULTIPLIER ARCHITECTURE
ADVANTAGES & DISADVANTAGES
Compared to normal multiplication delay is very low
 Power consumption is low
Complex layout and irregular wires
APPLICATIONS
Fast Fourier Transform (FFT)
FIR Filters
Discrete and in Wavelet Transform (DWT)
Auto-correlation
THANK YOU

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