Beruflich Dokumente
Kultur Dokumente
MULTIPLIER
BY
RASHMI SINGH (219EC2160)
PANYAM MAHITHA (219EC2192)
INTRODUCTION
1. Partial Products
3. Final Addition
STAGE 1
Products (each blue square) are the result of a
simple and gate
Stage 2’s total time: 4 times the full adder delay (in this example)
Stage 3’s total delay time is the greatest, because there can be delays as the
carries are propagated in the final addition
The time taken for stage 2 is saved by having fewer delays in stage 3
TREE STRUCTURE OF PARTIAL PRODUCT MATRIX
EXAMPLE
ARCHITECTURE
ARRAY MULTIPLIER ARCHITECTURE
ADVANTAGES & DISADVANTAGES
Compared to normal multiplication delay is very low
Power consumption is low
Complex layout and irregular wires
APPLICATIONS
Fast Fourier Transform (FFT)
FIR Filters
Discrete and in Wavelet Transform (DWT)
Auto-correlation
THANK YOU