A THREE-TERMINAL DEVICE

HISTORY
On December 23, 1947,
Walter H. Brattain and John Bardeen demonstrated the
amplifying action of the first transistor at the Bell Telephone
Laboratories.
 The original transistor is a point-contact transistor.
 THE INVENTORS
1. Dr. William Shockley
Born: London, England, 1910
PhD Harvard,1936

2. Dr. Dr. John Bardeen

Born: Madison, Wisconsin, 1908
PhD Princeton,1936

3. Dr. Dr. Walter H. Brattain

Born: Amoy, China,1902
PhD University of Minnesota, 1928

All shared the Nobel Prize in

1956 for this contribution.
TRANSISTOR APPLICATION

• AMPLIFIER CIRCUITS

• SWITCHING CIRCUITS

• PROTECTION CIRCUITS

• TIMING CIRCUITS

• CONTROL CIRCUITS
 TRANSISTOR CONSTRUCTION
The transistor is a three-layer semiconductor device consisting of either :
The ratio of the total width to that of the center layer is 0.150/0.001 =
150/1
The doping of the sandwiched layer is also considerably less than that of
the outer layers (typically, 10/1 or less).

Two n- & one p-type layers of material Two p- & one n-type layers of material
called NPN Transistor called PNP Transistor
 BJT TERMINALS
a. Emitter (E) - heavily doped and “emits” charged carriers or
current (source of the current
Medium doped and controls the amount of charged
b. Base (B) -
carrier emitted by the emitter and collected by the
collector

c. Collector (C) - lightly doped and “collects” the charged carriers

emitted by the emitter

PNP NPN
 TRANSISTOR OPERATION
Considering the emitter to base bias,
removing the base to collector:
The depletion region has been
reduced in width due to applied
bias
There is a heavy flow of majority
carriers from the p- to the n-type
material (forward bias)
Considering the base to collector bias,
removing the emitter to base:
The depletion region has been
increase in width due to applied bias
There is an absence of majority
carriers flow, resulting to a minority
carrier flow (reverse bias)
 TRANSISTOR OPERATION
In summary, in order for the transistor to operated:
One p-n junction of a transistor is reverse biased,
while the other is forward biased.
there has been an injection
of minority carriers into the
n-type base region material.

all the minority carriers in

the depletion region will
cross the reverse-biased
junction

IB is the order of microamperes IC is in milliamperes,

IE and IC in milliamperes ICO is in microamperes or nanoamperes
TRANSISTOR OPERATION MODE
Depends on how the two junctions are supplied or
biased

a. CUT-OFF MODE / CUT-OFF REGION

b. ACTIVE MODE / ACTIVE REGION

c. SATURATION MODE / SATURATION REGION

 TRANSISTOR OPERATION MODE
a. CUT-OFF MODE / CUT-OFF REGION
BASE EMITTER, BASE COLLECTOR JUNCTIONS ARE
BOTH REVERSE BIAS!!
The transistor is turned OFF
C
No current will flow on the emitter to collector
Emitter unable to emit current B
E
Voltage across collector-emitter VCE is maximum
(approx equal to supply voltage
Resistance between collector and emitter is very high
 TRANSISTOR OPERATION MODE
b. ACTIVE MODE / ACTIVE REGION
BASE EMITTER, ARE FORWARD BIAS AND BASE
COLLECTOR JUNCTION ARE REVERSED BIAS!!
The emitter is able to emit charged carriers or currents
Moderate current flow from emitter to collector C

Moderate resistance between collector and emitter

B
The active region is the region normally employed for E

linear (undistorted) amplifiers

 TRANSISTOR OPERATION MODE
c. SATURATION MODE / SATURATION REGION

BASE EMITTER, BASE COLLECTOR JUNCTIONS ARE

BOTH FORWARD BIAS!!
The transistor is turned “on” C

The emitter is able to emit charged carriers/currents B

Maximum current flow from emitter to collector E

The voltage across collector-emitter is minimum

The resistance between collector and emitter is very low
 COMMON BASE CONFIGURATION
The common-base terminology is derived from the fact that the base is common to both
the input and output sides of the configuration

 The input set for the common-base amplifier will relate an input current (IE) to an
input voltage (VBE) for various levels of output voltage (VCB).

 The output set will relate an output current (IC) to an output voltage (VCB) for various
levels of input current (IE).
 COMMON BASE CONFIGURATION
c. Output / Collector Characteristics
IMPORTANT PARAMETERS EQUATION
A. ALPHA (α)
 the levels of IC and IE due to the majority carriers are related by a
quantity called alpha
COMMON BASE AMPLIFICATION – rate of collector current change due
to the change in emitter current assuming base voltage is constant

:where IC and IE are the levels of current at the point of operation

: for practical devices the level of alpha typically extends from 0.90
to 0.998

:The ac alpha is formally called the common-base,

short-circuit, amplification factor,
:a relatively small change in collector current is divided
by the corresponding change in IE with the collector-
to-base voltage held constant
COMMON EMITTER CONFIGURATION

 the emitter is common or reference to both the input and output

terminals (in this case common to both the base and collector terminals)
 the input is found on the base-emitter circuit
 the output is on collector-emitter circuit.
The active region of the common-emitter configuration can be employed for
voltage, current, or power amplification.
COMMON EMITTER CONFIGURATION

For a transistor in the “on” or SATURATION REGION the base-to emitter

voltage is 0.7 V. In this case the voltage is fixed for any level of base current
Sample Problem
 Using the characteristic on the figure, determine IC at
IB = 30μA and VCE= 10V

 Using the characteristic of figure, determine the IC at

VBC=0.7V and VCE=15V.
B. BETA (β)
 In the dc mode the levels of IC and IB are related by a quantity
called BETA
COMMON EMITTER FORWARD CURRENT AMPLIFICATION
FACTOR
The ratio of change in collector current to the base current

:IC and IB are determined at a particular operating point on the

characteristics curve

:For practical devices the level of typically ranges from about 50 to

over 400, with most in the midrange.
Sample Problem
Determine βdc and
βac using the
characteristic curve
on the figure with
the Q-point located
along IB= 25μA and
VCE = 7.5V
RELATIONSHIP BETWEEN ALPHA (α) & BETA (β)
 COMMON COLLECTOR CONFIGURATION
The collector is common to both the emitter and the base. It used primarily for
impedance-matching purposes since it has a high input impedance and low output
impedance, opposite to that of the common-base and common-emitter configurations

For all practical purposes, the output characteristics of the common-collector

configuration are the same as for the common-emitter configuration.
For the input circuit of the common-collector configuration the common-emitter base
characteristics are sufficient for obtaining the required information.
For the common-collector configuration the output characteristics are a plot of IE
versus VEC for a range of values of IB
FET CONSTRUCTION
 the n-type material /n-type channel
- forms the channel between the
embedded layers of p-type material
- constitute the major part of the structure
- The upper part is connected through an
ohmic contact to the DRAIN
TERMINAL/CHANNEL
- lower end is connected through another
ohmic contact referred to as SOURCE
TERMINAL/CHANNEL

 The p-type material

- composed of two layers
- Connected together through the gate
 depletion region
- found at each junction that
resembles the same region of a diode
under no-bias conditions.
 FET Characteristics
A. a voltage-controlled device
 the current (I) will be a function of the voltage (VGS) applied
to the input circuit
B. a unipolar device
 depending solely on either electron (n-channel) or hole (p-
channel) conduction
C . an electric field is established by the charges
 controls the conduction path of the output circuit
 Does not need for direct contact between the controlling and
controlled quantities.
D. Has high input impedance
 a very important characteristic in the design of linear ac
amplifier systems.
E. More temperature stable smaller in construction than BJTs,
 making them particularly useful in integrated-circuit (IC)
chips.
KINDS OF FET
1. the junction field-effect transistor (JFET)

2. metal-oxide-semiconductor field-effect transistor

(MOSFET). This category is further broken down into
(A) depletion (B) enhancement
 positive voltage VDS has been
applied across the channel and the
gate has been connected directly to
the source to establish the
condition VGS = 0 V
 The instant the voltage VDD (=
VDS) is applied, the electrons will
be drawn to the drain terminal,
establishing the conventional
current ID with the defined
direction
 Under the conditions appearing in
the figure the flow of charge is
relatively uninhibited and limited
solely by the resistance of the n-
channel between drain and source.
As VDS increases and approaches a level
referred to as VP , the depletion regions of
will widen, causing a noticeable reduction
in the channel width. The reduced path of
conduction causes the resistance to
increase

If VDS is increased to a level where it

appears that the two depletion regions
would “touch” a condition referred to as
pinch-off will result. The level of VDS
that establishes this condition is referred
to as the pinch-off voltage and is denoted
by VP .

the term pinch-off is a misnomer in that it

suggests the current ID is pinched off and
drops to 0 A.
The resulting saturation level
for ID has been reduced and
will continue to decrease as
VGS is made more and more
negative. Eventually, when V
GS=VP will be sufficiently
negative to establish a
saturation level that is
essentially 0 mA, and the
device has been “turned off.”
The region to the left of the pinch-off locus is referred
to as the ohmic or voltage controlled resistance
region.

In this region the JFET can be employed as a variable

resistor whose resistance is controlled by the applied
gate-to-source voltage.
Where:
ro = resistance with VGS = 0 V
rd = resistance at a particular
level of VGS.
Summary:

 The maximum current is defined as IDSS and

occurs when VGS = 0 V and VDS =|VP|

 For gate-to-source voltages VGS less than (more

negative than) the pinch-off level, the drain
current is 0 A (ID = 0 A)

 For all levels of VGS between 0 V and the pinch-off

level, the current ID will range between IDSS and 0
A.
  The relationship between ID and VGS is
defined by Shockley’s Equation:

The transfer characteristics defined by Shockley’s equation are

unaffected by the network in which the device is employed.
 SAMPLE PROBLEM
Sketch the transfer curve defined by IDSS = 12 mA and VP = -
6 V.

Two plot points are defined by:

a. IDSS = 12 mA and VGS = 0 V

b. ID = 0 mA and VGS = VP