Embedded

Systems
Engr. Rashid Farid
Chishti
e-mail:
chishti@iiu.edu.pk
International Islamic University H-10, Islamabad, Pakistan
http://www.iiu.edu.pk
Chapter 02: AVR Architecture and
AVR’s CPU
AVR’s CPU
ALU
32 General Purpose
registers(R0 to R31) R0
R1
ALU
PC register R2

Instruction decoder

…
SREG: I T H S V N Z C
R15

CPU R16
R17

…
PC

Instruction decoder R30

R31
Instruction Register
registers
The AVR Data Memory
Two kinds of memory space in AVR:
code memory space
data memory space.
program is stored in
code memory space,
whereas the data
memory stores data.

The data memory is composed of three parts:

GPRs (general purpose registers)
SFR (I/O Registers)
SRAM (general purpose RAM)
 8 bit
Data Address
R0
Figure 2-3:
Space
R1 The Data Memory for
R2
$0000 AVRs with no Extended
$0001 General I/O memory

...
Purpose
...

Registers R31
$001F I/O Address
TWBR $00
$0020
TWSR $01
Standard I/O

...
...

Registers
SPH $3E
$005F SREG $3F
SREG
$0060
General
purpose
...

RAM
(SRAM)

$FFFF
General Purpose Registers
(GPRs)

in AVR
In AVR there are 32
general purpose registers
(all are 8-bit). They are R0-
R31 and are located in the
lowest location of memory
address in any AVR Chip.
 The GPRs in AVR are like
Accumulator in other
microprocessors. They can
be used by all arithmetic
and logic instructions.
 The X, Y, and Z registers
are 16-bit address pointers
for indirect addressing of
the Data Space (RAM).
I/O Registers (SFRs) in AVR
 The I/O memory is dedicated to specific functions such
as status register, timers, serial communication, I/O
ports, ADC, and so on.
 The function of each I/O memory location is fixed by the
CPU designer at the time of design because it is used for
control of the microcontroller or peripherals.
 All of the AVRs have at least 64 bytes of I/O memory
locations. This 64-byte section is called standard I/O
memory.
 In AVRs with more than 32 I/O pins (e.g., ATmega64,
ATmegal28, and ATmega256) there is also an extended
I/O memory, which contains the registers for controlling
the extra ports and the extra peripherals.
 Address Name Address Name Address Name
I/O Mem. I/O Mem. I/O Mem.
$00 $20 TWBR $16 $36 PINB $2B $4B OCR1AH
$01 $21 TWSR $17 $37 DDRB $2C $4C TCNT1L
$02 $22 TWAR $18 $38 PORTB $2D $4D TCNT1H
$03 $23 TWDR $19 $39 PINA $2E $4E TCCR1B
$04 $24 ADCL $1A $3A DDRA $2F $4F TCCR1A
$05 $25 ADCH $1B $3B PORTA $30 $50 SFIOR
$06 $26 ADCSRA $1C $3C EECR OCDR
$07 $27 ADMUX $1D $3D EEDR $31 $51
OSCCAL
$08 $28 ACSR $1E $3E EEARL $32 $52 TCNT0
$09 $29 UBRRL $1F $3F EEARH $33 $53 TCCR0
$0A $2A UCSRB UBRRC $34 $54 MCUCSR
$20 $40
$0B $2B UCSRA UBRRH $35 $55 MCUCR
$0C $2C UDR $21 $41 WDTCR $36 $56 TWCR
$0D $2D SPCR $22 $42 ASSR $37 $57 SPMCR
$0E $2E SPSR $23 $43 OCR2 $38 $58 TIFR
$0F $2F SPDR $24 $44 TCNT2 $39 $59 TIMSK
$10 $30 PIND $25 $45 TCCR2 $3A $5A GIFR
$11 $31 DDRD $26 $46 ICR1L $3B $5B GICR
$12 $32 PORTD $27 $47 ICR1H $3C $5C OCR0
$13 $33 PINC $28 $48 OCR1BL $3D $5D SPL
$14 $34 DDRC $29 $49 OCR1BH $3E $5E SPH
$15 $35 PORTC $2A $4A OCR1AL $3E $5E SREG

Note: Although memory address $20-$5F is set aside for I/O registers (SFR) we can access
them as I/O locations with addresses starting at $00.
Figure 2-7. I/O registers of the ATmega32 and their Data Memory Address Locations
 The AVR Data Memory
Internal data SRAM
Internal data SRAM is widely used for storing data and parameters
by AVR programmers and C compilers. Generally, this is called
scratchpad.
Each location of the SRAM can be accessed directly by its address.
We will use these locations to store data brought into the CPU via
I/O and serial ports.
Each location is 8 bits wide and can be used to store any data we
want as long as it is 8-bit.
Again, the size of SRAM can vary from chip to chip, even among
members of the same family.
SRAM vs. EEPROM in AVR chips
The AVR has an EEPROM memory that is used for storing data.
The EEPROM does not lose its data when power is off, whereas
SRAM does.
So, the EEPROM is used for storing data that should rarely be
changed and should not be lost when the power is off (e.g., options
and settings);
The AVR Data Memory
SRAM vs. EEPROM in AVR chips
The SRAM is used for storing data and parameters that are changed
frequently.
The three parts of the data memory (GPRs, SFRs, and the internal
SRAM) are made of SRAM. By adding the sizes of GPR, SFRs (I/O
registers), and SRAMs we get the data memory size.
Table 2-1: Data Memory Size for AVR Chips
Microcontroller Data Memory I/O Registers SRAM General
(Bytes) (Bytes) (Bytes) Purpose
Register
ATtiny25 224 64 128 32
ATtiny85 608 64 512 32
Atmega8 1120 64 1024 32
Atmega16 1120 64 1024 32
ATmega32 2144 64 2048 32
ATmega128 4352 64+160 4094 32
ATmega2560 8704 64+416 8192 32
GPRs and ALU
The AVR Status Register
Like all other microprocessors, the AVR has a flag register to
indicate arithmetic conditions such as the carry bit. The flag
register in the AVR is called the status register (SReg).
It is an 8-bit register. The bits C, Z, N, V, S, and H are called
conditional flags, meaning that they indicate some conditions
that result after an instruction is executed.
Each of the conditional flags can be used to perform a
conditional branch (jump), as we will see in Chapters 3 and 5.
D7 D0

SREG I T H S V N Z C

I – Global Interrupt Enable V – Overflow Flag

T – Bit Copy Storage N – Negative Flag
H – Half Carry Z – Zero Flag
S – Sign Flag C – Carry Flag

Figure 2-8. Bits of Status Register (SREG)

The AVR Status Register
C, the carry flag
This flag is set whenever there is a carry out from the D7 bit. This
flag bit is affected after an 8-bit addition or subtraction. Chapter 5
shows how the carry flag is used.
Z, the zero flag
The zero flag reflects the result of an arithmetic or logic
operation. If the result is zero, then Z = 1. Therefore, Z = 0 if the
result is not zero. Chapter 3 shows how the zero flag is used for
looping.
N, the negative flag
Binary representation of signed numbers uses D7 as the sign bit.
The negative flag reflects the result of an arithmetic operation. If
the D7 bit of the result is zero, then N = 0 and the result is
positive. If the D7 bit is one, then N = 1 and the result is
negative. The negative and V flag bits are used for the signed
number arithmetic operations and are discussed in Chapter 5.
The AVR Status Register
V, the overflow flag
This flag is set whenever the result of a signed number operation
is too large, causing the high-order bit to overflow into the sign
bit. In general,
the carry flag is used to detect errors in unsigned arithmetic
operations while the overflow flag is used to detect errors in
signed arithmetic operations.
S, the Sign bit
This flag is the result of Exclusive-ORing of N and V flags.
H, Half carry flag
If there is a carry from D3 to D4 during an ADD or SUB
operation, this bit is set; otherwise, it is cleared. This flag bit is
used by instructions that perform BCD (binary coded decimal)
arithmetic. In some microprocessors this is called the AC flag
(Auxiliary Carry flag).
The T flag bit is discussed in Chapter 6 while Chapter 10 covers
the I flag.
Experimentation with Condition
Flagsthe
Indicate (#1/3)
changes in N, Z, C, V flags for the following
arithmetic operations: (Assume 4 bit-numbers)

1 1 111
0010 0011
+ 1010 1111
-----------
1101 0010
 N = 1
 V = 0
 Z = 0
 C = 0
 S = 1
 H = 1

15
Experimentation with Condition
Flagsthe
Indicate (#2/3)
changes in N, Z, C, V flags for the following
arithmetic operations: (Assume 4 bit-numbers)

1 1 111
1010 0011
+ 1010 1111
-----------
10101 0010
 N = 0
 V = 1
 Z = 0
 C = 1
 S = 1
 H = 1

16
Experimentation with Condition
Flagsthe
Indicate (#2/3)
changes in N, Z, C, V flags for the following
arithmetic operations: (Assume 4 bit-numbers)

1 0 111
0110 0011
+ 1000 0101
-----------
1110 1000
 N = 1
 V = 0
 Z = 0
 C = 0
 S = 1
 H = 0

17
Features of ATmega32
Microcontroller
8-bit RISC AVR microcontroller with 32KB In-System Self-
programmable Flash program memory, 2KB SRAM and
1KB EEPROM.
32x8 General Purpose Registers
Up to 16 MIPS Throughput at 16 MHz
Two 8-bit Timer/Counters with Separate Prescalers and
Compare Modes
One 16-bit Timer/Counter with Separate Prescaler,
Compare Mode, and Capture Mode
8-channel, 10-bit ADC, 4 PWM Chanels
Byte-oriented Two-wire Serial Interface
Programmable Serial USART
Master/Slave SPI Serial Interface
Features of ATmega32
Microcontroller
Programmable Watchdog Timer with Separate On-chip
Oscillator, Programming Lock for Software Security.
On-chip Analog Comparator, Internal RC Oscillator
Six Sleep Modes: Idle, ADC Noise Reduction, Power-
save, Power-down, Standby and Extended Standby
External and Internal Interrupt Sources
32 Programmable I/O Lines
Operating Voltages:
2.7 - 5.5V for ATmega32L Power Consumption at 1
4.5 - 5.5V for ATmega32 MHz,
Speed Grades: 3V, 25°C for ATmega32L
0 - 8 MHz for ATmega32L, Active: 1.1 mA
0 - 16 MHz for ATmega32 Idle Mode: 0.35 mA
Power-down Mode: < 1 μA
Ordering Information
 Package Types

MLF (Micro Lead frame Package) PDIP (Plastic Dual Inline Package )

Holder PLCC ( Plastic leadless Chip Carrier ) TQFP (Thin Plastic

Quad Flat Package ) 25
3/22/20 www.iiu.edu.pk