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DISTRIBUTE

D SYSTEM
• Single Coherent system

• Hardware Aspect
• Software Aspect
INTRODUCTION
Distributed computing
is a method of
computer processing
in which different parts
of a program are run
simultaneously on two or
more computers that are
communicating with each
other over a network.
• An example of distributed
computing is BOINC, a framework
in which large problems can be
divided into many small problems
which are distributed to many
computers. Later, the small
results are reassembled into a
larger solution.
CHARACTERISTICS
• do not have share memory or clock.

• computers communicate by the exchanging


messages.

• computer has its own memory and operating system


• Issues in Distributed System
• Global Knowledge
• Naming
• Scalability
• Compatibility
• Process synchronization
• Resource management
• Security
• Structuring

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• Global Knowledge

• Due to the unavailability of global clock and shared memory


and unpredictable message delay, it is impossible to to collect
the upto date information about the global state

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• Naming
• Names are used to refer the objects. A name
service map a logical name to the physical
address by making use of lookup table

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• Scalability
• Grow with time

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• Compatibility

• Three level of compatibility exist in DS


– Binary level
– Execution level
– Protocol level

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• Resource Management
• Resource management concern with both local
and remote resources available to user in an
effective manner

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• Security
• Authentication and authorization

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AUTOMATIC BANKING (TELLER MACHINE) SYSTEM

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INHERENT LIMITATIONS OF DS

1. Absence of Global Clock

1. In DS there is no system wide common clock or global clock.


Notion of global time does not exist.

1. Suppose a common clock is available for all process in


the system: then two different process can observe a
global clock value at different instant due to
unpredictable message transmission delay.

2. On other hand, if we provide each computer in the


system with physical clock, these physical clock can drift
from physical time.

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INHERENT LIMITATIONS OF DS

IMPACT OF THE ABSENCE OF GLOBAL TIME

The concept of temporal ordering is integral to design and


development of any DS.

For example an OS is responsible for scheduling process on the


basis of temporal ordering.

Due to the absence of global time, it is difficult to reason about


temporal events in DS. Hence algorithm for DS are more difficult
to design and debug compare to centralized system.

Due to absence of global clock it is hard to collect up-to-date


information on state of system.

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INHERENT LIMITATIONS OF DS

ABSENCE OF SHARED MEMORY

Computer in DS do not share memory, an up to date state of


entire system is not available to any process.

A process in DS can obtain coherent but partial view of system or


a complete but incoherent view of system.

Coherent view means all observation of different process are


made at the same physical time.

Complete view encompasses the local state of all computers and


any message in transit in DS i.e. Global State.

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THEORETICAL ASPECTS
• Logical Clocks
• Causal Ordering
• Global State Recording
• Termination Detection

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HAPPENED BEFORE RELATION ()

• Ab, if a and b are the event in the same process and a occurred before b
• Ab, if a is the event of sending a message m in a process and b is the
event of receipt of the same message m by another process
• Ab and bc then ac , relation is -------
CAUSALLY RELATED EVENTS

• A causally affact event b if ab.


CONCURRENT EVENT

• If two events not causally affected each other


LAMPORT’S CLOCK
• Happened before relation:
– a -> b : Event a occurred before event b. Events in the same
process.
– a -> b : If a is the event of sending a message m in a
process and b is the event of receipt of the same message
m by another process.
– a -> b, b -> c, then a -> c. “->” is transitive.
• Causally Ordered Events
– a -> b : Event a “causally” affects event b
• Concurrent Events
– a || b: if a !-> b and b !-> a

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SPACE-TIME DIAGRAM
Space e11 e12 e13 e14
P1

Internal
Events
Messages

P2
e21 e22 e23 e24
Time

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LOGICAL CLOCKS
• Conditions satisfied:
– Ci is clock in Process Pi.
– If a -> b in process Pi, Ci(a) < Ci(b)
– Let a: sending message m in Pi; b : receiving message m
in Pj; then, Ci(a) < Cj(b).
• Implementation Rules:
– R1: Ci = Ci + d (d > 0); clock is updated between two
successive events.
– R2: Cj = max(Cj, tm + d); (d > 0); When Pj receives a
message m with a time stamp tm (tm assigned by Pi, the
sender; tm = Ci(a), a being the event of sending message
m).
• A reasonable value for d is 1

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SPACE-TIME DIAGRAM
Space e11 e12e13e14e15 e16 e17
P1
(1) (2) (3) (4) (5) (6) (7)

(1) (2) (3) (4) (7)


P2
e21 e22 e23 e24 e25
Time
R1: Ci = Ci + d (d > 0); clock is updated between two successive
events.
R2: Cj = max(Cj, tm + d); (d > 0); When Pj receives a message
m with a time stamp tm (tm assigned by Pi, the sender; tm =
Ci(a), a being the event of sending message m).
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R1: Ci = Ci + d (d > 0); clock is updated between two successive events.
R2: Cj = max(Cj, tm + d); (d > 0); When Pj receives a message m with a
time stamp tm (tm assigned by Pi, the sender; tm = Ci(a), a being the
event of sending message m).

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B. Prabhakaran 26
Limitation
a →→b implies C(a) < C(b)
BUT
C(a) < C(b) doesn’t imply a →→b

B. Prabhakaran 27
LIMITATION OF LAMPORT’S CLOCK
Space e11 e12 e13
P1
(1) (2) (3)

(1) (3) (4)


P2
e21 e22 e23

P3 e31 e32 e33

(1) (2)
Time
C(e11) < C(e32) but not causally related.
This inter-dependency not reflected in Lamport’s Clock.
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VECTOR CLOCKS
• Keep track of transitive dependencies among
processes for recovery purposes.
• Ci[1..n]: is a “vector” clock at process Pi whose
entries are the “assumed”/”best guess” clock
values of different processes.
• Ci[j] (j != i) is the best guess of Pi for Pj’s clock.
• Vector clock rules:
– Ci[i] = Ci[i] + d, (d > 0); for successive events in Pi
– For all k, Cj[k] = max (Cj[k],tm[k]), when a message m
with time stamp tm is received by Pj from Pi.
: For all

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VECTOR CLOCKS COMPARISON
1. Equal: ta = tb iff i, ta[i] = tb[i]
2. Not Equal: ta != tb iff ta[i] != tb[i], for at least one i
3. Less than or equal: ta <= tb iff ta[i] <= tb[i], for all i
4. Less than : ta < tb iff ta[i] <= tb[i] and ta[i] != tb[i], for all i
5. Concurrent: ta || tb iff ta !< tb and tb !< ta
6. Not less than or equal ...
7. Not less than ..

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VECTOR CLOCK …
Space e11 e12 e13
P1
(1,0,0) (2,0,0) (3,4,1)

(0,1,0) (2,2,0) (2,3,1) (2,4,1)


P2
e21 e22 e23 e24

P3 e31 e32

(0,0,1) (0,0,2)
Time

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CAUSAL ORDERING OF MESSAGES

Space Send(M1)
P1

Send(M2)
P2

P3 (1)

(2)
Time

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GLOBAL STATE
Communication Channel C1
and C2 are assumed to be in
Global State 1 FIFO.
A recorded global state may
C1: Empty be inconsistent in n<n’ where
$500 $200 n is msg sent by A

A C2: Empty B
Global State 2

C1: Tx $50
$450 $200
A C2: Empty B
Global State 3

C1: Empty
$450 $250
A C2: Empty B
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GLOBAL STATE

• A global state, GS of a system is the collection of the local states of its sites
• i.e. GS=(LS1,Ls2,LS3,----LSn) where n is the number of sites in the system

B. Prabhakaran 35
NEED

• How do we determine when to garbage collect in a distributed system?


• How do we check whether a reference to memory still exists?

B. Prabhakaran 36
• Consistent global state- if no inconsistent
• Transitless global state
– No message in transit

B. Prabhakaran 37
RECORDING GLOBAL STATE...
• (e.g.,) Global state of A is recorded in (1) and not in (2).
– State of B, C1, and C2 are recorded in (2)
– Extra amount of $50 will appear in global state
– Reason: A’s state recorded before sending message and C1’s
state after sending message.
• Inconsistent global state if n < n’, where
– n is number of messages sent by A along channel before A’s
state was recorded
– n’ is number of messages sent by A along the channel before
channel’s state was recorded.
• Consistent global state: n = n’

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• Transit State
• Transit(Lsi,LSj)=(mij|Send mijЄLSi л Rec (mij) Є LSj)
• Inconsistent state
• Inconsistent (Lsi,LSj)=(mij|Send mijЄLSi л Rec (mij) Є LSj)

B. Prabhakaran 39
B. Prabhakaran 40
B. Prabhakaran 41
RECORDING GLOBAL STATE...
• Strongly consistent global state: consistent and
transitless, i.e., all send and the corresponding
receive events are recorded in all LSi.
LS11 LS12

LS22 LS23
LS21

LS31 LS32 LS33

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