MEWAR INSTITUTE

SUBMITTED
SUBMITTED
BY ▼
BY ▼ SUBMITTED
SUBMITTED TO
TO
SUNIL
SUNIL KUMAR
KUMAR ▼
▼
(( BCA
BCA IST YEAR ))
IST YEAR MR.
MR. ASHEESH
ASHEESH PANDEY
PANDEY
ROLL
ROLL NO. NO. == SIR
SIR
19090416056
19090416056
 TOPIC
DEFINE COUNTER
AND
SYNCHRONOUS
COUNTER
 COUNTER
Counters are specially designed sequential circuits, in which
, the state of the counter is equal to the count held in the
circuit by the flip flops. Counters calculate or note down the
number that how many times an event occurred.
Counters are the crucial hard ware components, and are
defined as “The digital circuit which is used to count the
number of pulses”. Counters are well known to us as
“Timers”. Counters are designed by grouping of flip flops
and applying a single clock signal to them. In simple words,
the counters are those, which have the group of storage
elements like flip flops to hold the count.
 SYNCHRONOUS COUNTER

Synchrounous generally refers to something which is

cordinated with others based on time. Synchronous
signals occur at same clock rate and all the clocks follow
the same reference clock.
In synchronous counter, the clock input across all the
flip-flops use the same source and create the same clock
signal at the same time. So, a counter which is using the
same clock signal from the same source at the same
time is called Synchronous counter.
 SYNCHRONOUS UP COUNTER
An ‘N’ bit Synchronous binary up counter consists of ‘N’ T flip-
flops. It counts from 0 to 2𝑁 − 1. The block diagram of 3-bit
Synchronous binary up counter is shown in the following figure.
The 3-bit Synchronous binary up counter contains three T flip-
flops & one 2-input AND gate. All these flip-flops are negative
edge triggered and the outputs of flip-flops change affect
synchronously. The T inputs of first, second and third flip-flops
are 1, Q0 & Q1Q0 respectively.

The output of first T flip-flop Toggles  for every negative edge

of clock signal. The output of second T flip-flop toggles for
every negative edge of clock signal if  Q0 is 1. The output of
third T flip-flop toggles for every negative edge of clock signal
if both Q0 & Q1 are 1.
 SYNCHRONOUS DOWN COUNTER
An ‘N’ bit Synchronous binary down counter consists of ‘N’ T
flip-flops. It counts from 2𝑁 − 1 to 0. The block diagram of 3-
bit Synchronous binary down counter is shown in the
following figure.
The 3-bit Synchronous binary down counter contains three
T flip-flops & one 2-input AND gate. All these flip-flops are
negative edge triggered and the outputs of flip-flops change
affect synchronously. The T inputs of first, second and third
flip-flops are 1, Q'0 & Q'1Q’0 respectively.

The output of first T flip-flop Toggles  for every negative

edge of clock signal. The output of second T flip-flop toggles
for every negative edge of clock signal if  Q'0 is 1. The output
of third T flip-flop toggles for every negative edge of clock
signal if both Q'0 & Q'1 are 1.