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ECE – V Semester

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COMPUTER ARCHITECTURE
&
ORGANIZATION
Unit 2:
General System Architecture
Contents

 Instruction Codes
 Stored Program Concept
 Flynn’s Classification
SISD
SIMD

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MISD
MIMD
 Multi – level Viewpoint of a machine
 Structured Organization

Prepared By: Nidhi Garg


Instruction Codes
 Internal Organization of a digital system is defined by the
sequence of micro – operations it performs on data stored in its
registers.
 The general – purpose digital computer is capable of:
Executing various micro – operations, and
Can be instructed as to what specific sequence of operations it
must perform
 The user controls the process by means of a program.

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A Program is a set of instructions that specify the operations,
operands, and the sequence by which processing has to occur.
A computer instruction is a binary code that specifies a sequence
of micro – operations for the computer.
 Instruction codes together with data are stored in memory.

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Instruction Codes (Cont…)
 Instruction Codes : A group of bits that instruct
the computer to perform a specific operation.
 It is usually divided into parts, each having its own
particular interpretation.
 Most basic part of an instruction code is its
OPERATION part.

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 Opcode : A group of bits that define operations
like ADD, SUBTRACT etc.
 The number of bits required for the operation code
of an instruction depends on the total number of
operations available in the computer.
 The opcode must consist of atleast n bits for a
given 2n (or less) distinct operations.
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Stored Program Concept
 Thesimplest way to organize a computer is to have
one processor register & an instruction code with 2
parts:
Opcode (What operation is to be completed)
Address (Address of the operands on which the
operation is to be computed)

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A computer that by design includes an instruction
set architecture and can store in memory a set of
instructions (a program) that details the
computation and the data on which computation is
to be done.

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Stored Program Concept (Cont…)
Memory
4096 X 16
15 12 11 0
Instructions
Opcode Address
(Program)
Instruction Format

15 0 Operands

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Binary Operand (Data)

Diagram: Processor Register


(Accumulator or AC)
Stored Program
Organization
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Stored Program Concept (Cont…)
 The Opcode tells us the operation to be performed.
 Address tells us the memory location where to find operand.
 For a memory unit of 4096 bits - 12 bits to specify address.
 When we store an instruction code in memory, 4 bits are specified
for 16 operations (as 12 bits are for operand address).
 For an operation control fetches the instruction from memory, it
decodes the operation (one out of 16) and finds out the operands
and then do the operation.

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 Computers with one processor register generally name it
accumulator (or AC). The operation is performed with operand and
the content of AC.
 In case no operand is specified, we compute the operation on
accumulator .E.g.: Clear AC, complement AC etc.

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Parallel Computers
The one we studied was very basic one but sometimes we
have very large computations in which one processor with
general architecture will not of much help. Thus we take the
help of many processors or divide the processor functions
into many functional units and also doing the same
computation on many data values.

So to give solutions to all these we have various types of

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computers.
 Flynn’s Classification
 Feng’s Classification
 Händler’s Classification

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Flynn’s Classification
 Basedon the multiplicity of Instruction Streams
and Data Streams
Instruction Stream - Sequence of Instructions
read from memory
Data Stream - Operations performed on the data
in the processor

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Number of Data
Streams
Single Multiple
Number Of Single SISD SIMD
Instruction
Streams Multiple MISD MIMD

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Flynn’s Classification

Architecture Categories

SISD SIMD MISD MIMD

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(Single (Single (Multiple (Multiple

Instruction Instruction Instructions Instructions

Single Multiple Single Multiple

Data) Data) Data) Data)

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SISD

IS IS DS
C P M

 Simplest Computer Available

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 Contains No Parallelism
 Instruction are executed sequentially
 System may or may not have external
parallel processing capabilities.

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SISD
 Characteristics
Standard von Neumann machine
Instructions and data are stored in memory
 One operation at a time
 Limitations
Von Neumann bottleneck

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Maximum speed of the system is limited by the
Memory Bandwidth (bits/sec or bytes/sec)
Memory is shared by CPU and I/O
 Examples: Superscalar processors
Super pipelined processors
VLIW Prepared By: Nidhi Garg
SIMD
 Single instruction is Memory
operated with different Data bus
sets of data, with the help Control Unit
of many processing units.
Instruction Stream
 Controlled by a single
Processor
control unit. units
P P P

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 Shared memory contains 1 2 k

various modules so that it Data stream

can communicate with all Alignment Network


the processors at same Memory
time. M1 M2 Mk
Modules

 Main memory is used for


storage of programs.
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SIMD
 Characteristics
Only one copy of the program exists
A single controller executes one instruction at a
time

 Examples:

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Array processors
Systolic arrays
Associative processors

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MISD

 NoPractical usage as there are least chances


where lots of instructions get executed on a single
data.

M1 C1 P1

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M2 C2 P2
Memory

Mn Cn Pn Data
Stream
Instruction stream
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MIMD

P1 M1 P2 M2 Pn Mn

Interconnection Network

Shared Memory

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 Refers to a computer system where we have
different processing elements working on
different data.
 In this we classify various multiprocessors and
multi computers.

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MIMD
 Characteristics:
 Multiple processing units

 Execution of multiple instructions on multiple


data

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 Types of MIMD computer systems
 Shared memory multiprocessors

1. UMA

2. NUMA
 Message-passing multi computers

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Shared Memory Multi-Processors
 Example systems
Bus and cache-based systems
Sequent Balance, Encore Multimax
Multistage IN-based systems
Ultra computer, Butterfly, RP3, HEP

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Crossbar switch-based systems
C.mmp, Alliant FX/8
 Limitations
 Memory access latency
 Hot spot problem
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UMA

M1 M2 Mn

Interconnection Network

P1 P2 Pn

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 All processors have equally direct access to one
large memory address space.
 The access time to reach that memory is same for
all processors thus it is named as UMA.

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NUMA

M M M

Interconnection Network

P1 P2 Pn

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M1 M2 Mn

 All processors have equally direct access to one


large memory address space and also have their
own memory.
 The access time to reach different memories is
different for each processor thus itPrepared
is named as Garg
By: Nidhi
Message Passing Multi-computer

Message Passing Network

P1 P2 Pn

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M M M

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Message Passing Multi-computer
 Characteristics
Interconnected computers
Each processor has its own memory, and
communicates via message-passing
 Example systems
Tree structure: Teradata, DADO

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Mesh-connected: Rediflow, Series 2010, J-Machine
Hypercube: Cosmic Cube, iPSC, NCUBE, FPS T
Series, Mark III
 Limitations
Communication overhead
Hard to programming
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Multilevel View-point of Machine

SOFTWARE USER APPLICATION LAYER


LAYER OS – MSDOS
COMPILER MACRO
WINDOWS ARCHITECTURE
ASSEMBLER UNIX / LINUX

INSTRUCTION SET ARCHITECTURE


(ISA)

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PROCESSOR MEMORY I/0 SYSTEM
DATA PATH & CONTROL
MICRO
HARDWARE GATE LEVEL DESIGN ARCHITECTURE
LAYER CIRCUIT LEVEL DESIGN
SILICON LAYOUT LAYER

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Macro – Architecture
 as a unit of deployment, talks about Client
applications & COM Servers.
 This is basically our software layer of the computer.
 It comprises of :
User Application layer
High level language

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Assembly language
Machine language
Operating system
Compiler
Assembler
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Operating System
Functions of Operating system:
Process management
Memory management
File management
Device management
Error Detection
Security
Types of Operating system:

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Multiprogramming Operating System
Multiprocessing Operating system
Time Sharing Operating system
Real time Operating system
Distributed Operating system
Network Operating system

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ISA
 Abstraction on the interface between hardware and
low-level software.
 Deals with the functional behaviour of a computer
system as viewed by a programmer.
 Attribute of a computing system, as seen by
assembly language programmer or compiler.

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 ISA is determined by:
Data Storage.
Memory Addressing Modes.
Operations in the Instruction Set.
Instruction Formats.
Encoding the Instruction Set.
Compiler’s View. Prepared By: Nidhi Garg
Micro - Architecture
 inside a unit of deployment talks about running process, thread
concurrency, synchronization, memory sharing etc.
 Computer organization - how constituent parts of system are
interconnected & how they interoperate in order to implement the
ISA.
 Processor memory I /o system – Basic hardware devices required
for processing of any system application.
 Data path and control –Decides the flow of information within

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various parts of computer system in various circuits.
 Gate level design – Circuits such as register, counters etc are
implemented in the form of various gates available.
 Circuit level design – Gates forming logical circuit/component
 Silicon layout layer

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Structured Organization
Input Output
(Instructions & Secondary Memory or (To monitors,
Data from Auxiliary Memory Printer or other
keyboard (Hard-disk) O/P Devices)
Or Primary Memory or
Other I/O Main Memory
(RAM)

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Devices)

Cache
Registers

ALU (Data Path)

Control Unit
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