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MICROPROCESSORS AND

INTERFACING

Instuctor : Dr. T. V. Rao

Room : C – 004

Contact Hours : 4 pm – 5 pm OR
with prior appointment
Ø Text Book:
vMicroprocessors and
Interfacing
v by Douglas V Hall, Revised 2nd edition
v McGraw Hill Publication
Ø
Ø Referece Books:

• Brey, “Intel Microprocessors –The 8086,


8088, 80186, 80286, 80386, 80486
Architecture, Programming & Interfacing”,
4th Edition, PHI.
• Peter Abbel, “IBM PC assembly language”,
5th edition PHI
• Yu-Cheng Liu and Glenn A. Gibson,
“Microcomputer Systems: The 8086/8088
Scope and
Objectives 
The purpose of the
microprocessor
 to give an in-depth study of both
the hardware and software included
in microcomputer systems.

The concepts
 are based on a particular
microprocessor, the Intel 8086, and
its associated supporting devices and
software and assembly language
 Main Objectives
2) TO MAKE THE STUDENTS TO DEVELOP DIFFERENT TYPES OF APPLICATIONS IN
ASSEMBLY LANGUAGE USING
8086 INSTRUCTION SET.

3) TO MAKE THE STUDENT TO BECOME HANDS ON TASM/MASM ASSEMBLER FOR THE


DEVELOPMENT

OF PROGRAMS IN ASSEMBLY LANGUAGE.

4) TO MAKE THE STUDENT ANALYZE VARIOUS TYPES OF INTERFACINGS OF


PERIPHERAL DEVICES .

5) TO UNDERSTAND SOME OF THE TOPICS OF COURSE BY STUDENTS THEMSELVES.

6) THE STUDENT MUST LEARN THE ADVANCED MICROPROCESSORS ARCHITECTURES


ESPECIALLY DUAL-CORE
AND QUAD-CORE.
SYLLABUS
• UNIT I: Introduction: Microprocessor evolution and types, 8086 family overview,
8086 internal architecture, introduction to programming 8086. Programming
structure and representation formats, Finding right instructions, writing a
program, addressing modes. 9 – Hrs


• UNIT II :8086 string instructions, 8086 instruction description and assembler
directives, Standard programming structures. writing and using procedures,
writing and using assembler macros.
 9 - Hrs

• UNIT III: Introduction to interfacing, Bus structure: minimum mode, Interrupts and
interrupt responses, 8259A priority interrupt controller, programmable parallel
ports and hand shake input and output, interfacing processor to 8255A,
Peripheral interfacing: key boards, stepper motor.

9 - Hrs

• UNIT IV:Maximum mode of operation, bus structure, Direct memory access Data
transfer(DMA), Interfacing with 8251A(USART), 8087 numeric data processors.
9 – Hrs


• UNIT V: Multiuser/Multitasking operating concepts, the Intel 80286 microprocessor:
architecture, real mode and protected mode, the Intel 80386: architecture, real
BLOCK DIAGRAM OF A COMPUTER
TIMESHARING SYSTEM
BLOCK DIAGRAM OF A DISTRIBUTED
PROCESSING COMPUTER SYSTEM
BLOCK DIAGRAM OF A SIMPLE
MICROCOMPUTER
Intel Family Evolution
Processor AlU Data bus Address Bus
Number Size(bits) Size(bits) Size(bits)

8085 8 16 16

8086 16 16 20 Queue 6
bytes

8088 8 20 20 Queue
4bytes

80186 16 16 24

80286 16 16 24

80386 32 32 32

80486 32 32 32

Pentium 32 64 32
Microprocessor Chip
8086 Pin Diagram
8086 INTERNAL BLOCK DIAGRAM
8086 FLAG REGISTER FORMAT
64Kb SEGMENT POSITION IN 1Mb Address
Space OF 8086(One Way)
Using CS and IP
a) Physical address Diagram
b)Physical address Computation
Using SS&SP
a) Physical address Diagram
b) Physical address Computation
Using DS and Effective address accessing
data
Flowchart for a program to read 24 samples
Addressing Modes
Ø Datum
Ø Direct
Ø Register
Ø Register Indirect
Ø Register relative
Ø Based Indexed
Ø Relative Based Indexed

Immediate Addressing mode : Instruction

Datum

irect Addressing mode: Instruction Memo


Address Datum
Register Addressing mode: Instruction
Register Register Datum

Register Indirect mode : Instruction


Register RegisterMemory Effective Address Datum

Register relative
addressing mode :
Instruction
Register Displacement
Memory

+ Datum

Registe
r
Address
Based Indexed addressing mode:

Instruct
ion Index Register
Base Reg Index reg Address
Memory
EA
+ Datum

Base
Register
Address
Relative Based Indexed
addressing mode :
Instruction
Base Reg Index reg Displacement
Register
Index Memory

Address + Datum

Base Register
Address
Coding template for 8086 IN instruction
a) Template b) Example
c) Hex codes
Coding template for 8086 which MOV data between
registers or between a register and a memory location