INTRODUCTION TO

MICROPROCESSORS

Meppayil Narayanan
Sir Syed College
Taliparamba
Kannur
E-mail : meppayilnarayanan@gmail.com
“A Microprocessor is a multipurpose,
programmable, clock driven, register
based electronic device that reads binary
instructions from a storage device called
memory, accepts binary data as input and
processes data according to those
instructions, and provides results as
output.”
EVOLUTIONS OF MICROPROCESSORS
 Microprocessor is a semiconductor device
consisting of electronic logic circuits. It is a
programmable device. A set of instructions
written for the microprocessor to perform a task
is called a program.
Microprocessor used systems are of two types
–
1.Reprogrammable – e.g.:- Microcomputers
(general purpose)
2.Embedded – e.g. :- Xerox machine, Washing
machine, Traffic light controller
 Microcomputers

Input Output

µP Bus
(CPU)

Memory

SYSTEM BUS
This is comprised of the control bus, data bus and address bus. It is used for
connections between the processor, memory and peripherals, and transferral
of data between the various parts.
Microcomputer system consists of four sections –

1.Microprocessor (CPU)
2.Memory (ROM and RAM)
3.Input
4.Output
1. The Microprocessor

The silicon chip that contains the CPU where most

calculations take place
Microprocessors are distinguished by 3
characteristics
◦Instruction set: the set of instructions that the
microprocessor can execute
◦Bandwidth: the number of bits processed in each
instruction
◦Clock speed: (MHz) It determines how many
instructions/second the processor can execute
Microprocessor used as CPU.
•It is a single chip IC capable of performing computing and making decisions
during program execution.
•It can be divided in to three sections
i. ALU
Performs computing functions such as arithmetic operations and logical
operations on data
ii. Register Unit
Used to store data temporarily.
iii. Control Unit
Provides the necessary timing and control signals to all the operations.
CPU
The part of the central processing unit that
deals with operations such as addition,
subtraction, and multiplication of integers
and Boolean operations. It receives control
signals from the control unit telling it to
carry out these operations.
2. Memory
Stores the program and data and provides that
information to the microprocessor whenever necessary.
The memory is not an actual part of the CPU
itself, and is instead housed elsewhere on the
motherboard. However, it is here that the program
being executed is stored, and as such is a crucial part of
the overall structure involved in program execution.
3. Input
It is required to get data and Instructions in binary form
from the outside to the microprocessor.
E.g. :- Keyboard, ADC, Webcam, CD, Pen drive, Floppy disc
etc.

4. Output
Output unit transfers the processed data from the
microprocessor to the output devices such as LED, CRTs, Video
Monitor, Line printers, LCD projectors etc.
 INTEL 8085
40 pin dual – in - line package (DIP).
Pin 1 & 2
Crystal at a required frequency (500 KHz to 3.125 MHz)
Pin 3
When we switch on the system, the peripheral chips are being reset.
Pin 4
SOD converts Acc data in to a Serial data stream
Pins 12 to 19 & 21 to 28
Pins 12 to 18 carry the lower order 8 address bits or 8 data bits.Pins 21 to 28
contain the rest of the address bus.
Pin 20
Ground
Pin 30
The Memory Address Register (MAR) in each memory chip is called Address
latch. It stores the address from the Address bus and Address data bus. The falling edge
of ALE signal loads the address on the Address bus and Address data bus in to the MAR
of the memory chips.
Pin 36
If = 0, the processor resets the whole system and sends a high RESET OUT to
pin 3.
Pin 35
Some of the peripheral devices are unable to run at the same speed at the 8085,
because of the low speed operation. If the device is not ready, the device will send a low
READY bit to the 8085. Then 8085 is in WAIT state.
Pin 37
Carries a clock out signal which obtained from the on-chip oscillator. This
signal goes to the peripheral chips to synchronize their timings.
Pin 38, 39
In order to speedup data transfer between memory and a peripheral device, the
processor need not be involved. The solution for this is direct memory access operation,
with HOLD and HLDA control signals.
 FUNCTIONAL BLOCK DIAGRAM OF 8085
INTA
RST 6.5 TRAP SID SOD
INTR RST 5.5 RST 7.5

INTERRUPT SERIAL I/O

CONTROL CONTROL

8 BIT INTERNAL DATA BUS

A
Temp. Flag Instruct B (8) C (8)
ACCUMU
LATOR reg. register ion

GPR
register
D (8) E (8)

REGISTER ARRAY
(ACC)
(8) (8) (5) (8)
H (8) L (8)

(16)
STACK POINTER
Arithmetic Instruction
Logic Unit decoder &
(ALU) Machine
cycle PROGRAM COUNTER (16)
(8) encoding
INCREMENTER / DECREMENTER
X2 X1 GND +5V
ADDRESS LATCH (16)

TIMING & CONTROL ADDRESS ADDRESS DATA

(8)
BUFFER (8) BUFFER

CLKgen. RD WR ALE S0 S1 IO/M HOLDA OUT

IN
Ready HOLD
Internal Data Bus (8 bit): Carries instructions and data between the CPU registers

Serial I/O control : The mode of transmission from the I/O devices is either in serial
form or in parallel form. In certain cases, I/O devices operate with serial data rather
than parallel. Hence before the computer operation, the serial data stream from an
output device must be converted to 8 bit parallel data. the SID input is where serial
data enters and the SOD output is where the serial data leaves.

Interrupt control : It is necessary to interrupt the execution of the main programme

to service an I/O device. For example, let an I/O device may send an interrupt signal
to this ‘interrupt control’ unit to indicate that data is ready for input. Then the
computer temporarily stops, takes data and then returns to previous position

ALU : Performs addition, subtraction, logical AND,OR, EXOR, complement,

increment, decrement, shifting and clearing on 8 bit quantities. Arithmetic logic group
of circuits includes Accumulator, flag flip-flops and temporary register

Timing and Control : It is a part of CPU. It generates timing and control signals for
the execution of instructions. The control signal of this unit controls dataflow
between CPU and peripherals. It controls the entire operations of the Microprocessor
and the peripherals connected to it.
 Registers in the 8085 and their functions

Sl. No. Name of the register Quantity Capacity

1 Accumulator ( Acc or A) 1 8 bit

2 Temporary register 1 8 bit

3 General Purpose registers (B,C,D,E,H & L) 6 8 bit each

4 Stack Pointer (SP) 1 16 bit

5 Program Counter (PC) 1 16 bit

6 Instruction Register 1 8 bit

7 Incrementer / Decrementer address latch 1 16 bit

8 Status Flag registers 5 FF 1 bit each

The registers are used for temporary storage, manipulation of data and instructions,
and during the execution of a program
1.Accumulator : 8 bit register- It can send or receive data via internal data bus.
During the execution of a program, this is generally used for temporary storage
and for the placement of final result of Arithmetic/ Logical operations. The two
state output of this drives ALU.
This register that holds one of the quantities to be operated on by the ALU
and receives the result of an operation done by the ALU.
2.Temporary register : 8 bit- receives data from the internal data bus and holds it
for ALU. This register stores the operands of Arithmetic- logic operations.
4.General Purpose Registers: This is an array of CPU registers, containing six
number of 8 bit registers arranged in pairs. The pairs are B&C,D&E, and H&L.
These BC,DE and HL registers are known as “Scratch Pad” registers. Basically
this register array is like a small on chip RAM with addressable memory
locations. By using proper control signals, the CPU can either load a register
from the internal data bus or the output of these registers to the bus.
Note that each register of this array alone, can be used to store a byte of data and
with its combination, used to store a 16 bit data word or 16 bit address.
4.Stack pointer (SP): This 16 bit register controls a portion of a memory known
as “ Stack” and it holds then address of this stack top. This stack is used to save
the content of a register during the execution of a program.
5.Program Counter (PC): This 16 bitcounter can be viewed as a register or
parallel load counter. It store the memory address currently being read from or
written into the memory, by the CPU. After each instruction, it is incremented
automatically so that it points out to the location of the next instruction.
6. Instruction Register and Decoder : During the operation; the op-code of an
instruction is stored in the instruction register and then drives the instruction
decoder and machine cycle encoder. However the instruction register simply
holds instructions which are coming on the data bus. The decoder interprets the
instruction and producing the proper signals to carry it out.
7. Incrementer / Decrementer : It allows the contents of any of the 16 bit
registers to be incremented or decremented, by logic 1.
8. Status Flags : It is a set of five flip flops; in which each holds 1 bit flag that
indicates certain condition during arithmetic and logic operations. These five
conditional flags are zero, sign, carry, auxiliary carry and parity.
 FLAG REGISTER

7 6 5 4 3 2 1 0 BIT NO.

S Z X AC X P X CY STATUS FLAGS

UNDEFINED BITS

a)Zero (Z) : If a result of an instruction has a value zero, this flag is set, otherwise it is
reset.
b)Sign (S) : If the MSB of the result of the operation has value 1, this flag is set, otherwise
it is reset.
c)Carry (CY) : If the instruction resulted in a carry (from addition) or a borrow (from
either the subtraction or comparison), out of the higher order bit, this flag is set,
otherwise it is reset.
d)Auxiliary carry (AC) : This flag holds carry out of bit three to bit four resulting from
the execution of an arithmetic operation, it can set or reset.
e)Parity (P) : This flag is set, when the result of the operation contains even number of 1s
and is reset when there is odd number of 1s.
Bus means a group of lines on which bit appear in parallel at a time.
 1. DATA BUS

I/O Input devices

ROM RAM
Ports Output devices
µP

DATA BUS (8)

These are the lines through which instruction, data or

address of data transfer takes place between microprocessor,
memory or I/O devices.
For the 8 bit microprocessors like Intel 8085, data bus is
8 bit wide.
Bidirectional bus
2. CONTROL BUS

I/O Input devices

ROM RAM Output devices
Ports
µP
RD
Control Bus
WR

Unidirectional bus
 3. ADDRESS BUS

Address Bus (16)

µP
I/O Input devices
ROM RAM
Ports
Output devices

As the internal memory (GPR) is very small, external

memory is needed. Each memory location must have a distinct
address. Here, 216 = 65,536 (64K) memory locations can be
identified.
DEMULTIPLEXING THE AD BUS

D0 – D7

AD0 – AD7 74LS373

8085 8 bit A0 – A7
(CPU) D Latch
ALE EN

To demultiplex the address / data lines (of the µP), the processor provides a signal
called ALE (Address Latch Enable). The ALE is asserted High and then Low by the processor at
the beginning of every machine cycle. At the same time, the low byte address is given out
through AD0 – AD7 lines. The demultiplexing of address / data lines using 8 bit D – latch
74LS373 is shown in figure.
The ALE is connected to the Enable pin EN of an external 8 bit Latch. When ALE is
asserted high and then low, the addresses are latched in to the output lines of the latch. It holds
the low byte of the address until next mission cycle. After latching the address, the AD0 - AD7
lines are free for data transfer. The first T - state of every machine cycle is used for address
latching in 8085 and the remaining T – states are used for reading or writing operation.
 GENERATNG CONTROL SIGNALS

The RD signal is asserted low by the 8085 during a memory or I/O READ operation.
Similarly the WR pin signal is asserted low during a memory or I/O WRITE operation.
The IO/M, S0, S1 are output by the 8085 during its internal operations, which can be
interpreted as shown in the table below.

IO/M S1 S0 Operation performed by the 8085

0 0 1 Memory WRITE

0 1 0 Memory READ

1 0 1 I/O WRITE

1 1 0 I/O READ

0 1 1 Opcode fetch

1 1 1 Interrupt acknowledge
 The READY input can be used by the slower external
devices for obtaining extra time in order to communicate with
the 8085. The READY is made low to provide WAIT state
Clock periods in the machine cycle.
The HOLD and HLDA signals are used for the DMA
type of data transfer. The DMA controller place a HIGH on
HOLD pin in order to take control of the system bus. The
HOLD function is acknowledged by the 8085 by placing a
HIGH output on the HLDA pin.
ARCHITECTURE OF 8085
Functional Block diagram
Description of
ALU
Timing and control Unit
Instruction Register and Decoder
Register Array
Interrupt control
Serial I/O Control
Description of
ALU
Flag Register
SP
PC
 DECODING AND EXECUTING AN INSTRUCTION

Once the opcode is known, the execution cycle can occur. However, there are generally
four groups of different actions that can occur:

qTransfer of data between the CPU and memory.

qTransfer of data between the CPU and an input or output devices.

qProcessing of data, possibly involving the use of the arithmetic and logic unit.

qA control operation, in order to change the sequence of subsequent operations. These can
possibly be conditional, based on the values stored at that point within the flag register.
 µP
Internal Data Bus
Memory
3E F800
Data Bus 05 F801
F802
3E
General F803
Instruction Purpose F804
ALU Decoder reg. F805
Address Bus
BC
DE F800

RD
Control
Logic IO/M
 EXAMPLES OF SOME MNEMONICS

Mnemonic Description

MOV Moves a data value from one location to another

ADD Adds to data values using the ALU, and returns the result to
the accumulator

STO Stores the contents of the accumulator in the specified

location

END Marks the end of the program in memory

 The program instructions are stored in memory which is an external device (See the
fig. before). For executing a program in 8085, the starting address of the program should be
loaded in PC. The 8085 output the content of PC in address bus and asserts read control signal
low. Also, the PC is incremented.
Let us assume that the instruction MVI A is the first instruction of a program and that
the program is stored starting from the location F800 H. Therefore the location F800 H contains
MVI A.
Step 1 : In order to run a program the CPU first loads the starting address of the program into
one of its registers called PC. The contents of the PC are sent out through the address bus. In this
case the address would be F800 H .
Step 2 : The relevant memory locations enabled and its contents are placed in the data bus. The
content in this case is the op-code of the instruction MVI A.
Step3: The CPU reads the content of the data bus and sends it to the block called instruction
decoder. It is in this block that the instruction is identified and the sequence of events that has to
follow is decided. This process is called decoding the instruction and therefore the block is called
so.
Step 4 : As part of the follow up sequence, the instruction decoder enables the CONTROL and
TIMING unit to send out control signals.
Step5 : The instruction decoder completes the execution by setting the ALU to add the contents
of B register and A register.
 After sending out the content of the PC as in step 1 above, its content is
incremented so that it contains the address of the next instruction. Thus at any
instant, the counter stores the address of the next instruction to be executed. That is
why it is called the Program counter.

Reference:

1.Microprocessor Architecture, Programming, and applications with the 8085-

- Ramesh Gaonkar ( 5th edn.) www penram.com