Ota000004 SDH Principle Issue 2.20

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OTA000004 SDH
Principle
ISSUE 2.20 www.huawei.com
HUAWEI TECHNOLOGIES CO., LTD. All rights reserved

 Upon completion of this course, you
will be able to:
 Understand the basic of SDH
multiplexing standard
 Know the features, applications
and advantages of SDH based
equipment
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Chapter1 SDH Overview
Chapter2 Frame Structure & Multiplexing Methods
Chapter3 Overhead & Pointers

References
 SDH Principle Manual
 ITU-T G.701, G.702, G.707

Emergence of SDH
What is SDH?
---- Synchronous Digital Hierarchy
---- It defines frame structure, multiplexing
method, digital rates hierarchy and interface code
pattern.
Why did SDH emerge?

---- Need for a system to process
increasing amounts of information.
---- New standard that allows mixing
equipment from different suppliers.

Advantages of SDH ( Interfaces )
PDH SDH
Electrical interfaces Electrical interfaces

--- Only regional standards. 3 PDH --- Can be connected with existing
rate hierarchies for PDH: European PDH signals.
(2.048 Mb/s), Japanese, North American
(1.544 Mb/s).
Optical interfaces
Optical interfaces
--- Can be connected to multiple
--- No standards for optical line vendors’ optical transmission
equipments, manufacturers develop at equipments.
their will.

Disadvantages of PDH (Multiplexing methods )
 PDH : Asynchronous Multiplexing
 The location of low-rate signals in high-rate signals is neither regular nor predictable.
140 Mb/s 140 Mb/s
34 Mb/s 34 Mb/s
8 Mb/s 8 Mb/s
de-multiplexer multiplexer
2 Mb/s level by level

Not suitable for huge-volume transmission

Advantages of SDH (Multiplexing methods )
byte interleaved
byte interleaved multiplexing
multiplexing method
method
Low rate SDH to higher rate SDH One Byte from

STM-1
A STM-1 B
( STM-1→STM-4→STM-16→STM-64 )
A A A
STM-1
B …
B B B 4:1 STM-4
C
STM-1
C
C
--- Synchronous multiplexing method and
D
STM-1
flexible mapping structure
D D --- Use multistage pointer to align PDH
What about PDH? loads in SDH frame, thus, dynamic drop-
and-insert capabilities

Advantages of SDH (OAM function )
 PDH  SDH
 Weak Operation,  Abundant overheads

Administration & bytes for operation,
Maintenance function. administration and
maintenance.
About 5% of the total
bytes are being used

Advantages of SDH ( Compatibility )
PDH, SDH,
ATM, Ethernet
packing
package STM-N SDH STM-N package

network
transmit receive Processing
Processing
unpacking
PDH, SDH,
ATM, Ethernet

Comparison between SDH and PDH
Low bandwidth utilization ratio.
Signal Digital Bit Rate Channels

E0 64 kbit/s One 64 kbit/s PDH Hierarchy
E1 2.048 Mbit/s 32 E0
E2 8.448 Mbit/s 128 E0
E3 34.368 Mbit/s 16 E1
E4 139.264 Mbit/s 64 E1
Bit Rate Abbreviated SDH SDH Capacity
155.52 Mbit/s 155 Mbit/s STM-1 63 E1, 3 E3 or 1 E4

622.08 Mbit/s 622 Mbit/s STM-4 252 E1, 12 E3 or 4 E4
2488.32Mbit/s 2.5 Gbit/s STM-16 1008 E1, 48 E3 or 16 E4
9953.28Mbit/s 10 Gbit/s STM-64 4032 E1, 192 E3, 64 E4

SDH Hierarchy

SDH Frame Structure
Frame = 125 us
From ITU-T G.707:
1. One frame lasts for 125

microseconds (8000
123456789
frames/s)
2. Rectangular block structure
9 rows and 270
9 rows
columns(STM-1)
3. Each unit is one byte (8
bits)
4. Transmission mode: Byte
by byte, row by row, from
left to right, from top to
bottom 270 Columns
Bit rate of STM-1= 9*270*8*8000

SDH Frame Structure
Frame = 125 us
123456789
Three parts RSOH
AU-PTR Information
9 rows
Payload
MSOH
270 Columns

SDH Frame Structure
Information Payload
√ Also known as Virtual Container level 4 (VC-4)
√ Used to transport low speed tributary signals
√ Contains low rate signals and Path Overhead (POH)
√ Location: rows #1 ~ #9, columns #10 ~ #270
LPOH, TU-PTR
RSOH
package
AU-PTR
HPOH
9 rows Payload low rate signal
MSOH package
LPOH, TU-PTR
9 1 Data
package
270 Columns
SDH Frame Structure
Section
Section Overhead
Overhead
Functions : Fulfills the section layer OAM

Types of Section Overhead
123
RSOH
1. RSOH monitors the regenerator
section
56789
AU-PTR Information
9 rows 2. MSOH monitors the
Payload multiplexing section
MSOH Location:
1. RSOH: rows #1 ~ #3,
columns #1 ~ #9
2. MSOH: rows #5 ~ #9,
9
columns #1 ~ #9
270 Columns

SDH Frame Structure
AU-PTR
RSOH
Function:
Indicates the first byte of VC4
4 AU-PTR Information 9 rows
Location:
Payload
row #4, columns #1 ~ #9
MSOH
J1
270 Columns

SDH Multiplexing Method
 SDH Multiplexing includes:
 Low to high rate SDH signals ( STM-1  STM-N )

 PDH to SDH signals ( 2M, 34M & 140M  STM-N )
 Other hierarchy signals to SDH Signals ( IP  STM-N )
 Some terms and definitions:
 Mapping
 Aligning
 Multiplexing

SDH Multiplexing Structure
×1 ×1 AU-4-64c VC-4-64c C-4-64c
STM-64 AUG-64
×4
×1 ×1
STM-16 AUG-16 AU-4-16c VC-4-16c C-4-16c
×4
×1 ×1
STM-4 AUG-4 AU-4-4c C-4-4c
VC-4-4c
×4
×1
×1
STM-1 AUG-1 AU-4 VC-4 C-4 139264 kbit/s
×3
Mapping ×1
TUG-3
Aligning TU-3 VC-3 C-3 34368 kbit/s
×7
Multiplexing
TUG-2
Pointer processing
TU-12 VC-12 C-12 2048 kbit/s

Go to glossary ×3

SDH Tributary Multiplexing (140M)
140 Mbit/s to STM-N
C4 VC4
1
1
H
Rate Add HPOH P Next
140M
adaptation page
O
H
9 Mapping 9
1 260 261
1
125 μs 125μs

AUG-1 1 STM-1 270
10 270
RSOH
Add Info
AU-PTR AU-4 Add
AU-PTR AU-PTR Payload
×1 SOH
MSOH
9
Aligning Multiplexing
1 STM-N
AUG-N 270X N
One STM-1 frame can load only one 140Mbit/s Add

Signal SOH
9

34 Mbit/s to STM-N
C3 VC3
1 1
L
34M Rate Add LPOH P Next
Adaptation page
O
H
9 9
1 84 Mapping 1 85
125μs 125μs

TU-3 TUG-3 VC-4
1 86 1 86 1 3 261
1 1 1
H1 H1
H2 H2
H3 H3 P
Fill
1st ×3 O R
gap R
align H
R
9 9 9
Aligning Multiplexing Same

procedure
as 140M

2 Mbit/s to STM-N
VC12 TU12
C12
1 4 1 LPOH 4 1 4
1 1 1
Rate Add Add Next

2M
Adaptation LPOH TU-PTR page
9 9 9
125μs Mapping Aligning TU-PTR

TUG-2 TUG-3
1 12 1 86
1 1
R R
×3 ×7
9 9
Same
Multiplexing Multiplexing
procedure
as 34M

Questions
 What are the main parts of SDH Frame structure?
 What is the transmission rate of STM-4?How to calculate?

Glossary
 Mapping - A process used when tributaries are adapted into VCs by

adding POH information
 Aligning - This process takes place when a pointer is included in a

Tributary Unit (TU) or an Administrative Unit (AU), to allow the 1st byte of
the VC to be located
 Multiplexing - This process is used when multiple low-order path signals

are adapted into a higher-order path signal, or when high-order path
signals are adapted into a Multiplexing Section
Back

Glossary
 C = Container
 VC = Virtual Container
 TU = Tributary Unit
 AU = Administrative Unit
 TUG = Tributary Unit Group
 AUG = Administrative Unit Group
 STM = Synchronous Transfer Module
 POH = Path Overhead
Back


Section Overheads
R A1 A1 A1 A2 A2 A2 J0
S
O B1 ∆ ∆ E1 ∆ F1
H
D1 ∆ ∆ D2 ∆ D3
AU-PTR
B2 B2 B2 K1 K2
M D4 D5 D6
S D7 D8 D9
O
H D10 D11 D12
S1 M1 E2
STM-1 ∆ = Media dependent bytes

A1 and A2 Bytes
 Framing Bytes – Indicate the beginning of the STM-N frame
 A1 = f6H (11110110), A2 = 28H (00101000)
 In STM-N: (3XN) A1 bytes, (3XN) A2 bytes
STM-N STM-N STM-N STM-N STM-N STM-N
Finding frame head

A1 and A2 Bytes
Framing
N
Find
A1,A2
OOF
Y
over 3ms
LOF
Next AIS
process

D1 ~ D12 Bytes
 Data Communications Channels (DCC) Bytes
 RS-DCC – D1 ~ D3 – 192 kbit/s ( 3X64 kbit/s )

 MS-DCC – D4 ~ D12 – 576 kbit/s ( 9X64kbit/s )
NE NE NE NE
DCC channel
TMN OAM Information: Operation, Administration and
maintenance

E1 and E2 Bytes
 Orderwire Bytes
 E1 – RS Orderwire Byte – RSOH orderwire message

 E2 – MS Orderwire Byte – MSOH orderwire message
NE NE NE NE
E1 and E2
Digital telephone channel

E1-RS, E2-MS

B1 Byte
 Bit interleaved Parity Code (BIP-8) Byte –
 A parity code (even parity), used to check the

 transmission errors over the RS
 B1 BBE is represented by RS-BBE( performance event)
B1 STM-N B1 STM-N
Tx Rx
A1 00110011
A2 11001100
A3 10101010
BIP-8 Calculate 2#STM-N
A4 00001111 1#STM-N
BIP-8= A
B 01011010 Calculate
2#STM-N B1=A 1#STM-N
BIP-8=A1
Verify A1&A→B1 BBE

B2 Byte
 Bit interleaved Parity Code (MS BIP-24) Byte
 BIP-24 is used to check the bit errors over the MS

 B2 BBE is represented by MS-BBE( performance event)
 The mechanism of B2 is same as B1

M1 Byte
 Multiplexing Section Remote Error Indication Byte
 A return message from Rx to Tx ,when Rx find B2 bit errors

 A count of BIP-24xN (B2) bit errors
 Tx generate corresponding performance event MS-FEBBE
Traffic
Tx Rx
Generat Return
e M1Find B2 bit
MS- errors
FEBBE Generate MS-
MS-REI BBE
K1 and K2 (b1-b5)
Automatic Protection
Switching (APS) bytes
Transmitting APS protocol
Used for network multiplexing

protection switch function

K2 (b6 ~ b8) Start
 Rx detects K2 (b6-
b8)="111" generate MS- Detect
AIS alarm K2 110
(b6-b8)
 Rx detects K2 (b6-
b8)="110" generate MS- 111
RDI alarm
Generate
MS-AIS
Return Generate
MS-RDI MS-RDI

S1 Byte
 Synchronization Status Message Byte (SSMB): S1
 (b5~ b8)
 Value indicates the sync. level
bit 5 ~ 8 Description
0000 Quality unknown (existing sync. Network)
0010 G.811 PRC

0100 SSU-A (G.812 transit)
1000 SSU-B (G.812 local)
1011 G.813 (Sync. Equipment Timing Clock)
1111 Do not use for sync (DNU).

Path Overheads
1 2 3 4 5 6 7 8 9 10
J1
VC-n Path Trace Byte
B3
Path BIP-8
C2
Path Signal Label
G1
Path Status
F2
Path User Channel
H4
TU Multiframe Indi
F3
Path User Channel
K3
AP Switching
N1
Network Operator
Higher Order Path Overhead

Path trace byte: J1
Detect J1
 > The first byte of VC-4
 > User-programmable
 > The received J1 should

match with the expected J1 N Y
Match
Next
HP-TIM process

B3 Byte
 Path bit parity
 code byte (even parity code)

Verify B3
 Used to detect bit errors
 Mechanism is same as B1and B2
N Y
correct
HP-BBE Next
process

Signal label byte: C2
Detect C2
 > Specifies the mapping type in

the VC-n
 > 00 H  Unequipped N Y
00H
 02 H  TUG structure
Y N
 13 H  ATM mapping Match HP-UNEQ
 The received C2 should
match with the expected C2
Next HP-SLM
process
Insert AIS
downward

Path Overheads
Low Order Path Overhead
1 4
1 V5 J2 N2 K4
VC-12 VC-12 VC-12 VC-12
9
500μs VC-12 multiframe

Path Overhead Bytes
 V5
 > First byte of the multiframe
 > Indicated by TU-PTR
 Functions: Error checking, Signal Label and Path Status of VC-12
 b1- b2  Error Performance Monitoring (BIP-2)

 b3  Return Error detected in VC-12 (LP-REI)
 b4  Return Failure declared in VC-12 (LP-RFI)
 b5 ~ b7  Signal Label for VC-12
 b8  Indicate Defect in VC-12 path (LP-RDI)

Pointers
Pointers
AU-PTR TU-PTR

AU-PTR

TU-PTR
1 4
1
VC-12 VC-12 VC-12 VC-12
9 V1 V2 V3 V4
500μs VC-12 multiframe
TU POINTERS

Questions
 Which byte is used to report the MS-AIS and MS-RDI?
 What is the mechanism for R-LOF generation?
 Which byte implements the RS(MS/HP) error monitoring?

 SDH Overview
Summary
 SDH Frame Structure & Multiplexing
Methods
 Overhead & Pointers

Thank You
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ISSUE 2.20 www.huawei.com

HUAWEI TECHNOLOGIES CO., LTD. All rights reserved

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Chapter2 Frame Structure & Multiplexing Methods

Chapter3 Overhead & Pointers

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 SDH Principle Manual

 ITU-T G.701, G.702, G.707

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Why did SDH emerge?

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Electrical interfaces Electrical interfaces

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140 Mb/s 140 Mb/s

2 Mb/s level by level

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Low rate SDH to higher rate SDH One Byte from

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 Weak Operation,  Abundant overheads

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package STM-N SDH STM-N package

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Signal Digital Bit Rate Channels

Bit Rate Abbreviated SDH SDH Capacity

155.52 Mbit/s 155 Mbit/s STM-1 63 E1, 3 E3 or 1 E4

9953.28Mbit/s 10 Gbit/s STM-64 4032 E1, 192 E3, 64 E4

Chapter2 Frame Structure & Multiplexing Methods

Chapter3 Overhead & Pointers

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1. One frame lasts for 125

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9 rows Payload low rate signal

Functions : Fulfills the section layer OAM

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 SDH Multiplexing includes:

 Low to high rate SDH signals ( STM-1  STM-N )

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TU-12 VC-12 C-12 2048 kbit/s

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140 Mbit/s to STM-N

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One STM-1 frame can load only one 140Mbit/s Add

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TU-3 TUG-3 VC-4

Aligning Multiplexing Same

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Rate Add Add Next

125μs Mapping Aligning TU-PTR

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 What are the main parts of SDH Frame structure?

 What is the transmission rate of STM-4?How to calculate?

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 Mapping - A process used when tributaries are adapted into VCs by

 Aligning - This process takes place when a pointer is included in a

 Multiplexing - This process is used when multiple low-order path signals

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 TUG = Tributary Unit Group