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Syllabus
Unit I: Computer Architecture and Arithmetic (7 Hours)
Computer Architecture, Von Neumann Architecture, Functional Units, Basic Operational Concepts, Performance, Processor organization, Bus Structure, Register Organization, Instructions and Instruction Sequencing, Addressing Modes. Arithmetic: Multiplication of positive numbers, Signed Operand Multiplication, Booths Algorithm, Fast multiplication, Integer Division, Floating point Numbers and Operations, IEEE standards, Floating point arithmetic.
Syllabus
Unit II: The Central Processing Unit (7 Hours)
Basic Processing Unit: Single Bus Organization, Register Transfer, Performing an arithmetic or logic operation, Fetching and storing word from/to memory, Execution of complete instruction, branch instruction, Multi-bus Organization. Hardwired Control: Design methods State table and classical method, A complete Processor, Microprogrammed Control: Microinstructions, micro- program sequencing, wide branch addressing, microinstructions with next address field, perfecting microinstructions, emulation.
Syllabus
Unit III: Input-Output and Memory Organization (7 Hours)
I/O Organization: Accessing I/O devices, Interrupts: Interrupt Hardware, enabling and disabling interrupts, handling multiple requests, Controlling devices, exceptions, Interface circuits, Standard I/O Interfaces: PCI, SCSI, USB. The Memory System: Memory Hierarchy, Internal organization of memory chips, Cache memory, Performance Considerations, Virtual Memories
Syllabus
Unit IV: Introduction to 16 bit microprocessor (7 Hours)
The 8086 microprocessor, architecture of 8086, pin diagram, programming model of 8086. Logical to physical addressing, addressing modes, Instruction set, interrupt structure, 8086 Assembly language programming.
Syllabus
Unit V: Introduction to 32 bit microprocessor (7 Hours)
The 80386 microprocessor, Features and Architecture, Pin Description, Functional Description, Register Set. Programming model of 80386: real mode, protected mode and virtual mode, paging and segmentation, Multitasking, Interrupts, Exceptions and I/O
Syllabus
Unit VI: Parallel Architectures and ARM (7 Hours)
Parallel architectures, classification, Instruction level pipelining and Superscalar Processors, The structure of general purpose multiprocessor, Multiple Processor Organizations, Closely and loosely coupled multiprocessors systems. Advanced RISC Machines (ARM): Introduction to RISC, Instruction execution, characteristics, RISC architecture and pipelining, RISC Vs CISC.
Brief History: From ENIAC (Electronic Numerical Integrator and Computer) John Mauchly and John P Eckert, University of Pennsylvania (1943 - 1946) For war purposes, ballistic trajectory Weighted 30 tons, consumes 140 kwatts of electric power, 15,000 square feet of space, only 5000 addition per second Not a digital computer, it was a decimal computer (analog)
ENIAC
ENIAC
ENIAC - details Decimal (not binary) 20 accumulators of 10 digits Programmed manually by switches 18,000 vacuum tubes 30 tons 15,000 square feet 140 kW power consumption 5,000 additions per second
von Neumann Stored Program concept Main memory storing programs and data ALU operating on binary data Control unit interpreting instructions from memory and executing Input and output equipment operated by control unit Princeton Institute for Advanced Studies
IAS
COMPUTER TYPES
Classification #1: Micro Computers Mini Computers Mainframes Super Computers Classification #2: Analog Computers Digital Computers Hybrid Computers More General Classification: General Purpose Computers Special Purpose Computers
Computer Types
Thus todays computer types and classification is based purely on their mode of usage & portability. (From the view point of an average end user)
Interconnections
The computer types based on their interconnection usage, sharing
of resources, multi-user, multiprocessors, remote access like operating environments - includes Distributed Computers Parallel Computers
These two categories encompass:
DeskTop PCs
As its name suggest desktop PC contains CPU box, display unit, keyboard, including speaker and a mouse which can all be housed on an office desk or a home table in the form of 3-box structure in two models viz Table Top model and Tower model CPU cabinets. They are stand alone computer systems & found their fullest usage in homes, schools, colleges, banks, offices.
LapTop PCs
Powerful slim mobile PCs which are compact form of personal computers and intended to replace the heavy desktop PCs High-resolution graphics i.e. LCD display, their weighing range between 2 to 2.5Kgs., optical drive for CD-ROMs, DVDs and compact hard drives while retaining good-sized keyboard. All its units are housed in a single thin, tiny briefcase like structure.
PalmTop PCs
All kinds of hand held computers including Pocket PC, Tablet PCs, Mobile electronic gadgets, PDAs, e-books, Notepads, Mobile phones with internet Browsing facilities fall in this category. Limited Battery Powered, Rechargeable, tiny toy like consumer electronic devices the palm top PC. Touch and feel are more crucial here while operating with limited storage and computational power.
Workstations
Workstations are industry standard desktop computers with more computational power and high-resolution graphic display with variety of graphic input/output capability. Workstation PCs are usually employed in the applications of Computer Aided Design and Drafting (CADD). Simulation & Modeling, Interactive Graphic design, Multimedia and other engineering applications.
Servers
A server computer is a derivative of either Mainframe or Workstation PC. It can be a powerful desktop PC interconnected in a LAN as Server. Many corporate offices are replacing their enterprise systems with simple and affordable Local Area Network (LAN) of Desktop PCs. Where in there is a Single Server PC and a few Client PCs, all are interconnected ! Examples of Servers: File Server, Database Server, Print Server, Message Server /mail server, Web Server,
Super Computers
One of the fastest computers type currently available, They are problem scalable. Computational speed of a super computer is measured interms of Floating Point Operations Per Second or FLOPS. Examples: Cray X/MP-14 , Param 8000, Param - Padma
FUNCTIONAL UNITS
A computer in its simplest form comprises five functional units: 1) Input Unit 2) Output Unit 3) Memory Unit 4) Arithmetic & Logic Unit 5) Control Unit
Processor or CPU
I /O
Functional Units
Input Unit
Computer accepts encoded information through input unit. The standard input device is a keyboard of a video monitor or terminal. Whenever a key is pressed, keyboard controller sends the scanned code of that letter, digit or symbol to CPU/Memory. Examples include Mouse, Joystick, Trackerball, Lightpen, Tablet or Digitizer, Scanner etc.
Memory Unit
Memory unit stores the program instructions, data operands on and results of computations etc. Memory unit is classified as:
1. Primary /Main Memory 2. Secondary /Auxiliary Memory 1. Primary memory is a semiconductor memory that provides access at electronic speed. Run time program instructions and operands are stored in the main memory. It contains a large number of semiconductor storage cells.
Memory Unit
Main memory is classified again as RAM and ROM. RAM is termed as Read/Write memory or user memory that holds run time program instruction and data. ROM holds system programs and firmware routines such as BIOS, POST, I/O Drivers that are essential to manage the hardware of a computer.
RAM
ROM
Memory Unit
2. Secondary /Auxiliary Memory:
While primary storage is essential, it is volatile in nature (i.e. its contents will be lost in the absence of power) and expensive too. Additional requirement of memory would be supplied as auxiliary memory at cheaper cost. Secondary memory are magnetic memories viz Floppy disk, Hard disk, Magnetic tape, CD-ROM etc. Secondary memories are non volatile in nature (contents will not be lost in the absence of power).
Output Unit
Computer returns the computed results, error messages, etc., via output unit. The standard output device is a video monitor, LCD/TFT monitor.
Other output devices are printers, plotters to take a paper copy of the results, programs, graphs called print out or a hardcopy Printers types: Dot Matrix printer, Inkjet printer, Laser printer. . .
Control Unit
Control unit co-ordinates activities of all units by issuing
govern the data transfers as to when the appropriate operation must take place. Control unit interprets or decides the operation/action to be performed.
ALU
0 1 FLAGS 15
CPU
Control
ALU
Performance
The total time required to execute an application program is the most important measure of performance for a computer. Performance is also affected by features like the compiler design, machine language instruction set of the computer, the hardware design of that computer For a best performance, there must be co-ordination among
Compiler Design
Instruction Set
Computer Hardware.
Performance
1. To increase speed of processing, a high-speed memory called a cache memory is used to contain run time programs and frequently accessed data values. MAIN MEMORY CACHE MEMORY PROCESSOR
3. The cache memory is employed in computer systems to overcome the mismatch in operating speeds of processor and main memory (slower access time).
Processor Clock
The performance of a processor and hence operating speed of a todays desktop PCs and workstation computers is usually specified as Clock rate viz Intel Celeraton processor @850 MHz (Mega Hertz), Intel Pentium PIV processor @ 2.4GHz (Giga Hertz) and so on.. The term cycles per second used to measure clock rate is termed as Hertz (Hz). The Clock rate R can be given as R=1/P which is similar to f=1/T where in P or T is length or duration of timing signal called clock period or simply clock cycle The duration T or length P of one clock cycle plays a key role in determining processor performance. The inverse of P or T is the clock rate R or f which is measured in cycles per second (frequency or clock frequency)
Processor Clock
In general, processor circuits in a PC are controlled by clock generator IC (say 8284) which is coupled with a crystal (Crystal Oscillator Circuit). This clock generator defines uniform time intervals called clock period or T-states. In order to execute a machine language instruction, usually 4 to 6 T-states or clock cycles are required Usually 1 T-state or clock period refers to 1 micro second duration , 1 nano second, etc. depending upon the processors clock rate.
Clock Rate
How do you enhance the clock rate R for a processor ?
Clock frequency of a processor can be improved in a straight forward manner i.e. if and only if processors semiconductor (IC) fabrication technology incorporates very high speed logic circuits. This gives a better performance ratio by reducing clock period P for completing basic steps of actions and thus increasing the clock rate R.
The other way to improve clock rate R is to minimize the amount of work done in each and every basic step of action (micro instructions operation). This will reduce clock period P and enhances R the clock rate.
Performance Measurement
It is the time a computer require to execute a given benchmark program. Benchmark refers to standard task used to measure how well a device or computer or processor operates. To evaluate the performance of Computers, a non-profit organization known as SPEC-System Performance Evaluation Corporation employs agreed-upon application programs of real world for benchmarks. Accordingly, it gives performance measure for a computer as
Running time on a Reference Computer SPEC Rating = Running time on a test Computer
Performance Measurement
A benchmark program from a suite of benchmark program will be selected and compiled for test computer. The same benchmark program will be compiled and executed on one of the typical computer which be selected as a Reference Computer For instance, a SPEC rating 20 indicate that a test computer is 20 times faster than the chosen reference computer for a particular benchmark program.
Processor Organization
Processor Organization
IAS components are :
MDR or MBR (memory data register or memory buffer register), MAR (memory address register), IR (instruction register), IBR (instruction buffer register), PC (program counter), AC (accumulator and MQ (multiplier quotient), memory (1000 locations) 20 bit instruction : 8 bit op-code, 12 bit address (addressing one of 1000 memory locations - 0 to 999) 39 bit data (with sign bit - 1 bit) Operations : data transfer between registers and ALU, unconditional branch, conditional branch, arithmetic, address modify
Processor Organization
Execution steps of
ADD R1, R2
The possible micro-execution steps are : a. b. c. d. ALU1 n [R1] ALU2 n [R2] ADD R1 n [ALU3]
{content of R1 is moved to ALU1} {content of R2 is moved to ALU2} {content of ALU1 + ALU2 = ALU3} {Result of add is moved to R1}
If each micro-step is executed in one clockcycle, then this ADD instruction needs 4 clockcycles
Processor Organization
Control Unit To/from memory
IR PC MAR MBR R1
ALU3 BUS
Processor Organization
Control Unit To/from memory
IR PC MAR MBR R1
ALU2
BUS
[R2]
Processor Organization
Control Unit To/from memory
IR PC MAR MBR R1
ADD
BUS
Processor Organization
Control Unit To/from memory
IR PC MAR MBR R1
R1
BUS
[ALU3]
Dual processor-bus : A way to improve speed 1. ALU1 n [R1] (bus1) ALU2 n [R2] (bus2) 1 2
Other components (Control Unit, IR,PC, MAR,MBR)
What is Bus?........ A bus is a collection of wires that connects different parts of a computer in an organized manner for the purpose of communicating information such as memory address, I/O address, Data, Control bits etc.
With the bus structure, speed of operation can be achieved since collection of wires in a bus permits for transferring all bits of information at a time i.e., in parallel. One byte or one full word at a time simultaneously on different wires.
of data transfer on a bus, slow speed peripheral devices are equipped with a buffer register.
A buffer register holds data temporarily. Buffer register
compensate the timing differences among processor, memory and slow speed peripherals like Printer, Key-board, magnetic tape etc., during the transfers over a common communication path i.e., single bus.
Registers CPU must have some working space (temporary storage) Called registers Number and function vary between processor designs One of the major design decisions Top level of memory hierarchy
Addressing
Segment
How Many GP Registers? Between 8 - 32 Fewer = more memory references More does not reduce memory references and takes up processor real estate See also RISC
How big? Large enough to hold full address Large enough to hold full word Often possible to combine two data registers
C programming double int a; long int a;
Control & Status Registers Program Counter Instruction Decoding Register Memory Address Register Memory Buffer Register
Program Status Word A set of bits Includes Condition Codes Sign of last result Zero Carry Equal Overflow Interrupt enable/disable Supervisor
etc., and registers of I/O subsystem may be designated as DATAIN, DATAOUT etc.
MOVE M, R0,
Register
Memory Location
Suggests : SUM
Memory Location
[R1]
Means
: LOC [B]
R1 [R2]
R1
[R1] + [R3]
Suggest to add contents of register R1 and register R3 and rewrite the R1 contents to store the sum.
All such notations with leftward arrow ( ) assignment operations involving register locations give rise to what is known as Register Transfer Notation
Consider R1 [R1] + [R3] Equivalent Assembly Language instruction is Add R3, R1. Here the operation Code Mnemonic is Add Register Locations R1, R3 represent operand fields Similarly, in the instruction
Opcode
i.e.
SUM
[SUM] + [R1]
To perform
structure called push down stack to store operands. In such computer machines it is possible to use instructions that contain only operation codes and no explicit operands.
The name Zero address specifies the absence of an address field
NOP in 8085
[R0] + [Q]
Instructions of a given program are fetched one at a time in the increasing order of their memory addresses. This kind of instruction fetching in sequence (one at a time for execution ) is known as straight line sequencing Instruction execution can be carried out as two step process viz. # Instruction Fetch cycle. # Instruction Execute cycle.
Branching
Consider branch instruction in a program:
Condition Codes
The data conditions or status, after an arithmetic or logical
operation are indicated by setting or clearing the flip flops called flags or condition codes.
Each flip-flop holding a data condition code is a one bit storage
Condition Codes
Many of the processors include the following four flags: Z - Zero flag bit is set to 1 if the result is 0; N - Negative flag bit is set to 1 if the result is negative; C - Carry flag bit is set to 1 if result generates a carry bit V - Overflow flag bit is set to 1 if arithmetic overflow occurs Pentium processor makes use of following condition codes:
C (carry flag) P (parity flag) A (Auxiliary carry flag) Z (zero flag) S (sign flag) O (over flow flag)
Instruction Format
The addressing mode specifies a rule or method for interpreting or modifying the address field of the instruction before the operand is actually accessed for manipulation. It is concerned with the different ways in which the location of an operand can be specified in a given instruction. Various schemes for specifying addresses of operands in an instruction have been introduced. Such schemes are collectively known as Addressing Modes.
Addressing Modes:
Immediate mode Register mode Absolute (Direct) mode Indirect mode Indexed mode Relative mode Auto increment mode Auto decrement mode
A common convention say, a pound symbol # has to precede the value of an immediate operand Move #50, R0
Load P Store S
a memory word in which effective address or actual address of the operand is found.
By referring to this address (EA), the required operand
A = 1040 = X; constant X corresponds to a memory location i.e. Index or offset value (R) = 20 EA = A + (R) = 1040 + 20 EA = 1060 at which you will find desired operand 50
Advantages of Index mode is the flexibility it offers to access relative memory locations Disadvantages of Index mode * Is the complexity of computing effective address. * The instruction requires to have two address fields at least one of which is an explicit number.
operand to be located.
Its like index mode only but program counter register PC
X(PC)
Effective address is
EA = [ PC ] + X
Add (R2), R0
It allows accessing of operands in decreasing order of
memory address..
Addressing Modes
Advantages of Addressing modes :
To be able to reference large number of memory location in main memory or for some system in virtual memory. To reduce number of bits in the address field of an instruction To extend programming convenience to the user / programmer by providing such facilities as indexing of set of data values, counters for loop control, pointers to memory locations