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Control logic
Driving mechanisms. Sensors. Control logic. Power supplies. Indicators and displays. Driving mechanism motors motors
Driving mechanism
Forward motion :
12V ML
12V MR
M1
M2
Boat
M3 M4
MX
MX
MX
Right turn:
12V ML
0V MR
M1
M2
Boat
M3 M4
MX
MX
MX
Left turn:
0V ML
12V MR
M1
M2
Boat
M3 M4
MX
MX
MX
Stop :
0V ML
0V MR
M1
M2
Boat
M3 M4
MX
MX
MX
Reverse motion :
-12V ML
-12V MR
M1
M2
Boat
M3 M4
MX
MX
MX
Control logic
ML
MR
M1
M2
MX
MX
R
Motors In on state
MX
Left turn:
Control logic
ML
MR
M1
M2
MX
MX
R
Motors In on state
MX
MG3 VCC 5V f or motor 2 1 U4 VCC 5V MOTOR DC 3 6 OUT1 11 OUT2 14 OUT3 OUT4 1 2 IN1 7 IN2 10 IN3 15 IN4 1 EN1 9 EN2 8 VS 16 VSS L293D GND GND GND GND
Control Logic
(H-bridge):
2
MG4
M1
M2
MOTOR DC
Motor 1 Enable
H-bridge
Motor 2 Enable
Motor 1 controls
Motor 2 controls
A B
13 12 5 4
H-bridge operation:
VCC
GND
VCC
1 1
GND
VCC
1 1
GND
VCC
1 1
GND
VCC
1 1
GND
VCC
M + -
1 1
GND
VCC
0 1
GND
VCC
0 1
GND
VCC
0 1
GND
VCC
0 1
GND
VCC
M + 0 1
GND
H-bridge IC (L293D):
2
MG3 VCC 5V f or motor 1 U4 VCC 5V MOTOR DC 3 6 OUT1 11 OUT2 14 OUT3 OUT4 1 GND GND GND GND 13 12 5 4 2 IN1 7 IN2 10 IN3 15 IN4 1 EN1 9 EN2 8 VS 16 VSS L293D
MG4 2
MOTOR DC
Two h-bridgs contained in single package. 600ma output current capability per channel. 1.2a peak output current (non repetitive) per channel. Separate supply input for motor and H-bridge.
PWM stands for pulse width modulation. Width of the pulse is varied in accordance with modulating signal.
Speed will be maximum when a pulse with 100% duty cycle wave is used, Speed will be minimum when a pulse with 0% duty cycle wave is used, Speed can be varied by varying the duty cycle of the pulse, (This pulse will be used to drive the enable signal in H-bridge) Differential gearing can be implemented by applying two pulses with different duty cycle to motor enable pins in h-bridge.
Controllers :
Sensors :
IR Sensor :
VCC TSOP IR LED 1 2 3 VCC
To control logic
0
VCC 56E U5 7 5 4 6 2 8 DSCHG CV RST THR TRG VCC LM555 GND OUT 3
27K
3.9K
0.001uf
0.01uf
The TSOP will detect the IR light in a specific frequency. The astable multivibrator is designed to oscillate in the operating frequency of TSOP.
VCC
400E
VCC
An op-amp operating in the comparator mode can be used to pick the voltage variations across the LDR. The voltage variations across the LDR is compared with a threshold level set by a voltage divider.
Line Followers
Control logic
Sensor array
M1 M2
Place sensors depends on the turning radius of the boat. Reduce the speed if possible it will increase the stability. Try to use IR sensors, they are more stable than visible light sensors and free from external noise. Try to use differential gearing concept.
Sensor arrangement:
M1
M2
M1
M2
M1
M2
M3
M4
M3
M4
M3
M4
Concept:
S1 0 1 1
S2 1 1 0 1 0 0
L
S1 S2 S3
0 0 0
S1 0 1 1 0 0 0
S2 1 1 0 1 0 0
R
S1 0 1 1 0 0 0 S2 1 1 0 1 0 0 S3 0 0 0 1 1 0 F.W L.T L.T R.T R.T STOP
S1 0 1 1 0 0 0
S2 1 1 0 1 0 0
S1 0 1 1 0 0 0
S2 1 1 0 1 0 0
S1 0 1 1 0 0 0
S2 1 1 0 1 0 0
VCC
Circuit implementation :
0
VCC 56E U10 3 OUT DSCHG CV RST THR TRG VCC LM555 7 5 4 6 2 8
27K
GND
3.9K
0.01uf
0.001uf
0
VCC TSOP1 1 2 3 IR LED VCC
0
3 OUT DSCHG CV RST THR TRG VCC LM555 2 1 U12 MOTOR DC 3 6 11 14 OUT1 OUT2 OUT3 OUT4 IN1 IN2 IN3 IN4 EN1 EN2 GND GND GND GND VS VSS L293D 2 7 10 15 1 9 8 16 1 2 3 4 5 6 7 8 21 22 23 24 25 26 27 28 30 29 VCC 12V VCC 5V 89S52 P1.0/T2 P1.1/T2X P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 ALE/P PSEN GND 40 U9 VCC P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 INT0 INT1 RD RXD T0 T1 TXD WR X1 X2 EA/VP RST 39 38 37 36 35 34 33 32 12 13 17 10 14 15 11 16 0.01uf 3 0.001uf 3 7 5 4 6 2 8
27K3
3.9K3
MG6 2 1
0
VCC TSOP2 1 2 3 IR LED VCC
MOTOR DC
13 12 5 4
0
19 18 31 9 CAP Y3 RESISTOR 12MHz C6 33PF C5 33PF 0.01uf 4 0.001uf 4 1 10K1 3 VCC 1*10^-6 F1 s w5 RST GND OUT DSCHG CV RST THR TRG VCC LM555 7 5 4 6 2 8
27K4
20
3.9K4
Steps involved in system design : Step1 : Construct a block diagram of the system. Step2 : List down the needed resources needed. Step3 : List down the available resources. Step4 : Do a rough Design. Step5 : Compare the needed resources with available. Step6 : Change the design so that the unavailable resources can be reduced ( or try to implement any alternate method). Step7 : Simulate the design using EDA(Electronics design automation) tools. Step8 : Physical implementation. Step9 : Use printed circuit boards so that physical error can be reduced.
Example:
Automatic fault detection in street lights:
Detects the faults occurring in street lights and informs it in the central control station. Design : Step1 : Construction of Block diagram.
Display
Test zone
Test samples
Controllers
Step2 : Needed resources. 1. 2. Status of the every street lights should be checked continually, for that we need that much of I/O ports. Voltage synthesizers must be used to convert the test sample voltage to the controllers compactable level.
Step3 : Available resources. 1. 2. Comparators can be used to convert the test sample voltages to controller compactable level. Limited number of I/O ports are available in controllers.
Step4: Rough design. 1. 2. Controllers I/O ports are used to sample the status of the street lights. Controller continually checks it I/O ports if it found anything goes wrong it will display it.
Step5 : Compare the needed resources with available. 1. The controllers I/O ports will not be sufficient to sample all the test voltages,
Test zone
Test samples
MUX
Controllers
Circuit implementation :
1 2
J2 J8 connector 1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
10
ONT
ST2
40
24
1*10^-6 F1 31 9
GN
GN
10 1 12 Hz 3 33PF
SISTO
20
12
sw4 ST
/ P ST
P Y2
4 33PF
19 18
X1 X2
L /P PS N
30 29
G 74150
X T0 T1 TX W
12 13 17 10 14 15 11 16
INT0 INT1
21 22 23 24 25 26 27 28
39 38 37 36 35 34 33 32
1 2 3 4 5 6 7 8
10
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
89S52
8 8 7 6 5 4 3 2 1 23 22 21 20 19 18 17 16 15 14 13 11 9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
ONN
J9
P LL
T 16
POW J4
S PPLY 5
Step7 : Simulation 1. Hardware simulation : PSpice, multisim, circuit maker, etc capture for schematic, layout plus for PCB,etc
1.
Software simulation : Keil, RIDE for 8051 family. MP lab, micr C for PIC.
J10 ANTENNA
J8 ANTENNA
VCC
16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
4 3 2 1
1 2 3 4 5 6 7 8
5V 5V 5V SW6 24 24 1 2 3 4 5 6 7 8 9 10 11 13 14 15 16 23 22 21 20 19 18 17 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 13 14 15 16 23 22 21
39 38 37 36 35 34 33 32 12 13 17 10 14 15 11 16 VCC 1*10^-6 F1 330K s 7 RST CAP Y2 10K1 RESISTOR 12MHz C3 33PF C4 33PF 19 18 31 9
40
U2
89S52 P1.0/T2 P1.1/T2X P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 ALE/P PSEN GND 1 2 3 4 5 6 7 8 21 22 23 24 25 26 27 28 30 29
P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 INT0 INT1 RD RXD T0 T1 TXD WR X1 X2
VCC
SW DIP-8 330K R4
GND
12
12
GND
20
18L4
18L4
VCC VCC 2 IR LED VCC 56E1 U6 7 5 4 6 2 8 3.9K1 DSCHG CV RST THR TRG VCC LM555 OUT 3 1 2 3 TSOP1
13 12 5 4
27K1
GND
0.001uf 1
0.01uf 1 Size B
I1 O1 I2 O2 I3 O3 I4 O4 I5 I6 I7 HT640 I8 I9 I10 I11 I12 I13 I14 I15 I16 I17 I18
O1 O2 O3 O4
I1 I2 I3 I4 I5 I6 HT648 I7 I8 I9 I10 I11 I12 I13 I14 I15 I16 I17 I18
VCC
R3
EA/VP RST
VCC
MG3 VCC 5V f or motor 2 1 U4 VCC 5V MOTOR DC MG4 1 3 6 11 14 OUT1 OUT2 OUT3 OUT4 IN1 IN2 IN3 IN4 EN1 EN2 VS VSS L293D 2 7 10 15 1 9 8 16
MOTOR DC
Title SPEED GOVERNOR Document Number ARL4B Sunday , J une 27, 2010 Sheet 1 of 1 Rev
Date: