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Lecturer Room No A223 Consultation Hours Tue : 2pm 4pm Wed : 10am 11am Thu : 3pm 5pm Fri : 10am 11am
AACS2284 Operating Systems Level Lecture Hours Tutorial Hours Practical Hours Credit Assessment Mode : : : : : : Diploma Year 2 2 hrs /week 1.5 hrs /week 2 hrs /week 4 Examination 60%, Coursework 20%, Practical 20%
Tutors : Mr. Ku CF, Ms. Kher PS Practical : Ms. Chin CL, Mr. Khoo LJ
Chapter 1: System S/W and H/W Technology Chapter 2: Device Management Chapter 3: Process Management Chapter 4: Deadlock Chapter 5: Memory Management Chapter 6: Concurrent Processes Chapter 7: File Management Chapter 8: System Management
The Objectives
To provide students basic knowledge and foundation of the structures and mechanisms of modern-day operating systems and an understanding of the underlying concepts in operating systems. To provides students with the working knowledge of the general structure and facility of operating system commands hands-on practical.
Learning Outcome Upon the completion of this unit, the student should be able to
Understand the overview of operating systems and different type of system computer software. Describe how the processor, memory, I/O modules are interconnected, describes the characteristic of secondary storage devices and the computer classification. Understand the principles of I/O operations, the I/O-CPU interface and device management.
Understand how the CPU schedules the processes and explain interrupts are generated and resolved. Describe the four conditions of deadlock and identify the deadlock state by using deadlock modeling. Describe how the tasks are allocated into the memory space. Understand the file implementation and realize the importance of keeping the system secure. Use Operating system commands, interact write simple scripts.
Coursework
Make Good Opportunity - Eligibility of students for make good. Must have submitted the required assignment. Must have attempted the semester test. Must have valid reason (e.g Medical Certificate, etc) if the above is not fulfilled). *Only one make good chance has given. *Make Good doesnt mean you will pass your coursework. *If you fail your coursework or/and practical (<50 marks), you will have to repeat the unit. Student Absenteeism First Time Verbal Warning Second Time Warning Letter from tutor Third Time Warning Letter from School (cc to parents/guardian) *If your attendance is unsatisfactory, you will be barred from exam
Computer System Components Hardware Provides basic computing resources (CPU, memory, I/O devices). Operating System (OS) Controls and coordinates the use of the hardware among the various application programs for the various users.
Applications Programs /Application Software Define the ways in which the system resources are used to solve the computing problems of the users (compilers, database systems, video games, business programs). Users Include people, machines, and other computers.
SOFTWARE TECHNOLOGY
example
Application program
Use the computer hardware in an efficient manner. Allocate resources Controls the execution of user programs and the operations of I/O devices .
Operating system
Hardware
Characteristics of an operating system Concurrency (example) Sharing (example) Long-term storage (example) Non-determinacy
Respond to events which will occur in an unpredictable manner
Tasks Performed by Each Subsystem Monitor its resources continuously Enforce the policies that determine who gets what, when and how much Allocate the resource when appropriate Deallocate the resource (reclaim it) when appropriate
Processor Manager
Memory Manager
Processor Manager Allocates CPU time Keeps track of each process status - waiting, executing Sets up necessary registers and tables Reclaims processor when job is finished and/or time for job has expired Two levels of responsibility (Job and Process scheduler)
Memory Manager Checks validity of each request for memory space and if it is a legal request, allocates a portion of memory that isnt already in use (example) Sets up a table to keep track of who is using which section of memory. Deallocates memory blocks once program completes execution Protects OS memory space so that it cannot be altered by other programs
Device Manager Monitors every device, channel, and control unit. Allocate in the most efficient manner all of the systems devices (e.g. printers, devices, ports, disk drives) based on a scheduling policy chosen by the systems designers. Functions include: Allocation of devices Starting operation of devices Deallocation of devices once job completes (eg)
File Manager Keeps track of each file in the system (e.g. data files, program files, compilers, application programs) Allocate resources (e.g. opening files) and deallocate resources (e.g. closing files) Uses predetermined access policies to enforce restrictions on who has access to which files Example: Restrictions on each file system only, user only, group only, general access User restriction read only, read/write only, allowed to create file, allowed to delete file
Five Categories of OS
Batch systems Interactive systems Real Time systems Hybrid systems Embedded systems
Batch Systems Jobs processed serially without user interaction Efficiency is measured in throughput ,i.e. the number of jobs completed in a given a mount of time (e.g. 550 jobs per hour) Example: Preparation of a weekly payroll for an organization whereby time cards are collected, data entered and processed, paychecks and reports are then printed
Interactive Systems User interacts directly with the operating system via commands entered from the keyboard Operating system provides immediate feedback to the user. Response time can be measured in fractions of a second. Example: Banks automatic teller machines (ATMs) which provides immediate cash and transaction details for its users.
Real-Time Systems Extremely fast systems which are used in time-critical environments where reliability is a major factor and data must be processed within a strict time limit. Usually a real-time system is a dedicated system which spends all or most of its time on a single job. Must be 100% responsive 100% of the time. Example: Air traffic control system used by the airport authority such as the radar system
Hybrid Systems A combination of batch and interactive systems. Appear to be interactive because individual users can access the system and get fast responses but actually accepts and runs batch programs in eh background when the interactive load is light. Takes advantage of the free time between highdemand usage of the system and low-demand times. Many large computer systems are hybrids.
Embedded Systems Embedded systems are computers placed inside other products to add features and capabilities. Example: In automobiles, embedded computers can help with engine performance, braking and navigation.
Utility Programs Most operating systems use a set of utility routines such as : linkage editors loaders line editors disk formatting modules sort routines debugging features library management routines
Application program
Use the computer hardware in an efficient manner. Allocate resources Controls the execution of user programs and the operations of I/O devices .
Operating system
Hardware
Five Categories of OS
Batch systems Interactive systems Real Time systems Hybrid systems Embedded systems
HARDWARE TECHNOLOGY
Basic unit of data representation Bits are grouped to form bytes, which in turn are grouped to form words. Bit: one binary digit (0 or 1). Byte: eight bits (1 character). Word: a group of bytes.
Word 0
Word 0
Byte 0 11111111
Byte 1 11111111
Byte 2 11111111
Byte 3 11111111
Basic elements of computer system - I/O Unit, Memory and Processor Memory Memory holds active programs and data. A program must be stored in memory before it can be executed. Data must be stored in memory before the computer can manipulate them. Memory write is a destructive operation. Memory read is not destructive
Memory Address Consist of a number of locations (cells) Each location has a number called address. If a memory has n locations (cells), they will have addresses 0 to n-1. All locations in the memory contain the same number of bits.
If a location of k bits, it can hold any one of 2 different bit combinations (k bits => can hold 2k combinations) if K= 3 then 8 locations 23 = 8 locations 2k - 1
0 1 2 3 4 5 6 7
In fact, for an address used to reference the memory need at least 4 bits in order to express all the address numbers from 0 to 11.
0 1 2 3 4 5 6 7
15
1111
The MAR and MDR act as an interface between the CPU and 1.3.3 The Operation of Memory Memory, whereby each cell in the memory unit holds one bit of data. Each row consists of a group of one or more bytes. Each group represents the data cells for one of more consecutive memory addresses. (AD is Address Decoder)
If a location of 6 bits
0 1
One or more bytes
M A R
A D
26 -1
address line
MDR
6-bit MAR 1 1 0 0 0 1 0 1
M A R
A D
49 63 1 1 0 1 1 0 0 0
63
MDR
110001 49 If 36-bit MAR can support ? of addressable memory
active line
The memory data register (MDR) is designed such that it is effectively connected to every cell in the memory unit. Each bit of the MDR is connected in a column to corresponding bit of every location in memory However, the addressing method assures that only a single row of cells is activated at any given time. If a machine has a 4GB memory data register (MDR), then 32 bits are used for the value of that memory buffer. 4GB = 4 X 1 GB 4GB = 22 230 = 232 Therefore 32 bits are used for MDR
If a machine use 33 bits for memory data register, then the capacity of memory buffer is 8GB ( 23 230) then 8GB = 8 X 1GB 8GB = 23 230
If a machine has a 64-bit memory address register (MAR), then the machine can address 264 addresses and 264 1 is the last memory address location.
If the memory address register value is 1000101 then the memory location is 69 1000101 26 25 24 23 22 21 20 1 0 0 0 1 0 1
Therefore, 64+0+0+0+4+0+1 = 69
If the memory address register value is 1100111 then the memory location is 103, 1100111 26 25 24 23 22 21 20 1 1 0 0 1 1 1
If the memory location is 65 and assume 7 bits are used in memory address register (MAR) then the binary content of MAR is 1000001
2 65 2 32 2 16 2 8 2 4 2 2 1
1 0 0 0 0 0
KB MB GB TB PB EB ZB YB
The Processor The processor manipulates data stored in memory under the control of a program stored in memory.
Processor
Memory
Program
Data
Cache memory
The rocessor
The program is stored in standard RAM. As the program executes, the active instructions and the active data are transferred to high-speed cache memory. Consequently, the processor waits for highspeed cache instead of slower RAM and that increases processing speed.
A program is a series of instructions. Each instruction has an operation code and one or more operands
Operatio co e ADD Opera s
1000,1004
Clock
Registers
The input/output control system (IOCS) communicates directly with the computers peripheral devices.
Operating system
Command processor
The input/output control system generates the primitive commands that control the peripheral device.
Applicatio program
Peripheral evice
Primitive command a low-level operation that causes a peripheral device to perform a single task) Logical I/O the programmers view-one logical record Physical I/O the transfer of a physical record between memory and a peripheral device
Memory Capacity and Processor Speed On most systems, the internal components are designed around a common word size. Example: On a 32-bit computer, the processor manipulates 32bit numbers, memory and the registers store 32-bit words, and data and instructions move between the components over a 32-bit bus. A computers word size affects its processing speed, memory capacity, precision, instruction set size, and cost.
A 32-bit bus contains 32 wires and thus can carry 32 bits at a time. A 16-bit bus has only 16 parallel wires and thus can carry only 16 bits at a time. Because the bus moves twice as much data in the same amount of time, the 32-bit machine is clearly faster. Generally, the bigger the word size the faster the computer is.
To access memory, the processor must transmit over a bus the address of desired instruction or data element. On a 32-bit machine, a 32-bit address can be transmitted. The biggest 32-bit number is roughly 4 billion in decimal terms, so the processor can access as many as 4 billion different memory locations. A 16-bit computer, transmits a 16-bit address, limiting it to roughly 64,000 memory locations. Generally, the bigger its word size, the more memory a computer can address.
Progressions Exercise-1
1) If this machine has a 4GB memory data register, how many bits are used for the value of that memory buffer?
2) If a machine has a 32-bit Memory Address Register. How much memory can this machine address?
3) What is the memory location for the memory address register value of 111110, 111111, 000000 and 100111
1) If this machine has a 4GB memory data register, how many bits are used for the value of that memory buffer? 4 GB = 4 X 1 GB = 22 X 230 = 232 therefore, 32 bits of MDR 2) If a machine has a 32-bit Memory Address Register. How much memory can this machine address? 232 addressable memory
3)
What is the memory location for the memory address register value of 111110, 111111, 000000 and 100111 a. 111110 25 24 23 22 21 20 1 1 1 1 1 0 Therefore, 32+ 16 + 8 + 4 + 2 = 62 25 24 23 22 21 20 1 1 1 1 1 1 Therefore, 32+ 16 + 8 + 4 + 2 + 1 = 63 25 24 23 22 21 20 0 0 0 0 0 0 Therefore, 0 + 0 + 0 + 0 + 0 + 0 = 0 25 24 23 22 21 20 1 0 0 1 1 1 Therefore, 32+ 0 + 0 + 4 + 2 + 1 = 39
b. 111111
c. 000000
d. 100111
DeviceDevice-Status Table
Figure 1.18b
Reserved for Operating System User space
Register03%r303 Register04 %r4 Register00 %r0 Register01 %r1 Register02 %r2 Register11 %r11 Register12 %r12 Register13 %r13 Register14 %r14 Register15%r15 Register16 %r16 Register17 %r17 Register18 %r18 Register19 %r19 Register22 %r22 Register23 %r23 Register24 %r24 Register25 %r25 Register26 %r26 Register27 %r27 Register28 %r28 Register29 %r29 Register30 %r30
I/O space
Register08 %r8
Register10 %r10
Register21 %r21
PSR %psr
PC %pc
P4 P1 A P3 P2
0 256000
Memory Protection
OS Job1
300040
Base register
300040
Limit register
Job2
420940
Job3
880000
120900
Job4
1024000
D1
D12
D2
D22
Dn
Dn2
DC1 CPU
DC2
DCn
System Bus
Memory Controller
Memory