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Lecture 10
time
user program user program
Task
IRQ Interrupt handler
IRQ
FIQ Interrupt handler
FIQ
time
user program cpu context saved
user program
Task
IRQ
“servicing” interrupt
FIQ cpu context restored
Interrupt latency
Interrupt
Interrupt response
PARALLEL
SERIAL
Introduction to Embedded Systems
Data Communication
• Communications between computer and monitor over serial
line
– Data is converted from parallel (bytes) to serial (bits) in the bus
interface
– Bits are sent over wire (TX) to terminal (or back from terminal to
computer)
– Receiving end (RX) translates bit stream back into parallel data
(bytes)
Terminal
Parallel-to-Serial TX RX
Converter
Computer CPU
Serial-to-Parallel RX TX
Converter
Serial
Link
Clock
Sampling points
RxRegister 0 1 2 3 4 5 6 7 RxRegister 0 1 2 3 4 5 6 7
FIFO Buffer FIFO Buffer
0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
Clock Clock
0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
Processor Peripheral
Transmitter Receiver
n 0 1 2 3 4 5 6 7 n
n+1 0 1 2 3 4 5 6 n+1 7
n+2 0 1 2 3 4 5 n+2 6 7
n+3 0 1 2 3 4 n+3 5 6 7
n+4 0 1 2 3 n+4 4 5 6 7
n+5 0 1 2 n+5 3 4 5 6 7
n+6 0 1 n+6 2 3 4 5 6 7
n+7 0 n+7 1 2 3 4 5 6 7
n+8 n+8 0 1 2 3 4 5 6 7
Interrupt when Interrupt when
Transmitter (Tx) is empty Receiver (Rx) is full
Chip Reg
Select
Tx Clock
R/W
Control
• Quiz #3