Sequential Circuit

Benitez, Mark Kenneth Click to edit Master subtitle style Cayas, Bernard Van Mendoza, John Michael

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Introduction

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Sequential Circuit
Output determined by inputs AND previous

outputs.

Feedback loop. It is use current input variables and previous

input variables by storing the information and putting back into the circuit on the next clock (activation) cycle.

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Two Main Types of Sequential Circuits

There were 2 types of Sequential Circuits;

Asynchronous sequential circuit Synchronous sequential circuit

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Asynchronous sequential circuit

This is a system whose outputs depend upon

the order in which its input variables change and can be affected at any instant of time.

Gate-type asynchronous systems are basically

combinational circuits with feedback paths.

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Synchronous sequential circuit

This type of system uses storage elements called

flip-flops that are employed to change their binary value only at discrete instants of time.
Use logic gates and flip-flop storage devices. Synchronization is achieved by a timing device

called a clock pulse generator. Clock pulses are distributed throughout the system in such a way that the flip-flops are affected only with the arrival of the synchronization pulse. Synchronous sequential circuits that use clock pulses in the inputs are called clocked-sequential circuits.

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The RS/SR, D Latch

The circuit has two stable states Latches and flip-flops store information Latches change output on changes to input Flip-op change output only when the clock

changes

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D Latch
It is also called Data Latch D latch is constructed by using the inverted S

input as the R input signal.

The single remaining input is designated "D"

to distinguish its operation from other types of latches. It makes no difference that the R input signal is effectively clocked twice, since the CLK signal will either allow the signals to pass both gates or it will not.
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In the D latch, when the CLK input is logic 1,

the Q output will always reflect the logic level present at the D input, no matter how that changes. When the CLK input falls to logic 0, the last state of the D input is trapped and held in the latch, for use by whatever other circuits may need this signal.
Because the single D input is also inverted to
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With all of these different types of latches and

flip-flops, the logic diagrams we have been using have gotten rather large, especially for the edge-triggered flip-flops. Fortunately, it really isn't necessary to follow and understand the inner workings of any of these circuits when they are used in larger applications. Instead, we use a set of very simple symbols to represent each type of latch or flip-flop in larger logical circuits.

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Thank you for Listening :D

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