Department of Technical Education

Andhrapradesh
Name : K.Radhika
Designation :Lecturer in ECE.
Branch :Electronics& Commn Engg
Institute :Govt Polytechnic Masabtank
Hyderabad.
Year/Semester : III Semester
Subject : Electronics circuits-1
subject code : EC -302
Topic : FET & UJT
Sub Topic : Field Effect Transistor
Duration : 150 Min
Teaching Aids used : Power point, Flash.
EC-302.31 t0 33 1
 Objectives
2

After completion of this Lesson we will be able to

understand
 Field Effect Transistor

 Different types of FETS

 Parameters of FET

 Advantages, Applications of FET

EC-302.31 t0 33 2
3
Recap
In the previous sessions we have learnt
Transistors

 Use of Transistor as an Amplifier

 Applications of Transistors

EC-302.31 t0 33 3
4
Field Effect Transistor

Field effect Transistor is a semiconductor device

which depends for its operation on the control of
current by an electric Field

EC-302.31 t0 33 4
5
Field Effect Transistor
FET has several advantages over BJT

3. Current flow is due to majority carriers only

4. Immune to radiation
5. High input resistance
6. Less noisy than BJT
7. No offset voltages at zero drain current
8. High thermal stability

EC-302.31 t0 33 5
 JFET Symbol

N Channel FET P Channel FET

EC-302.31 t0 32 Fig 4 . JFET symbols

EC-302.31 t0 33
6
 Classification of Field Effect Transistors

FET

JFET MOSFET

N-channel p-channel Depletion type Enhancement type

p-channel N-channel
p-channel N-channel

EC-302.31 t0 33
 JFET
Based on the construction JFETS are of Two types

3.N Channel FET

6.P Channel FET

EC-302.31 t0 33
8
 Construction
9 Heavily
For
Theatwo doped
ends ofP
N Channel
type
the barmaterial
are is
known
Drain FET an N type
deposited
as Sourceon and
either
silicon
side of Bar
the baristo
Drain
GATE formused
GATE

Source

EC-302.31 t0 32
Fig 3. Construction of N Channel FET

EC-302.31 t0 33
9
10
Construction of FET
Source : The source is the terminal through
which majority carriers enter the Silicon
Bar
Drain : Terminal through which Majoroty
carriers leave the bar
Gate: controls Drain current and is always
reverse biased
EC-302.31 t0 32

EC-302.31 t0 33
10
11
Construction of FET
Analogy :
 The operation of FET can be compared to the
water flow through a flexible pipe
 When One end is pressed the cross sectional area
decreases hence water flow decreases
 In a FET drain is similar to outlet
 Gate is similar to control in the figure 2

EC-302.31 t0 33
11
 Principle
12
when the pipe is
pressed at one end
Control (Gate) water flow decreases

Inlet ( Source)
Outlet (Drain)

Fig2. water Pipe analogy

EC-302.31 t0 33
12
13
Operation
Principle : To control the drain current FET
makes use of channel formed in by Space
charge region between Gate and the bar
By increasing the reverse bias the width of
space charge region decreases
As a result the channel Resistance increases
The Drain current decreases

EC-302.31 t0 33
13
 Working
14 Space charge Channel
Region
Drain ASource
As
channel
weisincrease
isconnected
established
the to
along
Reverse
-ve the
Of bias
length
the on of
Gate
batterythe
1
GATE (Vbar
GS)The
because
Drain ischannel
of Space
width
connected to
+ charge
+vedecreases
Region
of the battery
Source
Gate is reverse Biased
+
by battery 2

EC-302.31 t0 33
14
 Working
15

Drain It isAs
The Possible
Bias to adjust
wevoltage
increaseatthe the
which
bias such
Drain
Reverse thaton
current
bias Drain
becomes
Gate
GATE (Vcurrent
Zero
GS)The becomes
is Known as zero
channel width
pinch
+ off
decreases
voltage
Source

EC-302.31 t0 33
15
 Working

N Channel FET P Channel FET

Source connected to -VE Source connected to +VE

Drain Connected to +ve Drain Connected to -ve

Gate connected to –ve (Reverse Biased) Gate connected to +ve (Reverse Biased)

EC-302.31 t0 33
16
 Working
17

when Voltage is applied between source and Drain majority

carriers move through the channel between depletion region

The value of Drain current is maximum when no external

voltage is applied between gate and source

When gate to source reverse bias increases the depletion

region widens and channel width decreases hence Drain
current decreases

EC-302.31 t0 33
17
 Working
18

Hence Drain current decreases

When gate to source voltage is increased further The channel
completely closes

This is called pinch off region

This reduces Drain current to Zero

The Gate to source voltage at which the Drain current is zero

is called “ Pinch off Voltage”

EC-302.31 t0 33
18
 P Type and N type FETs
19

N Channel FET P Channel FET

3. Current carriers are 3.Current carriers are holes

Electrons
4.Mobility of holes is poor
4. Mobility of electrons is
almost twice that of Holes 5.More noise
in P channel FET
6.Low Transconductance
5. Low input Noise
6. Large Transconductance

EC-302.31 t0 33
19
 JFET Parameters
20

Electrical behavior is described in terms of the

parameters of the Device. They are obtained from the
characteristics. Important Parameters for FET are
2.DC Drain resistance
3.AC drain Resistance
4.Transconductance

EC-302.31 t0 33
20
 JFET Parameters
21

• DC Drain resistance : Defined as Ratio of Drain

to source Voltage VDS to Drain current ID. Also
called static or Ohmic Resistance
• Mathematically

RDS= VDS/ID

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21
 JFET Parameters
22

1. AC Drain resistance : Defined as the resistance

between Drain to source when JFET is operating
in Pinch off Region or saturation Region
2. Mathematically

∆ VDS
rD = When VGS is constant
∆I D
EC-302.31 t0 33
22
 JFET Parameters
23

• Transconductance (gm): It is given by the ratio

of small change in drain current to the
corresponding change in the Gate to source
Voltage VGS. Also known as Forward
Transmittance
• Mathematically ∆I D
gm =
∆VDS
EC-302.31 t0 33
23
 FET and BJT
24

FET
2. Uni polar device
3. Voltage controlled Device
4. High input impedance (in
Mega ohms)
5. Better thermal stability
6. High switching speeds
7. Less Noisy
8. Easy to fabricate
BJT
1. Bipolar device
3.Current controlled device
4.Low input impedance
5.Low thermal stabilty
6.Lower switching speeds
7.More noisy
8.Diffuicult to fabricate on IC

EC-302.31 t0 33
24
 Drain Characteristics
25
Drain characteristics show the relation between the
drain to source voltage and VDS and drain current ID

ID OHMIC Avalanche Breakdown

Region Pinch Off
Region Breakdown Region

B
A
VGS= 0

- VGS
VDS

EC-302.31 t0 33
25
 Drain Characteristics
26
Drain characteristics show the relation between the
drain to source voltage and VDS and drain current ID

ID OHMIC Avalanche Breakdown

Region Pinch Off
Region Breakdown Region

A
B At the Drain to source
In the region AB Drain
VGS= 0 Voltage corresponding
When VDS=0 , ID=0
current increases
as VDS increases as
ID also
to point toBKnee
Channel
inverse square law
increases up rate
Point A
width
This reduces
region is Known toasa
with Drain to source
- VGS minimum OHMIC value
regionand is
VDS Voltage
known as pinch off
EC-302.31 t0 33
26
 Drain Characteristics
27
Drain characteristics show the relation between the
drain to source voltage and VDS and drain current ID

ID OHMIC Avalanche Breakdown

Region Pinch Off
Region Breakdown Region

C
A
B Drain
Pinchcurrent
Off ID is given
Region
VGS= 0 by
Drain
This current
region remains
is Shown by BC2at
itsknown
maximumas saturation
VGSorIDSS
value
- VGS
I D = I DSS 1 − 
VDS
constant current VP 
 region
EC-302.31 t0 33
27
 Drain Characteristics
28
Drain characteristics show the relation between the
drain to source voltage and VDS and drain current ID

ID OHMIC Avalanche Breakdown

Region Pinch Off D
Region Breakdown Region

C
A
B Breakdown Region
VGS= 0 The device gets
damaged
This region due to
is Shown by CD
avalanche Breakdown
Drain current increases
- VGS
EC-302.31 t0 32 mechanism
Rapidly with VDS
VDS

EC-302.31 t0 33
28
 DISADVANTAGES OF FET OVER BJT

 FETs have a drawback of smaller gain bandwidth product

compared to BJT.

EC-302.31 t0 33
 Features
 The high input impedance, low output impedance and low

noise level make FET for superior of the bipolar transistor.

 Applications
 As a buffer amplifier which isolates the preceding stage

from the following stage.

EC-302.31 t0 33
 FET APPLICATIONS

Phase shift oscillators: The high input impedance

of FET is especially valuable in phase shift
oscillator to minimize the loading effect.

In voltmeters: The high input impedance of FET is

useful in voltmeters to act as an input stage.

EC-302.31 t0 33
 Summary
In this session we have learnt
About Field Effect Transistors
 Principle of operation
Construction and working
Symbols and types
Compare FET and BJT
Drain characteristics
Applications
Advantages,disadvantages

EC-302.31 t0 33
32
33
Quiz
Voltage controlled
FET is a device
Pinch off Voltage
The voltage at which drain current becomes Zero is
Noisy
FETs are less than BJTs

Reverse biased
Gate of a FET is always
Trans conductance
The ratio of ΔID to ΔVDS is known as

EC-302.31 t0 33
33
QUIZ

6.For JFET, above pinch off voltage, the { }

(C) Drain current remains constant.

(E) Drain current increases.

(G) Drain current increases.

(I) Depletion region becomes smaller.

(K) Depletion region remains constant.

EC-302.31 t0 33
7. The field effect transistors has carriers as

(C) Electrons.

(E) Holes.

(G) Either of the above.

(I) None of this.

EC-302.31 t0 33
 8. A unipolar transistor is a

(C) PN diode.

(E) NPN transistor.

(G) PNP transistor.

(I) FET.

EC-302.31 t0 33
 Frequently asked questions
37

1. Compare BJT and FET?

2. Explain the working of FET ?

3. Explain the drain characteristics of FET ?

4. Compare P channel and N channel FETS ?

5. Define Transconductance, DC and AC drain resistances?

6. Classify FETs?
EC-302.31 t0 33
37