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# STATE BOARD OF TECHNICAL EDUCATION

## AND TRAINING ANDHRA PRADESH

Name of the faculty : T. Madhavi Kumari
Designation : Lecturer
Branch : Electronics &Communication Engg
Institute : Govt. Polytechnic ,Vijayawada
Semester : III Semester
Subject : Electronics –I
Subject Code : EE-305
Topic : Introduction to Amplifiers
Duration : 100 Minutes
Sub Topic : Voltage Divider Bias
Teaching Aids : PPT, Animations, Diagrams

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Recap

## Biasing with feed back resistor method.

EE-305.62 .63 2
Objectives
After completion of the period student will be able to

## • Know the advantages of VDB circuit

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Voltage Divider Bias
(or)
Self Bias
(or)
Potential Divider Bias

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Circuit diagram of potential divider bias

FIG 1
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Why the name voltage divider bias?

## • The name voltage divider comes from the voltage

divider formed by R1 and R2.

## • The voltage drop across R2 forward biases the base

emitter junction.

## • This causes the base current and hence collector

current flows in the zero signal conditions.

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Circuit Analysis

## There are two methods that can be applied to

analyze the voltage divider configuration .

## 1. Approximate network analysis

2. Exact analysis

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Approximate analysis

• Ri>>R2
I1 R1
IB
VCC
• IB<<I2
R2 Ri
I2 V2

• I2≈ I1
FIG 2
• R1 and R2 can be
Partial bias circuit for calculating the
approximate Base voltage V2
considered series
elements.
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Determination of the operating point

##  Collector current (IC)

IB<<I2
 R1 and R2 can be
considered series I1 ≈ I 2
elements.
VCC
I1=
R1 +R2
V2
 Voltage drop across R2

 VCC 
V2 =  R2
R1 + R2 
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Expression for IC (continued)
Apply KVL to the base circuit as shown by the arrow

V2=VBE+VE VE=IERE

=VBE+IC RE IE≈IC

V2 IC = V2-VBE
RE

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IC = V2-VBE
RE

## • Universal method for providing transistor biasing.

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Expression for collector to emitter voltage

## • Apply KVL to collector

side as shown by the
arrow
VCC=ICRC+VCE+IERE
IE=IC+IB IB<<IC
IE≈IC
=ICRC+VCE+ICRE

VCE=VCC-IC(RC+RE) Eq-1
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Exact analysis
• What is a well designed VDB circuit?

## • A well designed VDB circuit will satisfy the condition

RTH = R1 // R2<0.01 RIN

R1

## FIG 3. Input side of

VCC R2 the VDB Circuit
RE

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Thevenin's equivalent network for the
network to the left of the base terminal

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Determining RTh
R1

VCC is replaced by
R2 RTh
a short –circuit
equivalent

FIG 4

 RTH= R b= R1 // R2

R1R 2
RTH = Rb =
R1 + R 2
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Determining VTH

R1

VCC R2 V2=VTh

## FIG 5 Determining VTH

VCC
VTH = .R 2
R1 + R 2
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Voltage Divider Bias Using Thevinen Equivalent

IC
Rc
C
RTH
B Vcc
VCE
IB
E
VB=VTh
IE RE

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• Applying KVL in the clockwise direction for the loop indicated
• VTH-IBRTH-VBE-IERE = 0 RC

• IE =IC+IB VCC

• VTH-IBRTH-VBE-(IC+IB)RE=0—Eq.1 RTh B

## • Apply KVL to collector side IB

E
• VCC=ICRC+VCE+IERE VTh
RE
 IB=IC+IB , IB<<IC , IE≈IC IE
• =ICRC+VCE+ICRE

Fig. 5
•VCE=VCC-IC(RC+RE)—Eq.2
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• On substituting the value of IC from Eq.2 into Eq.1 we get

VCC −VCE
VTH = IBRTH + VBE + RE ( IB + ) Eq.3
RC + RE
•Eq.3 relates base current versus VCE. We can calculate the
value of VCE for each value of IB .The curve between VCE
and IB is known as bias curve.
• The point of intersection of the load line and the bias curve
gives the operating point.

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• Apply KVL to the base circuit

VTh= Vb , RTh=Rb
RTh
• Vb=I BR b+ VBE+(IB+IC)RE---Eq.1 B
IB
Differentiating Eq.1 w. r. t IC E
VTh
dIB  dIB  IE RE
0= Rb + RE 1 + 
dIC  dIC 

dIB - RE
Hence = Eq.2
dIC RE + Rb
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β +1
We know S=
that dIB
1− β
dIC

## Substituting the value of d IB/d IC in S

1+ β
S= Eq.3
RE
1+ β
RE + Rb
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Rearranging the eq .3

 Rb 
 1+ 
S = (1 + β )  RE 
 (1 + β ) + Rb 
 
 RE 

• If R b / RE<<1 S becomes 1
-maximum possible stability
• The value of S increases with the increase of ratio Rb / RE
• S becomes (β+1) if R b / RE → ∞

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Stabilization of operating point
• Excellent stabilisation is provided by RE.
• V2=VBE+ICRE
• Suppose the collector current IC increases due to rise in
temperature .
• This will cause the voltage drop across emitter
resistance RE to increase.
• As voltage drop across R2 (i.e. V2) is independent of IC ,
therefore ,VBE decreases.
• This in turn causes IB to decrease.
• The reduced value of IB tends to restore IC to the original
value.
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V2=VBE+ICRE

GOOD
ICEO STABILISATION
VBE

ICBO IC IC

IERE=ICRE
T
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Voltage feedback action

## • Resistor RE causes negative feedback of the signal which

results in reduced signal gain of the amplifier.

## • This negative feedback may be avoided by placing a large

value capacitor 100µf in parallel with RE

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QUIZ

## (d) None of these

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• The circuit that provides the best stabilization
is

## (d) none of the above

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3. The stabilization in potential divider method is
provided by

(a) RE consideration

(b) RC consideration

## (d) All of the above

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4. The universal bias stabilization circuit is
most popular because

## (a) Its β sensitivity is high

(b) IC is equal to IE

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## 1. Draw the circuit diagram of Potential Divider Bias.

2. Describe the self bias in detail.
3. Derive the expressions for operating point of self bias
or potential divider bias
4. Explain how stabilization of operating point is achieved
by potential divider biasing method ?
5. Derive the expression for stability factor “S” for self
biased circuit ?
6. Derive the expressions for operating point of potential
divider bias using Thevenin’s theorem.

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