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Microcontroller 8051

Jerish Solomon.D

Microprocessors:
General-purpose microprocessor
CPU for Computers No RAM, ROM, I/O on CPU chip itself ExampleIntels x86, Motorolas 680x0
Data Bus
Many chips on mothers board

CPU GeneralPurpose Microprocessor

RAM

ROM

I/O Port

Timer

Serial COM Port

Address Bus General-Purpose Microprocessor System

Microcontroller :
A smaller computer On-chip RAM, ROM, I/O ports... ExampleMotorolas 6811, Intels 8051, Zilogs Z8 and PIC 16X

CPU

RAM ROM

A single chip
I/O Port
Serial Timer COM Port Microcontroller

Microprocessor vs. Microcontroller


Microprocessor CPU is stand-alone, RAM, ROM, I/O, timer are separate designer can decide on the amount of ROM, RAM and I/O ports. expansive versatility general-purpose
Microcontroller CPU, RAM, ROM, I/O and timer are all on a single chip fix amount of on-chip ROM, RAM, I/O ports for applications in which cost, power and space are critical single-purpose

Three criteria in Choosing a Microcontroller


1. meeting the computing needs of the task efficiently and cost effectively speed, the amount of ROM and RAM, the number of I/O ports and timers, size, packaging, power consumption easy to upgrade cost per unit 2. availability of software development tools assemblers, debuggers, C compilers, emulator, simulator, technical support 3. wide availability and reliable sources of the microcontrollers.

The basic 8051 Core


8-bit CPU optimized for control applications Capability for single bit Boolean operations. Supports up to 64K of program memory. 4 K bytes of on-chip program memory. Newer devices provide more. 128 or 256 bytes of on-chip data RAM Four 8 bit ports. Two 16-bit timer/counters UART Interrupts On-chip clock oscillator

MCS-51
MCS-51 is Intel's designation for its family of 8051 devices.

The 8051 is the original member of the MCS-51 family, and is the core for all MCS-51 devices.
The original 8051 was available in three versions. 8051 A fixed program in read only memory (ROM) version. 8031 No internal ROM program stored in external programmable read only memory (PROM) memory. 8751 Program stored in internal erasable PROM (EPROM). Erased by exposing the chip to high intensity ultraviolet light for several minutes. Eventually EPROM was replaced by EEPROM.

Block Diagram
External interrupts Interrupt Control On-chip ROM for program code
Timer/Counter

On-chip RAM

Timer 1 Timer 0

Counter Inputs

CPU
Serial Port

OSC

Bus Control

4 I/O Ports

P0 P1 P2 P3

TxD RxD

Address/Data

Pin Description of the 8051


P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD)P3.0 (TXD)P3.1 (INT0)P3.2 (INT1)P3.3 (T0)P3.4 (T1)P3.5 (WR)P3.6 (RD)P3.7 XTAL2 XTAL1 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) EA/VPP ALE/PROG PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8)

8051 (8031)

Signal Pins

8051 pinouts

Pins of 80511/4

Vccpin 40 Vcc provides supply voltage to the chip. The voltage source is +5V. GNDpin 20ground XTAL1 and XTAL2pins 19,18

Figure (a). XTAL Connection to 8051


Using a quartz crystal oscillator We can observe the frequency on the XTAL2 pin. C2 XTAL2 30pF C1 XTAL1 30pF GND

Pins of 80512/4

RSTpin 9reset It is an input pin and is active highnormally low. The high pulse must be high at least 2 machine cycles. It is a power-on reset. Upon applying a high pulse to RST, the microcontroller will reset and all values in registers will be lost. Reset values of some 8051 registers

Figure (b). Power-On RESET Circuit


Vcc

+ 10 uF 30 pF 11.0592 MHz 8.2 K 30 pF 18 X2 9 RST 31 EA/VPP X1

19

Pins of 80513/4

/EApin 31external access


There is no on-chip ROM in 8031 and 8032 . The /EA pin is connected to GND to indicate the code is stored externally. /PSEN ALE are used for external ROM. For 8051, /EA pin is connected to Vcc. / means active low. /PSENpin 29program store enable This is an output pin and is connected to the OE pin of the ROM.

Pins of 80514/4

ALEpin 30address latch enable It is an output pin and is active high. 8051 port 0 provides both address and data. The ALE pin is used for de-multiplexing the address and data by connecting to the G pin of the 74LS373 latch. I/O port pins The four ports P0, P1, P2, and P3. Each port uses 8 pins. All I/O pins are bi-directional.

Pins of I/O Port

The 8051 has four I/O ports Port 0 pins 32-39P0P0.0P0.7 Port 1pins 1-8 P1P1.0P1.7 Port 2pins 21-28P2P2.0P2.7 Port 3pins 10-17P3P3.0P3.7 Each port has 8 pins. Named P0.X X=0,1,...,7, P1.X, P2.X, P3.X ExP0.0 is the bit 0LSBof P0 ExP0.7 is the bit 7MSBof P0 These 8 bits form a byte. Each port can be used as input or output (bi-direction).