Error Detection and correction

Sachin P Namboodiri. Sai Santhosh. Sooraj Sasikumar. Sree Lekshmi.S Sruthi.P. Suraj Surendran. Vinay Kumar. Vidya Vijayan Pulickal.
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Data Errors
When data is transmitted over a cable or a channel, there is always a chance that some of the bits will be changed (corrupted) due to noise, signal distortion or attenuation. If error do occur then some of the transmitted bits will either change from 0 to 1 or from 1 to 0.

Types of errors

 Single bit-error only one bit in the data unit has changed.

 Burst errors change a number of bits in succession. They are often caused by faults in electrical equipment or by interference.

Error Detection
Transmission errors are inevitable, resulting in the change of one or more bits in the transmitted frame. Some notations:
Pb : probability of a single bit error (bit error rate) P1 : probability that a frame arrives with no bit errors. P2 : probability that a frame arrives with one or more undetcted bit errors.
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Error Detection
P3 : probability that a frame arrives with one or more detected errors but no undetected bit errors. F : number of bits in a frame. If no error detection scheme is used, P3=0, and: P1= (1-Pb) F P2= 1-P1 Clearly longer frame and higher Pb leads to lower P1.

Error Detection
An illustrative example
A defined specification for ISDN connections is that the bit error rate on a 64Kbps channel should be less than 10-6 on atleast 90% of observed 1 minute intervals. Suppose we want that at most one frame with an undetected bit error per day on a continuously used 64Kbps channel, with a frame length of 1000 bits

 No of frames transmitted per day is (64K/1000)*60*60*24= 5.5x106 Desired frame error rate P2 = 1/(5.5x106)= 0.18x10-6 But if we assume Pb=10-6 , then P1 =(0.999999)1000 = 0.999 Therefore, P2 = 10-3 , Which is about three orders of magnitude too large to meet our requirements. This necessiates the use of error detection
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Error Detection
Error detection uses the concept of redundancy, which means adding extra bits for detecting errors at the destination. EDC=Error Detection and correction bits (redundancy) D=Data protected by error checking. Error Detection may not be 100% reliable! It may miss some errors, but rarely. Larger the EDC field yields better detection and correction.
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Hamming Distance
The Hamming distance between two code words is the number of bits in which two code words differ.
This pair of bytes has a Hamming distance of 3:

The minimum Hamming distance for a code is the smallest Hamming distance between all pairs of words in the code.

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 The minimum Hamming distance for a code, D(min), determines its error detecting and error correcting capability. For any code word, X, to be interpreted as a different valid code word, Y, at least D(min) single-bit errors must occur in X. Thus, to detect k (or fewer) single-bit errors, the code must have a Hamming distance of D(min) = k + 1.

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 Example:

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Parity Check
The simplest error detection scheme.
Appends a parity bit to the end of a block of data. Odd number of bit errors can be detected. If an even number of bits are inverted due to error, an undetected error occurs. This is a drawback.

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 Mechanism is as follows:
Blocks of data from the source are subjected to a check bit or Parity bit generator form. a parity of 1 is added to the block if it contains an odd number of 1s and 0 is added if it contains an even number of 1s. At the receiving end the parity bit is computed from the received data bits and compared with the received parity bit. If it does not match then there is an error.
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Even-parity checking scheme

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Block Parity testing

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 For each group of 8 bits a parity bit could be added(in this case even parity)

Similarly we have to calculate parity on column also

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 Finally we get

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 Now if an error occurs, we will know which character and which column it has occurred.

Not only have we detected the error, but also corrected it..
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Checksum Testing
Another way of checking for errors is to use a checksum. This is a number calculated from the data and sent along with the data. If any errors occur during transmission then checksum for the received data will differ from transmitted checksum

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Note: The sender follows these steps: The unit is divided into k sections, each of n bits. All sections are added using ones complement to get the sum. The sum is complemented and becomes the checksum. The checksum is sent with the data.

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Note: The receiver follows these steps: The unit is divided into k sections, each of n bits. All sections are added using ones complement to get the sum. The sum is complemented. If the result is zero, the data are accepted: otherwise, rejected.

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Example
Suppose the following block of 16 bits is to be sent using a checksum of 8 bits. 10101001 00111001

The numbers are added using ones complement Sum Checksum 10101001 00111001 -----------11100010 00011101 10101001 00111001 00011101
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The pattern sent is

 Now suppose the receiver receives the pattern sent in Example 7 and there is no error. 10101001 00111001 00011101 When the receiver adds the three sections, it will get all 1s, which, after complementing, is all 0s and shows that there is no error. 10101001 00111001 00011101 Sum Complement 11111111 00000000 means that the pattern is OK.
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Now suppose there is a burst error of length 5 that affects 4 bits. 10101111 11111001 00011101 When the receiver adds the three sections, it gets 10101111 11111001 00011101 Partial Sum Carry Sum Complement 1 11000101 1 11000110 00111001 the pattern is corrupted.
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Cyclic Redundancy Check

A cyclic redundancy check (CRC) is a more sophisticated type of checksum. If a CRC is used, it is unlikely that any errors will go undetected. Although the technique may sound little complicated, in practice calculating a CRC is easy and can be implemented in hardware.
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 In CRC, If a k bit message is to be transmitted, the transmitter generates an r-bit sequence, known as Frame Check Sequence (FCS) so that the (k+r) bits are actually being transmitted. Now this r-bit FCS is generated by dividing the original number, appended by r zeros, by a predetermined number called Generator polynomial( r+1 bits). The remainder of this division process generates the r-bit FCS.
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 On receiving the packet, the receiver divides the (k+r) bit frame by the same predetermined number and if it produces no remainder, it can be assumed that no error has occurred during the transmission.

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 Suppose we want to transmit the information string: 1111101. The receiver and sender decide to use the (arbitrary) polynomial pattern, 1101. The information string is shifted left by one position less than the number of positions in the divisor. The remainder is found through modulo 2 division (at right) and added to the information string: 1111101000 + 111 = 1111101111.

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 If no bits are lost or corrupted, dividing the received information string by the agreed upon pattern will give a remainder of zero. We see this is so in the calculation at the right. Real applications use longer polynomials to cover larger information strings.

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 Polynomials
CRC generator(divisor) is most often represented not as a string of 1s and 0s, but as an algebraic polynomial.

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 A polynomial representing a divisor

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 Standard polynomials

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Next is the wonder u are awaiting!

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Wow!!!!

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 Error detection is usually done in ________ layer of OSI.

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 Datalink Layer

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 Explain different types of Errors?

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 Single bit-error only one bit in the data unit has changed. Burst errors change a number of bits in succession. They are often caused by faults in electrical equipment or by interference.

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 The number of bits position in which code words differ is called the __________ distance

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 Hamming Distance

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 To detect K single bit errors, the codes must have a hamming distance of D(min)= _________

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 K+1

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Problems

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 For P = 110011 and M = 11100011, find the FCS???

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 Given Message M = 1010001101 (10 bits) Pattern P = 110101 (6 bits) Find FCS???

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 Using CRC-CCITT polynomial, generate FCS for a message consisting of a one followed by 15 0s??? CRC-CCITT =X16 + X12 + X5 +1

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 Encode the data bit sequence 10010011011 using the generator polynomial X4 +X+1??

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 Divide X10 + X7 + X4 + X3 + X + 1 by X4 + X + 1. The remainder is X3 + X2. The CRC bits are 1100. The string 100100110111100 is sent.

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 Two communicating devices are using a single-bit even parity check for error detection. The transmitter sends the byte 10101010 and, because of channel noise, the receiver gets the byte 10011010. Will the receiver detect the error? Why or why not?

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 an even number of bit change is present , so an undetected error occurs.

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 M(x)=X9+X7+X3+X2+1, P(x)=X5+X4+X2+1, Find FCS

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 R(x)=X3+X2+X

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 Calculate the hamming pair-wise distance among the following code words00000 10101 01010

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 Suppose the data send is 100100 and the divisor is 1101.Find the CRC.

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 001.

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 If the data received is 110100011 and the divisor is 1001.Using CRC method check whether any error present or not??

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 Yes

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Thank You

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