Uploads by Mubarak Ali M

vlsi%Pjt%List(2k12-2k13)_v1_r6

Synthesis and Array Processor Realization of a 2-D IIR Beam Filter for Wireless Applications

Robust Patchwork-Based Embedding and Decoding Scheme for Digital Audio Watermarking

Reconfigurable Adaptive Singular Value Decomposition Engine Design for High-Throughput MIMO-OfDM Systems

MDC FFT or IFFT Processor With Variable Length for MIMO-OfDM Systems

Effective and Efficient Approach for Power Reduction by Using Multi-Bit Flip-Flops

Design of Digit-Serial FIR Filters- Algorithms, Architectures, And a CAD Tool

Area-Efficient VLSI Implementation for Parallel Linear-Phase FIR Digital Filters of Odd Length Based on Fast FIR Algorithm

An Efficient Denoising Architecture for Removal of Impulse Noise in Images

A Pipeline VLSI Architecture for Fast Computation of the 2-D Discrete Wavelet Transform

A High-Speed Low-Complexity Modified Radix-2^5 FFT Processor for High Rate WPAN Applications

A High Speed Low Power CAM With a Parity Bit and Power-Gated ML Sensing

VLSI Architecture of Arithmetic Coder Used in SPIHT

Viterbi-Based Efficient Test Data Compression

Universal Switching FIR Filtering

Transmission of 4-ASK Optical Fast OFDM With Chromatic Dispersion Compensation

The Design of Hybrid Symmetric-FIR(Analog Pulse-Shaping) Filters

Telephone Channel Compensation in Speaker Verification Using a Polynomial Approximation in the Log-Filter-Bank Energy Domain

Synchronous FPGA-Based High-Resolution Implementations of Digital Pulse-Width Modulators

Spread Spectrum Magnetic Resonance Imaging

Robust Watermarking of Compressed and Encrypted JPEG2000 Images

Radix-2 Fast Algorithm for Computing Discrete Hartley Transform of Type III

Pipelined Parallel FFT Architectures via Folding Transformation

On the BIBO Stability Condition of Adaptive Recursive FLANN Filters With Application to Nonlinear Active Noise Control

Non-Causal Time-Domain Filters for Single-Channel Noise Reduction

Low-Power and Area-Efficient Carry Select Adder

Interference Removal Operation for Spread Spectrum Fingerprinting Scheme

High-Speed Low-Power Viterbi Decoder Design for TCM Decoders

Hierarchical Design of an Application-Specific Instruction Set Processor for High-Throughput and Scalable FFT Processing

Fully FPGA-Based Sensorless Control for Synchronous AC Drive Using an Extended Kalman Filter

Fixed-Point Implementation of Cascaded Forward–Backward Adaptive Predictors

Enhancement of Residual Echo for Robust Acoustic Echo Cancellation

Energy-Efficient Low-Latency 600 MHz FIR With High-Overdrive Charge-Recovery Logic

Design and Implementation of a Pipelined Datapath for High-Speed Face Detection Using FPGA

Construction of Optimum Composite Field Architecture for Compact High-Throughput AES S-Boxes

Chaos-Based Security Solution for Fingerprint Data During Communication and Transmission

Area-Efficient Parallel FIR Digital Filter Structures for Symmetric Convolutions Based on Fast FIR Algorithm

An Optimization-Based Parallel Particle Filter for Multitarget Tracking

An Improved Multiplicative Spread Spectrum Embedding Scheme for Data Hiding

An FPGA-Based Hardware Implementation of Configurable Pixel-Level Color Image Fusion

A Wiener Filter Approach to Microphone Leakage Reduction in Close-Microphone Applications

A Wideband Digital RF Receiver Front-End Employing a New Discrete-Time Filter for M-WiMAX

A Very Linear Low-Pass Filter With Automatic Frequency Tuning

A Single-Pass-Based Localized Adaptive Interpolation Filter for Video Coding

A Shifted SVPWM Method to Control DC-Link Resonant Inverters and Its FPGA Realization

A Novel Filter-Bank Multicarrier Scheme to Mitigate the Intrinsic Interference-Application to MIMO Systems

A Novel Approach for Motion Artifact Reduction in PPG Signals Based on as-LMS Adaptive Filter

A Low-Complexity Design for an MP3 Multi-Channel Audio Decoding System

A Formal Approach to Designing Cryptographic Processors Based on GF(2^m) Arithmetic Circuits