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Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

PSR FUPLA2 Release 4.B1

Collahuasi Project SAG Mill / Run Program

replaces:

office resp.:

replaced by:

derived from:

Site:

Title:

Order:

Project:

Supplier:

Customer:

Johannes Gonser

ABB Switzerland Ltd. Regulat./Control Cycloconv.

ATBDE / J.Gonser

issued:

checked:

1-1016174

Bechtel Chile SA

CMDI Collahuasi Chile

Ujina-Rosario Transition

ABB Switzerland Ltd; ATBDE

Run Program for PSR2 SAG Mill

released:

std. checked:

12.11.2003

doc. type

format

A4 E

language

3BHS135699

Updated 01-06-07 / Rev_2.3 CP016 F01/K01

sht. nr.

nr. of shts.

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to t is prohibited; it is civilly and criminally actionable.

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

FUP:S04:MODE-SELECT FUP:S05:I-ANALOG-ADP FUP:S06:SELECT-IND CL:INIT-HW FUP:S01:ARCNET FUP:S02:GDB021-R FUP:S03:GDB021-S FUP:S04:GDB021-T FUP:S05:UAC326 FUP:S06:PMA324 CL:INT0 FUP:S01:INIT-INT1 FUP:S02:TRANSF>00 FUP:S03:FILTER1 FUP:S04:FILTER2 FUP:S05:FILTER3 FUP:S06:FILTER4 FUP:S07:FILTER5 FUP:S08:IX-COMMUTAT FUP:S09:TRANSF/10 CL:INT1 FUP:S01:INIT-INT2 FUP:S02:TRANSF>20/40 FUP:S03:TRANSF>80 FUP:S04:DETECT-I> FUP:S05:DETECT-I*T FUP:S06:DET-UE/IE,UN FUP:S07:SUMMARY-F/W FUP:S08:FAULT-EVENT1 FUP:S09:FAULT-EVENT2 FUP:S10:FAULT-EVENT3 FUP:S11:FAULT-EVENT4 FUP:S12:PHASE-SHIFT1 FUP:S13:PHASE-SHIFT2 FUP:S14:PHASE-SHIFT3 FUP:S15:BRDGE-COMMUT FUP:S16:CONTROL-R FUP:S17:CONTROL-S FUP:S18:CONTROL-T FUP:S19:PHASHIF4 FUP:S20:UST-R FUP:S21:UST-S FUP:S22:UST-T FUP:S23:LIMIT FUP:S24:TRAPEZ FUP:S25:TRANSFER/70 FUP:S26:RECORDING CL:INT2 FUP:S01:INIT-INT3 FUP:S02:TRANSF>60 FUP:S03:FAULT-EVENT5 FUP:S04:INTEG1 FUP:S05:INTEG2 FUP:S06:INTEG3 FUP:S07:INTEG4 FUP:S08:INTEG5 FUP:S09:INTEG6 FUP:S10:INTEG7 FUP:S11:DETECTN1 FUP:S12:DETECTN2 FUP:S13:NX FUP:S14:START-PARS FUP:S15:NX-LIMITS FUP:S16:NW1 FUP:S17:NW2 FUP:S18:CONTROL-N FUP:S19:ROCK-STOP FUP:S20:ANTIVOLT FUP:S21:PSIW FUP:S22:COSPHI2 FUP:S23:EXCITAT-1 FUP:S24:EXCITAT-2 FUP:S25:EXCITAT-3 FUP:S26:EXCITAT-4 FUP:S27:MOT-POWER FUP:S28:AIR-GAP-SUP1 FUP:S29:AIR-GAP-SUP2 FUP:S30:AIR-GAP-MON1 FUP:S31:AIR-GAP-MON2 FUP:S32:ANGLECAPTUR FUP:S33:FROZENCHARGE FUP:S34:TRANSFER/30 FUP:S35:SLOWOUT-B448 FUP:S36:UNBALANCE-IX CL:INT3 FUP:S01:B448-INPUT FUP:S02:PANEL-INPUT1 FUP:S03:PANEL-INPUT2 FUP:S04:LCB-IN1 FUP:S05:FAULT-EVENT6 FUP:S06:WARN-EVENT7 FUP:S07:WARN-EVENT8 FUP:S08:WARN-EVENT9 FUP:S09:WARN-EVENT10 FUP:S10:PRIOSEL-2 FUP:S11:PRIOSEL-3 FUP:S12:PRIOSEL-4 FUP:S13:START-UP-AUX FUP:S14:START-UP-AUX FUP:S15:MVD-ON-OFF FUP:S16:START/STOP FUP:S17:MILL-ON,WR FUP:S18:BRAKE-HORN FUP:S19:INCH-ANGLE FUP:S20:INCH-ANGLE FUP:S21:RESET/LT FUP:S22:STATUS-INDIC FUP:S23:FIRST-T/W FUP:S24:NW-REM-AD,PM FUP:S25:STANDSTILL-L CL:INT3-MODBUS

Mode Selection, Central-Local-MLCB ADAPTATION FOR ANALOG INDICATION SELECTIVE INDICATION OUTPUTS INITIALISATION Initialisation Initialisation Initialisation INITIALISATION OF ARCNET GATE CONTROL UNIT GDB021E-R GATE CONTROL UNIT GDB021E-S GATE CONTROL UNIT GDB021E-T OF KOMBI 1&2- UAC326AE

INIT-ROUTINE FOR INTERRUPT 1 TRANSFER TO UDA327-1 (BI/BO) BIN.INPUT ACTUAL STATOR CURRENT ixR1;ixS1;ixT1 ACTUAL STATOR CURRENT ixR2;ixS2;ixT2 FILTER: uxMR/uxMS/uxMT STATOR VOLTAGE FILTER: ixe;uex EXCITATION CURRENT/VOLTAGE FILTER: ADAPTATION:(Un NETZ) CURRENT ACTUAL VALUES COMMUTATION TRANSFER TO UDA327_1 (BI/BO) BIN.OUTPUT INIT-ROUTINE FOR INTERRUPT 2 TRANSFER UDA327-2 BIN.IN/OUT TRANSFER UAC326-1/2 (KOMBI 1&2) BIN.INPUT STATOR OVERCURRENT DETECTION STATOR CURRENT DETECTION (i*T) DETECTION DE IeMAX/MIN;UN>/UN< WR-RELEASE/MVD-ON-COMMAND; &FAULT/WARNING FAULT HANDLING (I>, U>, U<, I*t) FAULT HANDLING (Print boards) FAULT HANDLING (FUSES, ARRESTERS) FAULT HANDLING (GENEREL) CREATION OF cos/sin{e1+DELTphi1} CREATION OF cos/sin{e1+D-phi1+2} CREATION OF ixd/ixq;/ix./* BRIDGE COMMUTATION COMMAND CURRENT CONTROLLER PHASE R CURRENT CONTROLLER PHASE S CURRENT CONTROLLER PHASE T CREATION OF /ix./*k-1 CREATION OF CONTROL VOLTAGE PHASE R CREATION OF CONTROL VOLTAGE PHASE S CREATION OF CONTROL VOLTAGE PHASE T REGULATION LIMITATION TRAPEZ REGULATION TRANSFER TO UAC326-1 / UAC326-2 BIN.OUTPUT Analog Output for Recording INIT-routine for INTERRUPT 3 TRANSFER UDA327-3 BIN.INPUTS FAULT HANDLING (Air gap supervision) CALCULATION FACTOR 5K AND T0/T2 CREATION OF u_i_alfa AND u_i_beta OFFSET u-i-alfa , psi-alfa ZPR-psi-alfa OFFSET u-i-beta , psi-beta ZPR-psi-beta SPEED detection : [psix],sin/cos-e1 Calculation of dpsi-alfa/dt Calculation of dpsi-beta/dt nx , [nx] GENERATION Parameter Setting Speed Reference Limit SPEED REFERENCE LIMITATION CREATION OF nw>REF ; /nw/ SPEED CONTROLLER: CREATION OF +iw-RS S19:ROCKING-STOPPING-SEQUENCE ANTICIPATORY VOLTAGE PHASE R,S,T CREATION OF +psiw CREATION OF iw.** ; MSB-iw.* GENERATION OF phi AND i , delta ifw GENERATION OF Ed/PHI AND GAW EXCITATION REF.CURRENT CALCULATION-iwe iwe-adaption Motor Power Calculation Air gap detection Capacitive Air gap detection Capacitive Air gap monitoring Air gap monitoring Angle Calculation Frozen Charge Protection TRANSFER TO UDA327-2 BIN.OUTPUT TRANSFER SIGNALS TO B448

PANEL KEYBOARD INPUTS SELECTION PANEL / SERVICE OPERATION LCB KEYBOARD INPUT SIGNALS FAULT HANDLING WARNING HANDLING WARNING HANDLING WARNING HANDLING WARNING HANDLING PRIORITY MODE LOCAL PRIORITY MODES LCB / REMOTE PRIORITY MODE (SLOW/FAST;REVERSE;INCHING.) AUXILIARIES ON/OFF CYCLOCONVERTER COOLING PUMPS MEDIUM VOLTAGE DEVICE ON/OFF INTERNAL: START /STOP/ INCH-START CC-RTS/WR-RELEASE MECHANICAL BRAKE CONTROL /HORN CONTROL INCHING CONTROL INCHING STOP COMMAND RESET/LAMPTEST-HANDLING/BLINK-FREQUENCY STATUS INDICATION FIRST FAULT NUMBER

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

12.11.2003

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

ATBDE / J.Gonser

released:

A4 E

Collahuasi Project SAG Mill / Run Program

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

FUP:S06:ANALOG-OUT-2 FUP:S07:ANALOG-OUT-3 FUP:S08:MODBUS-OUT2 FUP:S09:SETPOINTS CL:LCB-AFC094 FUP:S01:TRANS-ANALOG FUP:S02:TRANS-DO FUP:S03:AFC094-LED FUP:S04:TRANS-DEFAUT CL:PANEL-AFC094 FUP:S01:COOL-DISPLAY FUP:S02:PANL-DISPLAY FUP:S03:PANEL-OUT FUP:S04:LED:F1-F16 FUP:S05:LED-CONTROL1 FUP:S06:LED-CONTROL2

TRANSFER TRANSFER TRANSFER TRANSFER

OF OF OF OF

ANALOG SIGNALS TO LCB-DISPLAY DIGITAL SIGNALS TO LCB-DISPLAY DIGITAL SIGNALS TO LCB-LEDS ANALOG SIGNALS TO LCB-DISPLAY

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

12.11.2003

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

ATBDE / J.Gonser

released:

A4 E

Collahuasi Project SAG Mill / Run Program

3BHS135699

;Datum: 03.04.2004 ;Author: J.GONSER ;Modified: 03.04.04 by Prasert Ch. ; ;Modified: Rev_2.0 by Prasert Ch. 16-02-07 ; ; PROJECT COLLSAG BUS B448 PHSC PPC322AE "DeviceAddress" 01H ; GA=1 "Timer 0" 833 ; micro seconds ;"Timer 1" 833 ; micro seconds TASK INIT CLUSTER INIT-HW ; Initialisation of HW-devices SEGMENT S01:ARCNET S02:GDB021-R S03:GDB021-S S04:GDB021-T S05:UAC326 S06:PMA324 ENDSEGMENT ENDCLUSTER BACKGROUND CLUSTER BACKGND SEGMENT S01:SELECT-DECO ;Control of Selective Indications S02:COOL-INPUT S03:COOL-MONITOR S04:MODE-SELECT S05:I-ANALOG-ADP S06:SELECT-IND ENDSEGMENT PANEL-AFC094 SEGMENT S01:COOL-DISPLAY S02:PANL-DISPLAY S03:PANEL-OUT S04:LED:F1-F16 S05:LED-CONTROL1 S06:LED-CONTROL2 ENDSEGMENT LCB-AFC094 SEGMENT S01:TRANS-ANALOG S02:TRANS-DO S03:AFC094-LED S04:TRANS-DEFAUT ENDSEGMENT ENDCLUSTER INTERRUPT0 CLUSTER INT0 SEGMENT S01:INIT-INT1 S02:TRANSF>00 S03:FILTER1 S04:FILTER2 S05:FILTER3 S06:FILTER4 S07:FILTER5 S08:IX-COMMUTAT S09:TRANSF/10 ENDSEGMENT ENDCLUSTER INTERRUPT1 CLUSTER INT1 SEGMENT S01:INIT-INT2 S02:TRANSF>20/40 S03:TRANSF>80 S04:DETECT-I> S05:DETECT-I*T S06:DET-UE/IE,UN S07:SUMMARY-F/W

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

12.11.2003

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

ATBDE / J.Gonser

released:

A4 E

Collahuasi Project SAG Mill / Run Program

3BHS135699

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

S11:FAULT-EVENT4 S12:PHASE-SHIFT1 S13:PHASE-SHIFT2 S14:PHASE-SHIFT3 S15:BRDGE-COMMUT S16:CONTROL-R S17:CONTROL-S S18:CONTROL-T S19:PHASHIF4 S20:UST-R S21:UST-S S22:UST-T S23:LIMIT S24:TRAPEZ S25:TRANSFER/70 S26:RECORDING ENDSEGMENT ENDCLUSTER INTERRUPT2 CLUSTER INT2 SEGMENT S01:INIT-INT3 S02:TRANSF>60 S03:FAULT-EVENT5 S04:INTEG1 S05:INTEG2 S06:INTEG3 S07:INTEG4 S08:INTEG5 S09:INTEG6 S10:INTEG7 S11:DETECTN1 S12:DETECTN2 S13:NX S14:START-PARS S15:NX-LIMITS S16:NW1 S17:NW2 S18:CONTROL-N S19:ROCK-STOP S20:ANTIVOLT S21:PSIW S22:COSPHI2 S23:EXCITAT-1 S24:EXCITAT-2 S25:EXCITAT-3 S26:EXCITAT-4 S27:MOT-POWER S28:AIR-GAP-SUP1 S29:AIR-GAP-SUP2 S30:AIR-GAP-MON1 S31:AIR-GAP-MON2 S32:ANGLECAPTUR S33:FROZENCHARGE S34:TRANSFER/30 S35:SLOWOUT-B448 S36:UNBALANCE-IX ENDSEGMENT ENDCLUSTER INTERRUPT3 CLUSTER INT3 SEGMENT S01:B448-INPUT S02:PANEL-INPUT1 S03:PANEL-INPUT2 S04:LCB-IN1 S05:FAULT-EVENT6 S06:WARN-EVENT7 S07:WARN-EVENT8 S08:WARN-EVENT9 S09:WARN-EVENT10 S10:PRIOSEL-2 S11:PRIOSEL-3 S12:PRIOSEL-4 S13:START-UP-AUX S14:START-UP-AUX S15:MVD-ON-OFF S16:START/STOP S17:MILL-ON,WR S18:BRAKE-HORN S19:INCH-ANGLE S20:INCH-ANGLE

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

12.11.2003

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

ATBDE / J.Gonser

released:

A4 E

Collahuasi Project SAG Mill / Run Program

3BHS135699

S24:NW-REM-AD,PM S25:STANDSTILL-L ENDSEGMENT INT3-MODBUS SEGMENT S01:MODBUS-OUT1 S02:FAULTS S03:STATUS-1 S04:COMMAND-1 S05:ANALOG-OUT-1 S06:ANALOG-OUT-2 S07:ANALOG-OUT-3 S08:MODBUS-OUT2 S09:SETPOINTS ENDSEGMENT ENDCLUSTER ENDTASK DOMAIN DATAMEMORY ALARM MODBUS-I MODBUS-O INTERN INIT KOMBI-1 KOMBI-2 ParamGrp PANEL LCB UDA327:1 UDA327:2 UDA327:3 TRIP ENDDATAMEMORY SAVEMEMORY ENDSAVEMEMORY MAILBOXSHORT POSSIBLEBASE 00000200H POSSIBLESIZE 00000100H PANEL-I BASE 00000200H SIZE 0000000AH SIGNAL CHNr1 OFFSET 0000H ;ChannelNr at first line, Node ID=05H CHNr2 OFFSET 0001H CHNr3 OFFSET 0002H CHNr4 OFFSET 0003H CHNr5 OFFSET 0004H CHNr6 OFFSET 0005H CHNr7 OFFSET 0006H CHNr8 OFFSET 0007H RESET OFFSET 0008H BIT 0H KEYS:F1-F16 OFFSET 0009H ENDSIGNAL LCB-I SIGNAL CHNr1 CHNr2 CHNr3 CHNr4 CHNr5 CHNr6 CHNr7 CHNr8 RESET BI-1 BI-2 BI-3 KEYS:F1-F16 ENDSIGNAL UAC096 SIGNAL cool-temp-CT001 cool-temp-CT002 cool-flow-CF001 cool-temp-CT004 cool-level-CL001 cool-press-CP001 cool-cond-CD001 cool-temp-CT005 ENDSIGNAL PANEL-O SIGNAL BASE 00000220H SIZE 00000015H BASE 00000214H OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET SIZE 00000008H BASE 0000020AH OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET 0000H 0001H 0002H 0003H 0004H 0005H 0006H 0007H 0008H 0008H 0008H 0008H 0009H SIZE 0000000AH ;Node ID =06H

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

BIT BIT BIT BIT

0H 8H 9H AH

0000H ;analog input from UA C096, Node ID=30H (DIP Switch value 48) 0001H 0002H 0003H 0004H 0005H 0006H 0007H

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

12.11.2003

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016 F01/K01


doc. type format language sht. nr.

3
nr. of shts.

ATBDE / J.Gonser

released:

A4 E

Collahuasi Project SAG Mill / Run Program

3BHS135699

analog-value4 analog-value5 analog-value6 analog-value7 analog-value8 FIRST-FAULT-NR ERROR-BLOCK1 ERROR-BLOCK2 ERROR-BLOCK3 ERROR-BLOCK4 ERROR-BLOCK5 LAMPTEST ;DISPLAY ;PRINTER RESET ;RELAY1 ;RELAY2 ;RELAY3 LED:F1-F16 ERROR-BLOCK6 ERROR-BLOCK7 ERROR-BLOCK8 ERROR-BLOCK9 ERROR-BLOCK10 ENDSIGNAL LCB-O SIGNAL analog-value1 analog-value2 analog-value3 analog-value4 analog-value5 analog-value6 analog-value7 analog-value8 FIRST-FAULT-NR ERROR-BLOCK1 ERROR-BLOCK2 ERROR-BLOCK3 ERROR-BLOCK4 ERROR-BLOCK5 DIVERS RESET ;RELAY1 LED:F1-F16 ERROR-BLOCK6 ERROR-BLOCK7 ERROR-BLOCK8 ERROR-BLOCK9 ERROR-BLOCK10 ENDSIGNAL ENDMAILBOXSHORT MAILBOXLONG ENDMAILBOXLONG BUSSHORTIO UDA327-1 SIGNAL >00 /10 ENDSIGNAL UDA327-2 SIGNAL >20 /30 ENDSIGNAL UDA327-3 SIGNAL >40 /50 ENDSIGNAL UAC326-1 SIGNAL s>+[ixR1] s>+[ixS1] s>+[ixT1] s>+[ixR2] s>+[ixS2] s>+[ixT2] s>uxMR s>uxMS s>uxMT s>AGP10 s>+[ixe]

OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET

0003H 0004H 0005H 0006H 0007H 0008H 0009H 000AH 000BH 000CH 000DH 000EH 000EH 000EH 000EH 000EH 000EH 000EH 000FH 0010H 0011H 0012H 0013H 0014H

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

BIT BIT BIT BIT BIT BIT BIT

0H 1H 2H 3H 8H 9H AH

; ;Reset Display active time ;Activates the Printer ;Reset Alarm/Fault ;Relay Outputs ; ; ;Function Key LED 1..16 ; ; ; ; ;

BASE 00000235H OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET 0000H 0001H 0002H 0003H 0004H 0005H 0006H 0007H 0008H 0009H 000AH 000BH 000CH 000DH 000EH 000EH 000EH 000FH 0010H 0011H 0012H 0013H 0014H

SIZE 00000015H

BIT 3H ;Reset Alarm/Fault BIT 8H ;Relay Outputs ;Function Key LED 1..16

BASE 00000000H OFFSET 0000H OFFSET 0010H BASE 00000020H OFFSET 0000H OFFSET 0010H BASE 00000040H OFFSET 0000H OFFSET 0010H BASE 00000060H OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET 0001H 0002H 0003H 0004H 0005H 0006H 0007H 0008H 0009H 000AH 000BH

SIZE 00000020H

;GA=0

SIZE 00000020H

;GA=2

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

SIZE 00000020H

;GA=4

SIZE 00000020H

;GA=5

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

12.11.2003

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016 F01/K01


doc. type format language sht. nr.

4
nr. of shts.

ATBDE / J.Gonser

released:

A4 E

Collahuasi Project SAG Mill / Run Program

3BHS135699

i-pi/ixS i-pi/ixT pi/si i-pi/ixe /iwe /nw >60 /70 ENDSIGNAL UAC326-2 SIGNAL >80 /90 s>AGP1 s>AGP2 s>AGP3 s>AGP4 s>AGP5 s>AGP6 s>AGP7 s>AGP8 s>AGP9 s>Unet-R s>Unet-S s>Unet-T /AS-sig s/Recording-AO2 s/Recording-AO3 s/Recording-AO4 s/Recording-AO5 s/Recording-AO6 ; s/Recording-AO7 s/Recording-AO8 ENDSIGNAL GDB-R1 SIGNAL UstR Id commut-react scal-unx scal-idx unx frequency ENDSIGNAL GDB-S1 SIGNAL UstS scal-unx Id commut-react scal-idx ENDSIGNAL GDB-T1 SIGNAL UstT scal-unx Id commut-react scal-idx ENDSIGNAL GDB-R2 SIGNAL UstR scal-unx Id commut-react scal-idx ENDSIGNAL GDB-S2 SIGNAL UstS scal-unx Id commut-react scal-idx ENDSIGNAL GDB-T2 SIGNAL UstT scal-unx Id commut-react scal-idx

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET

0013H 0014H 0015H 0016H 0017H 0018H 0000H 0010H SIZE 00000020H ;GA=6

BASE 00000080H OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET 0000H 0010H 0001H 0002H 0003H 0004H 0005H 0006H 0007H 0008H 0009H 000AH 000BH 000CH 0011H 0012H 0013H 0014H 0015H 0016H 0017H 0018H

BASE 00000100H OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET 0001H 0002H 0003H 0004H 0005H 000AH 000CH

SIZE 00000010H

;GA=7

;(write)Control Voltage reference (from SW) ;(write) ;(write)Scaling factor Reference Voltage (uSRNn=10Vpeak; 40..130%) ;(read)Rectified line voltage ;(read)line voltage frequency SIZE 00000010H ;GA=8

BASE 00000120H OFFSET OFFSET OFFSET OFFSET OFFSET 0001H 0004H 0002H 0003H 0005H

;(write)Control Voltage reference (from SW) ;(write)Scaling factor Reference Voltage (uSRNn=10Vpeak; 40..130%)

BASE 00000140H OFFSET OFFSET OFFSET OFFSET OFFSET 0001H 0004H 0002H 0003H 0005H

SIZE 00000010H

;GA=9

;(write)Control Voltage reference (from SW) ;(write)Scaling factor Reference Voltage (uSRNn=10Vpeak; 40..130%)

BASE 00000160H OFFSET OFFSET OFFSET OFFSET OFFSET 0001H 0004H 0002H 0003H 0005H

SIZE 00000010H

;GA=10

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

;(write)Control Voltage reference (from SW) ;(write)Scaling factor Reference Voltage (uSRNn=10Vpeak; 40..130%)

BASE 00000180H OFFSET OFFSET OFFSET OFFSET OFFSET 0001H 0004H 0002H 0003H 0005H

SIZE 00000010H

;GA=11

;(write)Control Voltage reference (from SW) ;(write)Scaling factor Reference Voltage (uSRNn=10Vpeak; 40..130%)

BASE 000001A0H OFFSET OFFSET OFFSET OFFSET OFFSET 0001H 0004H 0002H 0003H 0005H

SIZE 00000010H

;GA=12

;(write)Control Voltage reference (from SW) ;(write)Scaling factor Reference Voltage (uSRNn=10Vpeak; 40..130%)

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

12.11.2003

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016 F01/K01


doc. type format language sht. nr.

5
nr. of shts.

ATBDE / J.Gonser

released:

A4 E

Collahuasi Project SAG Mill / Run Program

3BHS135699

FAULTS-1 FAULTS-2 FAULTS-3 FAULTS-4 FAULTS-5 FAULTS-6 WARNINGS-7 WARNINGS-8 WARNINGS-9 WARNINGS-10 STATUS-1 ON/OFF-1 AGP1 AGP2 AGP3 AGP4 AGP5 AGP6 AGP7 AGP8 AGP9 COOL-CT001 COOL-CT002 COOL-CF001 COOL-CL001 COOL-CP001 COOL-CD001 COOL-CT004 COOL-CT005 /nw/ nx /UN/ Pm ixe ;uxe uxMA ixR-eff ixS-eff ixT-eff First-Fault AGP10 AGP11 ; ; Follow signals written by ; nw ON/OFF-SIGNALS-1 ON/OFF-SIGNALS-2 LoadCell ENDSIGNAL ENDBUSSHORTIO BUSLONGIO PSR SIGNAL Status Nodes-110H ;Nodes-111H ;Nodes-112H Nodes-113H ActiveMaster ENDSIGNAL PMA-MB SIGNAL DEVICESTATUS ENDSIGNAL KOMBI-1L SIGNAL Status ENDSIGNAL KOMBI-2L SIGNAL Status ENDSIGNAL GDB-R1LA SIGNAL Status ENDSIGNAL GDB-S1LA SIGNAL Status

OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET PLC OFFSET OFFSET OFFSET OFFSET

0000H 0001H 0002H 0003H 0004H 0005H 0006H 0007H 0008H 0009H 000AH 000BH 000CH 000DH 000EH 000FH 0010H 0011H 0012H 0013H 0014H 0015H 0016H 0017H 0018H 0019H 001AH 001BH 001CH 001DH 001EH 001FH 0020H 0021H 0022H 0023H 0024H 0025H 0026H 0027H 0028H 0029H

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

; Faults read by PLC

; Warnings read by PLC

; Status read by PLC ; On/Off signals read by PLC ; Air gaps ring motor read by PLC

; Cooling sytems signals read by PLC

; ; ; ;

Reference Speed read by PLC ACtual speed read by PLC U netz 13,8 KV read by PLC Ring Motor Power read by PLC

; Stator currents read by PLC

0030H 0031H 0032H 0033H

; Reference speed (DCS) write by PLC

BASE 00020000H OFFSET OFFSET OFFSET OFFSET OFFSET OFFSET 0005H 0110H 0111H 0112H 0113H 0114H

SIZE 00001000H

;Node 1....15 ;Node 16...31 ;Node 32...47 ;Node 48...63 ;PSR is active ARCnet master SIZE 000003FFH

BASE 00060000H OFFSET 0005H BASE 000A0000H OFFSET 0005H

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

SIZE 00000007H

BASE 000C0000H OFFSET 0005H

SIZE 00000007H

BASE 000E0000H OFFSET 0005H

SIZE 00000106H

BASE 00100000H OFFSET 0005H

SIZE 00000106H

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

12.11.2003

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016 F01/K01


doc. type format language sht. nr.

6
nr. of shts.

ATBDE / J.Gonser

released:

A4 E

Collahuasi Project SAG Mill / Run Program

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

SIGNAL Status ENDSIGNAL GDB-R2LA SIGNAL Status ENDSIGNAL GDB-S2LA SIGNAL Status ENDSIGNAL GDB-T2LA SIGNAL Status ENDSIGNAL

OFFSET 0005H

BASE 00140000H OFFSET 0005H

SIZE 00000106H

BASE 00160000H OFFSET 0005H

SIZE 00000106H

BASE 00180000H OFFSET 0005H

SIZE 00000106H

ENDBUSLONGIO CODEMEMORY POSSIBLEBASE 00000000H ;32KBEEPROM ENDCODEMEMORY ENDDOMAIN ENDPHSC ENDBUS ENDPROJECT

POSSIBLESIZE 00007FFFH

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

12.11.2003

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016 F01/K01


doc. type format language sht. nr.

7
nr. of shts.

ATBDE / J.Gonser

released:

A4 E

10

Collahuasi Project SAG Mill / Run Program

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

MS B

2 & 0I 0B 0B SIC IC HOLD DOWN

CARRY

1B 0000H

EN KEY Y

5 BSBI X .0 .1 .2 .3 .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15

INTERN_SI:C-nw INTERN_SI:C-iw INTERN_SI:C-nx INTERN_SI:C-psiw INTERN_SI:C-psix INTERN_SI:C-dpsiT

6 COMPW 5I X Y X=Y X>Y 70MS / T T/ MS < INPUT CROSSREFERENCE: PANEL_C>LOCAL-F6 7 OND

Source: INT3\S03:PANEL-INPUT2 Sink : BACKGND\S01:SELECT-DECO PANEL-AFC094\S05:LED-CONTROL1

OUTPUT CROSSREFERENCE: INTERN_SI:C-dpsiT INTERN_SI:C-iw INTERN_SI:C-nw INTERN_SI:C-nx INTERN_SI:C-psiw INTERN_SI:C-psix

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

BACKGND\S01:SELECT-DECO BACKGND\S06:SELECT-IND BACKGND\S01:SELECT-DECO BACKGND\S06:SELECT-IND BACKGND\S01:SELECT-DECO BACKGND\S06:SELECT-IND BACKGND\S01:SELECT-DECO BACKGND\S06:SELECT-IND BACKGND\S01:SELECT-DECO BACKGND\S06:SELECT-IND BACKGND\S01:SELECT-DECO BACKGND\S06:SELECT-IND

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C001/S001 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser BACKGND S01:SELECT-DECO SELECT SELECTIVE INDICATION


released:

A4 E

11

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to t is prohibited; it is civilly and criminally actionable.

X*Y % ParamGrp_lifezero-mon -11.99951% UAC096_cool-flow-CF001 Water Flow Conv 6 ADD +1 +2 % 125% 7 MULT X Y X*Y % 3 THRLL X LOLIM HYS <=LIM %

INTERN_cool-temp-CT T Conv In 0-100G

2%

4 & o B 500MS / T

5 OND T/ MS INTERN_W/COOL-CT001 INTERN_cool-flow-CF Flow 0-380l/min

-20%

2% UAC096_cool-level-CL001 Water Level 11 ADD +1 +2 % 125% 12 MULT X Y X*Y %

8 THRLL X LOLIM HYS <=LIM %

9 & o B 500MS

-20%

10 OND / T T/ MS

INTERN_W/COOL-CF001 INTERN_cool-level-C Wat Level 0-100%

2% UAC096_cool-press-CP001 -20% 16 ADD +1 +2 % 125% 17 MULT X Y X*Y %

13 THRLL X LOLIM HYS <=LIM %

14 & o B 500MS

15 OND / T T/ MS

INTERN_W/COOL-CL001 INTERN_cool-press-C Wat Press 0-6bar

2% UAC096_cool-temp-CT002 Temp Conv Outlet 21 ADD +1 +2 % 125% 22 MULT X Y X*Y %

18 THRLL X LOLIM HYS <=LIM %

19 & o B 500MS

-20%

20 OND / T T/ MS

INTERN_W/COOL-CP001 INTERN_cool-temp-CT T Cv Out 0-100G

UAC096_cool-cond-CD001 Water Conductiv ParamGrp_cool-cond-CD001 -20.00122%

26 ADD +1 +2 % 125%

2% 27 MULT X Y X*Y %

23 THRLL X LOLIM HYS <=LIM %

24 & o B 500MS

25 OND / T T/ MS

INTERN_W/COOL-CT002 INTERN_cool-cond-CD Conduct 0-4uS

2% UAC096_cool-temp-CT004 -20% 31 ADD +1 +2 % 125% 32 MULT X Y X*Y %

28 THRLL X LOLIM HYS <=LIM %

29 & o B 500MS

30 OND / T T/ MS

INTERN_W/COOL-CD001 INTERN_cool-temp-CT

2% UAC096_cool-temp-CT005 -20% 36 ADD +1 +2 % 125% 37 MULT X Y X*Y %

33 THRLL X LOLIM HYS <=LIM %

34 & o B 500ms

35 OND / T T/ MS

INTERN_W/COOL-CT004 INTERN_cool-temp-CT

2%

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

38 THRLL X LOLIM HYS <=LIM %

39 & o B 41 & 500ms

40 OND / T T/ MS

INTERN_W/COOL-CT005

2S

42 OFD \ T T\ S <

INTERN_W/COOL-POWR43 OND / T T/ S INTERN_F/COOL-POWR-

ParamGrp_del-power-fail-T 5S 44 >=1

INTERN_W/COOL-SENS-

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C001/S002 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser BACKGND S02:COOL-INPUT CYCLOC.COOLING / INPUT SIGNALS


released:

A4 E

12

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

S INPUT CROSSREFERENCE: ParamGrp_cool-cond-CD001

Source: Sink : ParamGrp_del-SENS-FAIL-T Source: Sink : ParamGrp_del-power-fail-T Source: Sink : ParamGrp_lifezero-mon Source: Sink : UAC096_cool-cond-CD001 Source: Sink : UAC096_cool-flow-CF001 Source: Sink : UAC096_cool-level-CL001 Source: Sink : UAC096_cool-press-CP001 Source: Sink : UAC096_cool-temp-CT001 Source: Sink : UAC096_cool-temp-CT002 Source: Sink : UAC096_cool-temp-CT004 Source: Sink : UAC096_cool-temp-CT005 Source: Sink : OUTPUT CROSSREFERENCE: INTERN_F/COOL-POWR-FAIL INTERN_F/COOL-SENS-FAIL INTERN_W/COOL-CD001 INTERN_W/COOL-CF001 INTERN_W/COOL-CL001 INTERN_W/COOL-CP001 INTERN_W/COOL-CT001 INTERN_W/COOL-CT002 INTERN_W/COOL-CT004 INTERN_W/COOL-CT005 INTERN_W/COOL-POWR-FAIL INTERN_W/COOL-SENS-FAIL INTERN_cool-cond-CD001 INTERN_cool-flow-CF001 INTERN_cool-level-CL001 INTERN_cool-press-CP001 INTERN_cool-temp-CT001

? BACKGND\S02:COOL-INPUT ? BACKGND\S02:COOL-INPUT ? BACKGND\S02:COOL-INPUT ? BACKGND\S02:COOL-INPUT ? BACKGND\S02:COOL-INPUT ? BACKGND\S02:COOL-INPUT ? BACKGND\S02:COOL-INPUT ? BACKGND\S02:COOL-INPUT ? BACKGND\S02:COOL-INPUT ? BACKGND\S02:COOL-INPUT ? BACKGND\S02:COOL-INPUT ? BACKGND\S02:COOL-INPUT

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_cool-temp-CT002 INTERN_cool-temp-CT004 INTERN_cool-temp-CT005

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY BACKGND\S02:COOL-INPUT INT3\S05:FAULT-EVENT6 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY BACKGND\S02:COOL-INPUT BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY BACKGND\S02:COOL-INPUT BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY BACKGND\S02:COOL-INPUT BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY BACKGND\S02:COOL-INPUT BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY BACKGND\S02:COOL-INPUT BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY BACKGND\S02:COOL-INPUT BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY BACKGND\S02:COOL-INPUT BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C001/S002 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser BACKGND S02:COOL-INPUT CYCLOC.COOLING / INPUT SIGNALS


released:

A4 E

13

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

50.00610%

2%

ParamGrp_cool-temp-cv-T 55.00488% INTERN_cool-flow-CF001 Flow 0-380l/min ParamGrp_cool-flow-conv-T 54.00391%

5 THRLL X 2% LOLIM HYS <=LIM % 6 >=1 B

2%

HYS >=LIM % 3 THRUL X UPLIM HYS >=LIM % 7 &

OND 2S / T T/ S 4 OND 2S / T T/ S INTERN_F/COOL-TEMPINTERN_W/COOL-TEMP-

INTERN_AUX-RUNNING INTERN_COOL-PUMP1or2-ON

8 OND / B T 9 THRLL X 2% LOLIM HYS <=LIM % o o 11 THRLL X LOLIM HYS <=LIM % 14 & B B INTERN_W/COOL-LEVEL T/ S INTERN_F/COOL-FLOW-

ParamGrp_del-cool-flow-T 5S INTERN_cool-level-CL001 Wat Level 0-100% ParamGrp_cool-level-A 75.00000% INTERN_W/COOL-POWR-FAIL INTERN_W/COOL-SENS-FAIL

10 &

ParamGrp_cool-level-T 50.00000% INTERN_cool-press-CP001 Wat Press 0-6bar ParamGrp_cool-press-A 25.00000%

13 THRLL X 2% LOLIM HYS <=LIM %

2%

12 & o o B 15 OND / T T/ MS 16 OND / T T/ S 18 OND / T T/ S 20 OND / T T/ S INTERN_W/COOL-PRESS INTERN_F/COOL-LEVEL

ParamGrp_del-cool-press-A 1000MS

ParamGrp_del-cool-press-T 5S INTERN_cool-temp-CT002 T Cv Out 0-100G ParamGrp_cool-tmp-cvout-A 52.00195% 17 THRUL X 2% UPLIM HYS >=LIM % 19 THRUL X UPLIM HYS >=LIM % 22 &

INTERN_F/COOL-PRESS

2S

INTERN_W/COOL-TMP-CV

ParamGrp_cool-tmp-cvout-T 57.01294%

2%

2S

INTERN_F/COOL-TMP-CV

INTERN_cool-cond-CD001 Conduct 0-4uS ParamGrp_cool-cond-A 25.00000% ParamGrp_del-cool-cond-A 10S

21 THRUL X 2% UPLIM HYS >=LIM % 23 OND / B T T/ S 24 THRUL X UPLIM HYS >=LIM % INTERN_W/COOL-COND

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

ParamGrp_cool-cond-T 50.00000%

2%

INTERN_F/COOL-COND

INPUT CROSSREFERENCE: INTERN_AUX-RUNNING INTERN_COOL-PUMP1or2-ON INTERN_W/COOL-POWR-FAIL INTERN_W/COOL-SENS-FAIL INTERN_cool-cond-CD001 INTERN_cool-flow-CF001 INTERN_cool-level-CL001 INTERN_cool-press-CP001

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S13:START-UP-AUX INT3\S16:START/STOP BACKGND\S03:COOL-MONITOR PANEL-AFC094\S06:LED-CONTROL2 INT3\S15:MVD-ON-OFF INT3\S17:MILL-ON,WR INT3\S14:START-UP-AUX BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY BACKGND\S02:COOL-INPUT BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY BACKGND\S02:COOL-INPUT BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY BACKGND\S02:COOL-INPUT BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C001/S003 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser BACKGND S03:COOL-MONITOR CYCLOC.COOLING MONITORING


released:

A4 E

14

3BHS135699

ParamGrp_cool-cond-A ParamGrp_cool-cond-T ParamGrp_cool-flow-conv-T ParamGrp_cool-level-A ParamGrp_cool-level-T ParamGrp_cool-press-A ParamGrp_cool-temp-cv-A ParamGrp_cool-temp-cv-T ParamGrp_cool-tmp-cvout-A ParamGrp_cool-tmp-cvout-T ParamGrp_del-cool-cond-A ParamGrp_del-cool-flow-T ParamGrp_del-cool-press-A ParamGrp_del-cool-press-T

Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY ? BACKGND\S03:COOL-MONITOR ? BACKGND\S03:COOL-MONITOR ? BACKGND\S03:COOL-MONITOR ? BACKGND\S03:COOL-MONITOR ? BACKGND\S03:COOL-MONITOR ? BACKGND\S03:COOL-MONITOR ? BACKGND\S03:COOL-MONITOR ? BACKGND\S03:COOL-MONITOR ? BACKGND\S03:COOL-MONITOR ? BACKGND\S03:COOL-MONITOR ? BACKGND\S03:COOL-MONITOR ? BACKGND\S03:COOL-MONITOR ? BACKGND\S03:COOL-MONITOR ? BACKGND\S03:COOL-MONITOR

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

OUTPUT CROSSREFERENCE: INTERN_F/COOL-COND INTERN_F/COOL-FLOW-CONV INTERN_F/COOL-LEVEL INTERN_F/COOL-PRESS INTERN_F/COOL-TEMP-CONV INTERN_F/COOL-TMP-CVOUT INTERN_W/COOL-COND INTERN_W/COOL-LEVEL INTERN_W/COOL-PRESS INTERN_W/COOL-TEMP-CONV INTERN_W/COOL-TMP-CVOUT

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

BACKGND\S03:COOL-MONITOR INT3\S05:FAULT-EVENT6 BACKGND\S03:COOL-MONITOR INT3\S14:START-UP-AUX INT3\S05:FAULT-EVENT6 BACKGND\S03:COOL-MONITOR INT3\S14:START-UP-AUX INT3\S05:FAULT-EVENT6 BACKGND\S03:COOL-MONITOR INT3\S05:FAULT-EVENT6 BACKGND\S03:COOL-MONITOR INT3\S05:FAULT-EVENT6 BACKGND\S03:COOL-MONITOR INT3\S05:FAULT-EVENT6 BACKGND\S03:COOL-MONITOR INT3\S07:WARN-EVENT8 BACKGND\S03:COOL-MONITOR INT3\S07:WARN-EVENT8 BACKGND\S03:COOL-MONITOR INT3\S14:START-UP-AUX INT3\S07:WARN-EVENT8 BACKGND\S03:COOL-MONITOR INT3\S07:WARN-EVENT8 BACKGND\S03:COOL-MONITOR INT3\S07:WARN-EVENT8

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C001/S003 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser BACKGND S03:COOL-MONITOR CYCLOC.COOLING MONITORING


released:

A4 E

15

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

PANEL_C>CENTRAL

3S

X1 B 2 MS / T /T\ S o

3 >=1

5 & B 4 >=1 B B 8 >=1 9 RSFF S

INTERN_START-PI*TAST ParamGrp_MODE-BYPASS 0B INTERN_C>SERVICE 6 SWI SELX1 X0 X1 B

7 >=1 B 10 & B B <

R Q 13 RSFF S 12 >=1 R B 14 & 11 SWI SELX1 X0 X1 B B < 15 >=1 R 17 o o o o B < & B Q INTERN_LCB-SEL Q INTERN_LOCAL-SEL INTERN_CENTRAL-SEL

MODBUS-O_LOCAL-SEL PANEL_C>LOCAL

MODBUS-O_LCB-SEL PANEL_C>LCB

16 RSFF S

INPUT CROSSREFERENCE: INTERN_C>SERVICE INTERN_START-PI*TAST MODBUS-O_CENTRAL-SEL MODBUS-O_LCB-SEL MODBUS-O_LOCAL-SEL PANEL_C>CENTRAL PANEL_C>LCB PANEL_C>LOCAL ParamGrp_MODE-BYPASS ParamGrp_MODE-SELECT

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S03:PANEL-INPUT2 BACKGND\S04:MODE-SELECT PANEL-AFC094\S06:LED-CONTROL2 INT3\S14:START-UP-AUX INT3\S16:START/STOP INT3\S17:MILL-ON,WR BACKGND\S04:MODE-SELECT INT3\S22:STATUS-INDIC INT3\S12:PRIOSEL-4 INT3-MODBUS\S01:MODBUS-OUT1 BACKGND\S04:MODE-SELECT INT3-MODBUS\S01:MODBUS-OUT1 BACKGND\S04:MODE-SELECT INT3-MODBUS\S01:MODBUS-OUT1 BACKGND\S04:MODE-SELECT INT3\S02:PANEL-INPUT1 BACKGND\S04:MODE-SELECT INT3\S03:PANEL-INPUT2 INT3\S02:PANEL-INPUT1 BACKGND\S04:MODE-SELECT INT3\S02:PANEL-INPUT1 BACKGND\S04:MODE-SELECT INT3\S03:PANEL-INPUT2 ? BACKGND\S04:MODE-SELECT ? BACKGND\S04:MODE-SELECT

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

OUTPUT CROSSREFERENCE: INTERN_CENTRAL-SEL

INTERN_LCB-SEL

INTERN_LOCAL-SEL

Source: BACKGND\S04:MODE-SELECT Sink : INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 INT3\S18:BRAKE-HORN INT3\S14:START-UP-AUX INT3\S11:PRIOSEL-3 INT3\S10:PRIOSEL-2 INT3\S15:MVD-ON-OFF INT3\S16:START/STOP INT3\S17:MILL-ON,WR INT3\S12:PRIOSEL-4 INT2\S17:NW2 INT2\S1 Source: BACKGND\S04:MODE-SELECT Sink : INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 PANEL-AFC094\S04:LED:F1-F16 INT3\S14:START-UP-AUX INT3\S11:PRIO INT3\S22:STATUS-INDIC INT3\S16:START/STOP INT3\S21:RESET/LT INT3\S12:PRIOSEL-4 Source: BACKGND\S04:MODE-SELECT Sink : PANEL-AFC094\S06:LED-CONTROL2 INT3\S14:START-UP-AUX INT3\S10:PRIOSEL-2 INT3\S22:STATUS-INDIC INT3\S12:PRIOSEL-4

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C001/S004 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser BACKGND S04:MODE-SELECT Mode Selection, Central-Local-MLCB


released:

A4 E

16

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

80% = 9.043 rpm INTERN_/UN/ ParamGrp_/UN/-panel 125.00000% INTERN_[ixe] 125% ParamGrp_ixe 187.50000% 4 MULT X Y X*Y %

% 3 MULT X Y X*Y % 5 MULT X Y X*Y % 6 MULT X Y X*Y % 7 MULT X Y X*Y % 8 TRAN % PANEL_i-pi/uxMA PANEL_i-pi/ixe PANEL_i-pi/UN

INTERN_uxM-eff ParamGrp_uxM-adaptation 176.77002%

UAC326-1_i-pi/ixe UAC326-2_/AS-sig

ParamGrp_Angle-shifting 0.00000% PANEL /UN/ : 23kV = 80% =>CALIBRATION : 1500 A = 80% =>CALIBRATION ; Panel 100% = 23000V : 125% (100% x ((23000x100)/(23000x80))) ; Panel 100% = 800 A : 234.375% (100% x ((1500x100)/(800x80)))

[ixe]

uxMA-eff: 5200 V = 56.568%; Panel 100% = 5200 V =>CALIBRATION : 176.77% (100% x ((5200x100)/(5200x56.568))) ANALOG METERS [ixe] : 1500A = 8V =>CALIBRATION ; Analog Meter : 0-800A = 0-10V : 234.375% (100% x ((1500x10)/(800x8)))

Firing angle shifting = 0%

INPUT CROSSREFERENCE: INTERN_/UN/ INTERN_/nw/ INTERN_[ixe] INTERN_nx

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_uxM-eff ParamGrp_/UN/-panel ParamGrp_Angle-shifting ParamGrp_ixe

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

ParamGrp_uxM-adaptation

INT0\S07:FILTER5 BACKGND\S05:I-ANALOG-ADP INT1\S06:DET-UE/IE,UN INT0\S07:FILTER5 INT2\S17:NW2 BACKGND\S06:SELECT-IND BACKGND\S05:I-ANALOG-ADP INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S21:PSIW INT2\S18:CONTROL-N INT0\S06:FILTER4 BACKGND\S05:I-ANALOG-ADP INT1\S06:DET-UE/IE,UN INT2\S13:NX BACKGND\S06:SELECT-IND BACKGND\S05:I-ANALOG-ADP INT3-MODBUS\S05:ANALOG-OUT-1 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIF INT2\S20:ANTIVOLT INT2\S18:CONTROL-N INT2\S27:MOT-POWER BACKGND\S05:I-ANALOG-ADP ? BACKGND\S05:I-ANALOG-ADP ? BACKGND\S05:I-ANALOG-ADP ? BACKGND\S05:I-ANALOG-ADP ? BACKGND\S05:I-ANALOG-ADP

OUTPUT CROSSREFERENCE: PANEL_i-pi/UN PANEL_i-pi/ixe PANEL_i-pi/nref PANEL_i-pi/nx PANEL_i-pi/uxMA UAC326-1_i-pi/ixe UAC326-2_/AS-sig

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

BACKGND\S05:I-ANALOG-ADP LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 PANEL-AFC094\S02:PANL-DISPLAY BACKGND\S05:I-ANALOG-ADP LCB-AFC094\S01:TRANS-ANALOG PANEL-AFC094\S02:PANL-DISPLAY BACKGND\S05:I-ANALOG-ADP LCB-AFC094\S01:TRANS-ANALOG PANEL-AFC094\S02:PANL-DISPLAY BACKGND\S05:I-ANALOG-ADP LCB-AFC094\S01:TRANS-ANALOG PANEL-AFC094\S02:PANL-DISPLAY BACKGND\S05:I-ANALOG-ADP LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 PANEL-AFC094\S02:PANL-DISPLAY BACKGND\S05:I-ANALOG-ADP INT3-MODBUS\S06:ANALOG-OUT-2 BACKGND\S05:I-ANALOG-ADP ?

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C001/S005 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser BACKGND S05:I-ANALOG-ADP ADAPTATION FOR ANALOG INDICATION


released:

A4 E

17

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

% INTERN_SI:C-iw INTERN_++iw % INTERN_SI:C-nx INTERN_nx 80% = 9.043 rpm INTERN_SI:C-psiw 0% INTERN_+psiw 4 ABS % 0% 2 ABS 0% 3 SWI SELX1 X0 X1 % 5 SWI SELX1 X0 X1 % 6 SWI SELX1 X0 X1 % 7 SWI SELX1 X0 X1 % 8 SWI SELX1 X0 X1 %

+2

+3

+4

INTERN_SI:C-psix 0% INTERN_[psix]

+5

INTERN_SI:C-dpsiT 0% INTERN_+delta-psi-T

+6 % 10 >=1 B 11 >=1

UAC326-1_pi/si

INTERN_LampTEST

UDA327:2_C>CC-SI:nw

UDA327:2_C>CC-SI:iw B 12 >=1 UDA327:2_C>CC-SI:nx B 13 >=1 UDA327:2_C>CC-SI:ps B 14 >=1 UDA327:2_C>CC-SI:ps B 15 >=1 UDA327:2_C>CC-SI:dP B nw : 8V = 9.043 rpm +iw : 8V = 2450 A +psiw : 8V = psiwn [psix] : 8V = psixn +delta-psi-T : 8V = 100% psin

INPUT CROSSREFERENCE: INTERN_++iw INTERN_+delta-psi-T INTERN_+psiw

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_/nw/ INTERN_LampTEST INTERN_SI:C-dpsiT INTERN_SI:C-iw INTERN_SI:C-nw INTERN_SI:C-nx INTERN_SI:C-psiw INTERN_SI:C-psix INTERN_[psix] INTERN_nx

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT2\S22:COSPHI2 BACKGND\S06:SELECT-IND INT2\S23:EXCITAT-1 INT2\S22:COSPHI2 INT1\S24:TRAPEZ BACKGND\S06:SELECT-IND INT1\S24:TRAPEZ INT2\S15:NX-LIMITS INT2\S21:PSIW BACKGND\S06:SELECT-IND INT1\S24:TRAPEZ INT2\S23:EXCITAT-1 INT2\S17:NW2 BACKGND\S06:SELECT-IND BACKGND\S05:I-ANALOG-ADP INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S21:PSIW INT2\S18:CONTROL-N INT3\S21:RESET/LT LCB-AFC094\S03:AFC094-LED BACKGND\S06:SELECT-IND PANEL-AFC094\S04:LED:F1-F16 PANEL-AFC094\S03:PANEL-OUT INT3\S22:STATU BACKGND\S01:SELECT-DECO BACKGND\S06:SELECT-IND BACKGND\S01:SELECT-DECO BACKGND\S06:SELECT-IND BACKGND\S01:SELECT-DECO BACKGND\S06:SELECT-IND BACKGND\S01:SELECT-DECO BACKGND\S06:SELECT-IND BACKGND\S01:SELECT-DECO BACKGND\S06:SELECT-IND BACKGND\S01:SELECT-DECO BACKGND\S06:SELECT-IND INT2\S10:INTEG7 BACKGND\S06:SELECT-IND INT1\S26:RECORDING INT2\S23:EXCITAT-1 INT2\S20:ANTIVOLT INT2\S13:NX INT2\S10:INTEG7 INT2\S13:NX BACKGND\S06:SELECT-IND BACKGND\S05:I-ANALOG-ADP INT3-MODBUS\S05:ANALOG-OUT-1 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIF

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C001/S006 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser BACKGND S06:SELECT-IND SELECTIVE INDICATION OUTPUTS


released:

A4 E

18

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

UAC326-1_pi/si UDA327:2_C>CC-SI:dPSIT UDA327:2_C>CC-SI:iw UDA327:2_C>CC-SI:nw UDA327:2_C>CC-SI:nx UDA327:2_C>CC-SI:psi-w UDA327:2_C>CC-SI:psi-x

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

BACKGND\S06:SELECT-IND ? BACKGND\S06:SELECT-IND INT2\S34:TRANSFER/30 BACKGND\S06:SELECT-IND INT2\S34:TRANSFER/30 BACKGND\S06:SELECT-IND INT2\S34:TRANSFER/30 BACKGND\S06:SELECT-IND INT2\S34:TRANSFER/30 BACKGND\S06:SELECT-IND INT2\S34:TRANSFER/30 BACKGND\S06:SELECT-IND INT2\S34:TRANSFER/30

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C001/S006 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser BACKGND S06:SELECT-IND SELECTIVE INDICATION OUTPUTS


released:

A4 E

19

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

0B 0B 0B 0B 0B 0B 0B 0B 0B 0B 0B 0B 0B

.3 .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15 Y

2 WRLA

PSR_ActiveMaster

Motor datas for Collahuasi Project SAG Mill / 03.04.2004 min. rated max. starting speed speed speed torque 130%,30s -------------------------------------------------------------------power [kW] xxxxx 21000 21000 speed [rpm] xxxxx 9.043 9.776 freq. [Hz] xxxxx 5.727 6.191 U1 [V] xxxxx 5200 5200 I1 [A] xxxxx 2450 2450 3185 cos phi 0.97 => underexcited => If [A] 530 470 565 Uf [V] 471 418 502 field weakening range 9.043 - 9.776 rpm Creeping Speed 0.3 rpm. Inching Speed 1.3 rpm.

INPUT CROSSREFERENCE: OUTPUT CROSSREFERENCE: PSR_ActiveMaster

Source: INIT-HW\S01:ARCNET Sink : ?

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TI/C001/S001 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INIT-HW S01:ARCNET INITIALISATION OF ARCNET


released:

A4 E

20

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

0010H 0000H 0B 0B 0000H 1B 8006H 0000H 8100H 0101H 8101H 10% 8102H 153.1% 8103H 22.233%

SSIZE WAITST LFILL SFILL FILLV READY PADD1 PVAL1 PADD2 PVAL2 PADD3 PVAL3 PADD4 PVAL4 PADD5 PVAL5 2 SLAVE-I GA LSIZE SBASE SSIZE WAITST LFILL SFILL FILLV READY PADD1 PVAL1 PADD2 PVAL2 PADD3 PVAL3 PADD4 PVAL4 PADD5 PVAL5

000AH 0200H 0160H 0010H 0H 0B 0B 0000H 1B 8006H 0000H 8100H 0103H 8101H 10% 8102H 153.1% 8103H 22.233%

HW :

=VA Gate Controler GDB 021 for Phase R1 GA=7 " Phase R2 GA=10 **************************************************** Data according curve from IAAD document 3BHS123040 PVAL3 : Rectifier limit 10% PVAL4 : Inverter limit 153.1 degree (153.1%) PVAL5 : Inverter limit Id depending (22.233%)

INPUT CROSSREFERENCE: OUTPUT CROSSREFERENCE:

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TI/C001/S002 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INIT-HW S02:GDB021-R Initialisation GATE CONTROL UNIT GDB021E-R

A4 E

21

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

0010H 0H 0B 0B 0000H 1B 8006H 0000H 8100H 0101H 8101H 10% 8102H 153.1% 8103H 22.233%

SSIZE WAITST LFILL SFILL FILLV READY PADD1 PVAL1 PADD2 PVAL2 PADD3 PVAL3 PADD4 PVAL4 PADD5 PVAL5 2 SLAVE-I GA LSIZE SBASE SSIZE WAITST LFILL SFILL FILLV READY PADD1 PVAL1 PADD2 PVAL2 PADD3 PVAL3 PADD4 PVAL4 PADD5 PVAL5

000BH 0200H 0180H 0010H 0000H 0B 0B 0000H 1B 8006H 0000H 8100H 0103H 8101H 10% 8102H 153.1% 8103H 22.233%

HW: =.VA

Gate Controler GDB 021 for Phase S1 S2

GA=8 GA=11

PVAL3,PVAL4,PVAL5,PVAL6 same as Gate Controler Phase R

INPUT CROSSREFERENCE: OUTPUT CROSSREFERENCE:

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TI/C001/S003 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INIT-HW S03:GDB021-S Initialisation GATE CONTROL UNIT GDB021E-S

A4 E

22

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

0010H 0H 0B 0B 0000H 1B 8006H 0000H 8100H 0101H 8101H 10% 8102H 153.1% 8103H 22.233%

SSIZE WAITST LFILL SFILL FILLV READY PADD1 PVAL1 PADD2 PVAL2 PADD3 PVAL3 PADD4 PVAL4 PADD5 PVAL5 2 SLAVE-I GA LSIZE SBASE SSIZE WAITST LFILL SFILL FILLV READY PADD1 PVAL1 PADD2 PVAL2 PADD3 PVAL3 PADD4 PVAL4 PADD5 PVAL5

000CH 0200H 01A0H 0010H 0000H 0B 0B 0000H 1B 8006H 0000H 8100H 0103H 8101H 10% 8102H 153.1% 8103H 22.233%

HW: =.VA

Gate Controler GDB 021 for Phase T1 T2

GA=9 GA=12

PVAL3,PVAL4,PVAL5,PVAL6 same as Gate Controler Phase R

INPUT CROSSREFERENCE: OUTPUT CROSSREFERENCE:

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TI/C001/S004 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INIT-HW S04:GDB021-T Initialisation GATE CONTROL UNIT GDB021E-T

A4 E

23

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

0020H 0000H 0B 1B 0000H 1B 007CH 0003H 007EH 0003H

SSIZE WAITST LFILL SFILL FILLV READY PADD1 PVAL1 PADD2 PVAL2 2 SLAVE-I GA LSIZE SBASE SSIZE WAITST LFILL SFILL FILLV READY PADD1 PVAL1 PADD2 PVAL2

0006H 0100H 0080H 0020H 0000H 0B 1B 0000H 1B 009CH 0003H 009EH 0003H

HW: =.VA.. HW: =.VA.. GA

Combi(1) I/O Combi(2) I/O

UAC326AE UAC326AE

: Geographic address of the device GA of the Combi I/O-1 = 5, must correspond to the DIL switches on the device GA of the Combi I/O-2 = 6, : 100H : 60H : 80H : 20H

-LSIZE: Long address range SIZE, Combi-I/O -SBASE: Short address range BASE,Combi-I/O-1 Combi-I/O-2 -SSIZE: Short address range SIZE,Combi-I/O -WAITst: WAIT STates, Combi-I/O : 0H

-LFILL: FALSE, do not fill long address range with default value -SFILL: TRUE, fill short address range with dafault value -FILLV: 0000H, default value to fill short address range with -READY: Desables the Init-Mode -PAAD1: Address of parameter to set synchronous/asynchronous inputs Address = SBASE + 1C H -PVAL1: 0001H = binary input asynchronous, analog inputs synchronous -PAAD2: Address of parameter to set synchronous/asynchronous outputs Address = SBASE + 1E H -PVAL2: 0001H = binary outputs asynchronous, analog outputs synchronous

INPUT CROSSREFERENCE: OUTPUT CROSSREFERENCE:

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TI/C001/S005 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INIT-HW S05:UAC326 INITIALISATION OF KOMBI 1&2- UAC326AE


released:

A4 E

24

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

0040H 0006H 1B 1B 0000H 1B 8006H ParamGrp_Dubugger 0000H ParamGrp_Chagparam 001EH ParamGrp_Com-Time-Out 1388H ParamGrp_Dev-Adress 0006H 8103H 8102H 8101H

SSIZE WAITST LFILL SFILL FILLV READY PADD1 PVAL1 PADD2 PVAL2 PADD3 PVAL3 PADD4 PVAL4

UNIVERSAL PROCESSOR TYPE: PM A324 BE -----------------------------------FIRMWARE: AEG MODICOM MODBUS MODIFICATION HIEE 401 118 R4 DEVICE: COUPLER UNIT<->MMI

CHANNEL PARAMETER ***************** OFFSET: 101H

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

----------------------------------------------------------| Bit | F E D C B A 9 8 | 7 6 | 5 4 | 3 | 2 1 0 | |-----|-----------------------------------------------------| | not used | stop |parity|bit| baudrate| | | | bits | |per| | | | | | |cha| | |-----------------------------------------------------------Example | | 0 | 0 | 1 | 1 | 1 1 0 | ----------------------------------------------------------^ ^ ^ ^ | | | | | | | | | | | | | | | | NUMBER OF STOP BITS:________________________| | | | ------------------| | | STOP BITS = 0 1 STOP BIT | | | STOP BITS = 1 1 1/2 STOP BIT | | | STOP BITS = 2 2 STOP BITS | | | STOP BITS = 3 3 STOP BITS | | | | | | | | | PARITY:____________________________________________| | | -----| | PARITY = 0 ODD PARITY | | PARITY = 1 EVEN PARITY | | PARITY = 2 NO PARITY | | PARITY = 3 NO PARITY | | | | | | BITS PER CHARACTER:_____________________________________| | -----------------| BITSPERCHAR = 0 7 BITS | BITSPERCHAR = 1 8 BITS | | | DATA TRANSFER RATE:____________________________________________| -----------------BAUD RATE = 0 50 BAUD BAUD RATE = 4 2400 BAUD BAUD RATE = 1 150 BAUD BAUD RATE = 5 4800 BAUD BAUD RATE = 2 300 BAUD BAUD RATE = 6 9600 BAUD BAUD RATE = 3 1200 BAUD BAUD RATE = 7 19200 BAUD

= 01E (Hex)

MODBUS TIME-OUT *************** OFFSET: 102H MULTIPLE OF MILLISECONDS IN HEX 5sec = 5000ms => 1388H

MODBUS SLAVE ADDRESS ******************** OFFSET: 103H DEFAULT: 0001H VALID VALUES: 1..247(DEC)

=>

1..F7(HEX)

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TI/C001/S006 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INIT-HW S06:PMA324


released:

A4 E

25

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INPUT CROSSREFERENCE: ParamGrp_Chagparam ParamGrp_Com-Time-Out ParamGrp_Dev-Adress ParamGrp_Dubugger

Source: Sink : Source: Sink : Source: Sink : Source: Sink :

? INIT-HW\S06:PMA324 ? INIT-HW\S06:PMA324 ? INIT-HW\S06:PMA324 ? INIT-HW\S06:PMA324

OUTPUT CROSSREFERENCE:

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TI/C001/S006 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INIT-HW S06:PMA324


released:

A4 E

26

3BHS135699

change

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.
INPUT CROSSREFERENCE: OUTPUT CROSSREFERENCE:

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

PSR FUPLA2 Release 4.B1

Collahuasi Project SAG Mill / Run Program

replaces:

INT 0: 0.833ms (CLK 0) , SET IN CONFMANA.CFM INT 1: 1.667ms (2 x INT0)

office resp.:

replaced by:

derived from:

Johannes Gonser

issued:

checked:

ATBDE / J.Gonser INT0 S01:INIT-INT1 INIT-ROUTINE FOR INTERRUPT 1

released:

std. checked:

05-08-26
0002H SEL

doc. type

format

A4 E

language

3BHS135699

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T0/C001/S001 F01/K01

27

sht. nr.

nr. of shts.

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

.1 .2 .3 .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15 ParamGrp_OvervoltageDelay 8MS \ T T\ MS 3 OFD \ T T\ MS 4 OFD \ T T\ S

UDA327:1_S>-SWR UDA327:1_S>-TWR UDA327:1_S>RA UDA327:1_S>RB UDA327:1_S>SA UDA327:1_S>SB UDA327:1_S>TA UDA327:1_S>TB UDA327:1_F>CC:U>T1 UDA327:1_F>CC:U>T2 UDA327:1_F>CC:FUSES UDA327:1_F>DCF 2 OFD UDA327:1_F>CC:U>V

UDA327:1_F>CC:U>W

3s

UDA327:1_F>DCF:RFO

INPUT CROSSREFERENCE: ParamGrp_OvervoltageDelay Source: Sink : UDA327-1_>00 Source: Sink : OUTPUT CROSSREFERENCE: UDA327:1_F>CC:FUSES-AUX-T Source: Sink : UDA327:1_F>CC:U>T1 Source: Sink : UDA327:1_F>CC:U>T2 Source: Sink : UDA327:1_F>CC:U>V Source: Sink : UDA327:1_F>CC:U>W Source: Sink : UDA327:1_F>DCF Source: Sink : UDA327:1_F>DCF:RFO Source: Sink : UDA327:1_S>-RWR Source: Sink : UDA327:1_S>-SWR Source: Sink : UDA327:1_S>-TWR Source: Sink : UDA327:1_S>RA Source: Sink : UDA327:1_S>RB Source: Sink : UDA327:1_S>SA Source: Sink : UDA327:1_S>SB Source: Sink : UDA327:1_S>TA Source: Sink : UDA327:1_S>TB Source: Sink :

? INT1\S03:TRANSF>80 INT0\S02:TRANSF>00 ? INT0\S02:TRANSF>00

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INT0\S02:TRANSF>00 INT1\S10:FAULT-EVENT3 INT0\S02:TRANSF>00 INT1\S10:FAULT-EVENT3 INT0\S02:TRANSF>00 INT1\S10:FAULT-EVENT3 INT0\S02:TRANSF>00 INT1\S10:FAULT-EVENT3 INT0\S02:TRANSF>00 INT1\S10:FAULT-EVENT3 INT0\S02:TRANSF>00 INT1\S11:FAULT-EVENT4 INT0\S02:TRANSF>00 INT1\S11:FAULT-EVENT4 INT3\S08:WARN-EVENT9 INT0\S02:TRANSF>00 INT1\S20:UST-R INT1\S15:BRDGE-COMMUT INT0\S02:TRANSF>00 INT1\S21:UST-S INT1\S15:BRDGE-COMMUT INT0\S02:TRANSF>00 INT1\S22:UST-T INT1\S15:BRDGE-COMMUT INT0\S02:TRANSF>00 INT1\S04:DETECT-I> INT0\S02:TRANSF>00 INT1\S04:DETECT-I> INT0\S08:IX-COMMUTAT INT0\S02:TRANSF>00 INT1\S04:DETECT-I> INT0\S02:TRANSF>00 INT1\S04:DETECT-I> INT0\S08:IX-COMMUTAT INT0\S02:TRANSF>00 INT1\S04:DETECT-I> INT0\S02:TRANSF>00 INT1\S04:DETECT-I> INT0\S08:IX-COMMUTAT

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T0/C001/S002 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT0 S02:TRANSF>00 TRANSFER TO UDA327-1 (BI/BO) BIN.INPUT


released:

A4 E

28

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

% 25%

166.66%

UAC326-1_s>+[ixS1] 133.3%

3 MULT X Y X*Y % 5 MULT X Y X*Y %

2 AVG-M + K(%) Y IK-1 IK-2 IK-3 4 LIM X XLIM UPLIM >UL LOLIM <LL %

INTERN_/[ixR1]/

GDB-R1_Id

199% 0%

INTERN_[ixS1] 6 AVG-M + K(%) Y IK-1 IK-2 IK-3 8 LIM X XLIM UPLIM >UL LOLIM <LL %

25%

INTERN_/[ixS1]/

166.66%

UAC326-1_s>+[ixT1] 133.3%

7 MULT X Y X*Y % 9 MULT X Y X*Y %

GDB-S1_Id

199% 0%

INTERN_[ixT1] 10 AVG-M + K(%) Y IK-1 IK-2 IK-3 12 199% 0% LIM X XLIM UPLIM >UL LOLIM <LL % GDB-T1_Id

25%

INTERN_/[ixT1]/

166.66%

11 MULT X Y X*Y %

Ig = 2450A => I^g = 3465A R,S,T s>+[ix.] [ix.] : INPUT I^g = : OUTPUT = 60% 80% => => 6V = 3465A 8V = 3465A

INPUT CROSSREFERENCE: UAC326-1_s>+[ixR1] UAC326-1_s>+[ixS1] UAC326-1_s>+[ixT1]

Source: Sink : Source: Sink : Source: Sink :

? INT0\S03:FILTER1 ? INT0\S03:FILTER1 ? INT0\S03:FILTER1

OUTPUT CROSSREFERENCE: GDB-R1_Id GDB-S1_Id GDB-T1_Id

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_/[ixR1]/ INTERN_/[ixS1]/ INTERN_/[ixT1]/ INTERN_[ixR1] INTERN_[ixS1] INTERN_[ixT1]

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT0\S03:FILTER1 ? INT0\S03:FILTER1 ? INT0\S03:FILTER1 ? INT0\S03:FILTER1 INT1\S26:RECORDING INT2\S27:MOT-POWER INT0\S08:IX-COMMUTAT INT0\S03:FILTER1 INT1\S26:RECORDING INT2\S27:MOT-POWER INT0\S08:IX-COMMUTAT INT0\S03:FILTER1 INT1\S26:RECORDING INT2\S27:MOT-POWER INT0\S08:IX-COMMUTAT INT0\S03:FILTER1 INT1\S05:DETECT-I*T INT1\S04:DETECT-I> INT0\S03:FILTER1 INT0\S03:FILTER1 INT1\S05:DETECT-I*T INT1\S04:DETECT-I> INT0\S03:FILTER1 INT0\S03:FILTER1 INT1\S05:DETECT-I*T INT1\S04:DETECT-I> INT0\S03:FILTER1

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T0/C001/S003 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT0 S03:FILTER1 ACTUAL STATOR CURRENT ixR1;ixS1;ixT1


released:

A4 E

29

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

166.6%

MULT X Y X*Y %

% 3 LIM X XLIM UPLIM >UL LOLIM <LL % 4 MULT X 133.3% Y X*Y % 6 LIM X XLIM 199% UPLIM >UL 0% LOLIM <LL % 7 MULT X 133.3% Y X*Y % 9 LIM X XLIM 199% UPLIM >UL 0% LOLIM <LL % 199% 0% GDB-R2_Id

UAC326-1_s>+[ixS2] 5 MULT X Y X*Y %

INTERN_[ixS2]

166.6%

GDB-S2_Id

UAC326-1_s>+[ixT2] 8 MULT X Y X*Y %

INTERN_[ixT2]

166.6%

GDB-T2_Id

INPUT CROSSREFERENCE: UAC326-1_s>+[ixR2] UAC326-1_s>+[ixS2] UAC326-1_s>+[ixT2]

Source: Sink : Source: Sink : Source: Sink :

? INT0\S04:FILTER2 ? INT0\S04:FILTER2 ? INT0\S04:FILTER2

OUTPUT CROSSREFERENCE: GDB-R2_Id GDB-S2_Id GDB-T2_Id INTERN_[ixR2] INTERN_[ixS2] INTERN_[ixT2]

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT0\S04:FILTER2 ? INT0\S04:FILTER2 ? INT0\S04:FILTER2 ? INT0\S04:FILTER2 INT1\S04:DETECT-I> INT0\S04:FILTER2 INT1\S04:DETECT-I> INT0\S04:FILTER2 INT1\S04:DETECT-I>

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T0/C001/S004 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT0 S04:FILTER2 ACTUAL STATOR CURRENT ixR2;ixS2;ixT2


released:

A4 E

30

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

IK-1 IK-2 IK-3 2 AVG-M + K(%) Y IK-1 IK-2 IK-3 3 AVG-M + K(%) Y IK-1 IK-2 IK-3

UAC326-1_s>uxMS 25%

INTERN_/uxMS/

UAC326-1_s>uxMT 25%

INTERN_/uxMT/

s>uxM.

: INPUT

80%

=>

8V = 5200 x 1.414/1.732 = 4245.8V (U^Mnph)

(UM = 5200 V)

INPUT CROSSREFERENCE: UAC326-1_s>uxMR UAC326-1_s>uxMS UAC326-1_s>uxMT

Source: Sink : Source: Sink : Source: Sink :

? INT0\S05:FILTER3 ? INT0\S05:FILTER3 ? INT0\S05:FILTER3

OUTPUT CROSSREFERENCE: INTERN_/uxMR/ INTERN_/uxMS/ INTERN_/uxMT/

Source: Sink : Source: Sink : Source: Sink :

INT0\S05:FILTER3 INT2\S27:MOT-POWER INT2\S05:INTEG2 INT0\S05:FILTER3 INT2\S05:INTEG2 INT0\S05:FILTER3 INT2\S05:INTEG2

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T0/C001/S005 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT0 S05:FILTER3 FILTER: uxMR/uxMS/uxMT STATOR VOLTAGE

A4 E

31

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

25%

K(%) Y IK-1 IK-2 IK-3 INTERN_[ixe]

s>+[ixe]

INPUT = 100% = 10V = 1500A OUTPUT = 80% = 8V = 1500A

INPUT CROSSREFERENCE: UAC326-1_s>+[ixe]

Source: ? Sink : INT0\S06:FILTER4

OUTPUT CROSSREFERENCE: INTERN_[ixe]

Source: INT0\S06:FILTER4 Sink : BACKGND\S05:I-ANALOG-ADP INT1\S06:DET-UE/IE,UN

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

07-02-16

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T0/C001/S006 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT0 S06:FILTER4 FILTER: ixe;uex EXCITATION CURRENT/VOLTAGE

A4 E

32

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

79.23584% % UAC326-2_s>Unet-R % ParamGrp_Unet-R-Lowlimit 85.00366% ParamGrp_Unet-R-supervis 20MS UAC326-2_s>Unet-S %

X*Y 2 ABS 0.5% 3 THRLL X LOLIM HYS <=LIM % 6 THRLL X LOLIM HYS <=LIM % 9 THRLL X LOLIM HYS <=LIM % 4 OND / T T/ MS 7 OND / T T/ MS 10 OND / T T/ MS 12 OND / T T/ S 14 OND / T T/ S 16 OND / T T/ S 22 >=1 5 ABS 0.5%

INTERN_/UN/

INTERN_Unet-R-U<85% Trip Undervolt

UAC326-2_s>Unet-T %

8 ABS 0.5% 11 THRLL X LOLIM HYS <=LIM % 13 THRLL X LOLIM HYS <=LIM % 15 THRLL X LOLIM HYS <=LIM %

INTERN_Unet-S-U<85% Trip Undervolt

INTERN_Unet-T-U<85% Trip Undervolt

ParamGrp_Unet-Low-Delay6 95.00122% ParamGrp_Unet-95%-Superv 60S

0.5%

INTERN_Unet-R-U<95% Trip Undervolt

0.5%

INTERN_Unet-S-U<95% Trip Undervolt

0.5%

ParamGrp_W-Unet-Delay 15MS

ParamGrp_/UN/-Low-Limit 76.00098%

0.5%

17 THRLL X LOLIM HYS <=LIM %

18 OND / T T/ MS 19 OND / T T/ MS 20 OND / T T/ MS 21 OND / T T/ MS 24 PEEK I01 28 O01 X1

INTERN_Unet-T-U<95% Trip Undervolt

INTERN_W/Unet<95% B MIN <<1 <<2

ParamGrp_eff-network 0030H

23 TRCNT N CNT CNT=N

I02 25 PEEK I01 I02 26 PEEK I01 I02

O01

X2 <<3

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

O01

X3 <<4 MIN INTERN_Min-Phase-Vo

ParamGrp_Scaling-UN 125.00000% GDB-R1_frequency ParamGrp_freq-adaption 100.00000% ParamGrp_frequency-Lo-lim 95.00122%

29 MULT X Y X*Y % 0.5%

27 MULT X Y X*Y % 30 THRLL X LOLIM HYS <=LIM % 31 THRUL X UPLIM HYS >=LIM %

X4 %

32 >=1

ParamGrp_frequency-Hi-lim 104.99878%

0.5%

INTERN_F/23kV-frequ B

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-12-06

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T0/C001/S007 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT0 S07:FILTER5 FILTER: ADAPTATION:(Un NETZ)


released:

A4 E

33

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

GDB021-R_unx :

INPUT = 100 % = 23kV = 10V OUTPUT = 80 % = 23kV = 8V

unx : direct on the BUS.

INPUT CROSSREFERENCE: GDB-R1_frequency

Source: Sink : GDB-R1_unx Source: Sink : ParamGrp_/UN/-Low-Limit Source: Sink : ParamGrp_GDB-Urefscal-int Source: Sink : ParamGrp_Scaling-UN Source: Sink : ParamGrp_Unet-95%-Superv Source: Sink : ParamGrp_Unet-Low-Delay6 Source: Sink : ParamGrp_Unet-R-Lowlimit Source: Sink : ParamGrp_Unet-R-supervis Source: Sink : ParamGrp_W-Unet-Delay Source: Sink : ParamGrp_eff-network Source: Sink : ParamGrp_freq-adaption Source: Sink : ParamGrp_frequency-Hi-lim Source: Sink : ParamGrp_frequency-Lo-lim Source: Sink : UAC326-2_s>Unet-R Source: Sink : UAC326-2_s>Unet-S Source: Sink : UAC326-2_s>Unet-T Source: Sink : OUTPUT CROSSREFERENCE: INTERN_/UN/ INTERN_F/23kV-frequency INTERN_Min-Phase-Volt INTERN_Unet-R-U<85% INTERN_Unet-R-U<95%-60s INTERN_Unet-S-U<85% INTERN_Unet-S-U<95%-60s INTERN_Unet-T-U<85% INTERN_Unet-T-U<95%-60s INTERN_W/Unet<95%

? INT0\S07:FILTER5 ? INT0\S07:FILTER5 ? INT0\S07:FILTER5 ? INT0\S07:FILTER5 ? INT0\S07:FILTER5 ? INT0\S07:FILTER5 ? INT0\S07:FILTER5 ? INT0\S07:FILTER5 ? INT0\S07:FILTER5 ? INT0\S07:FILTER5 ? INT0\S07:FILTER5 ? INT0\S07:FILTER5 ? INT0\S07:FILTER5 ? INT0\S07:FILTER5 ? INT0\S07:FILTER5 ? INT0\S07:FILTER5 ? INT0\S07:FILTER5

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT0\S07:FILTER5 BACKGND\S05:I-ANALOG-ADP INT1\S06:DET-UE/IE,UN INT0\S07:FILTER5 INT0\S07:FILTER5 INT2\S03:FAULT-EVENT5 INT0\S07:FILTER5 INT2\S15:NX-LIMITS INT0\S07:FILTER5 INT1\S08:FAULT-EVENT1 INT2\S03:FAULT-EVENT5 INT0\S07:FILTER5 INT1\S08:FAULT-EVENT1 INT2\S03:FAULT-EVENT5 INT0\S07:FILTER5 INT1\S08:FAULT-EVENT1 INT2\S03:FAULT-EVENT5 INT0\S07:FILTER5 INT1\S08:FAULT-EVENT1 INT2\S03:FAULT-EVENT5 INT0\S07:FILTER5 INT1\S08:FAULT-EVENT1 INT2\S03:FAULT-EVENT5 INT0\S07:FILTER5 INT1\S08:FAULT-EVENT1 INT2\S03:FAULT-EVENT5 INT0\S07:FILTER5 INT3\S06:WARN-EVENT7 INT2\S15:NX-LIMITS

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-12-06

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T0/C001/S007 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT0 S07:FILTER5 FILTER: ADAPTATION:(Un NETZ)


released:

A4 E

34

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

UDA327:1_S>SB INTERN_/[ixS1]/

o X1 % 2 SWI SELX1 X0 o X1 % 3 SWI SELX1 X0 o X1 % S>RB,S>SB,S>TB

INTERN_/ixR1/

INTERN_/ixS1/

UDA327:1_S>TB INTERN_/[ixT1]/

INTERN_/ixT1/

INPUT CROSSREFERENCE: INTERN_/[ixR1]/ INTERN_/[ixS1]/ INTERN_/[ixT1]/ UDA327:1_S>RB UDA327:1_S>SB UDA327:1_S>TB

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT0\S03:FILTER1 INT1\S26:RECORDING INT0\S03:FILTER1 INT1\S26:RECORDING INT0\S03:FILTER1 INT1\S26:RECORDING INT0\S02:TRANSF>00 INT1\S04:DETECT-I> INT0\S02:TRANSF>00 INT1\S04:DETECT-I> INT0\S02:TRANSF>00 INT1\S04:DETECT-I>

INT2\S27:MOT-POWER INT0\S08:IX-COMMUTAT INT2\S27:MOT-POWER INT0\S08:IX-COMMUTAT INT2\S27:MOT-POWER INT0\S08:IX-COMMUTAT INT0\S08:IX-COMMUTAT INT0\S08:IX-COMMUTAT INT0\S08:IX-COMMUTAT

OUTPUT CROSSREFERENCE: INTERN_/ixR1/ INTERN_/ixS1/ INTERN_/ixT1/

Source: Sink : Source: Sink : Source: Sink :

INT0\S08:IX-COMMUTAT INT1\S14:PHASE-SHIFT3 INT2\S36:UNBALANCE-IX INT2\S05:INTEG2 INT0\S08:IX-COMMUTAT INT1\S14:PHASE-SHIFT3 INT2\S36:UNBALANCE-IX INT2\S05:INTEG2 INT0\S08:IX-COMMUTAT INT1\S14:PHASE-SHIFT3 INT2\S36:UNBALANCE-IX INT2\S05:INTEG2

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T0/C001/S008 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT0 S08:IX-COMMUTAT CURRENT ACTUAL VALUES COMMUTATION


released:

A4 E

35

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

UDA327:1_C/SUB UDA327:1_C/TUB 1 UDA327:3_C/MVD2-ON UDA327:2_F>CSsum-SME B ParamGrp_DISEXCIT-pulse 20MS MS T T/ & o / 3 TOGFF CLK/ R Q 0B < UDA327:1_C/THYRSUP-FREI-1 UDA327:1_C/THYRSUP-FREI-2 0B 0B 0B 0B 0B 0B 0B 0B 2 OND

.2 .3

.4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15 Y UDA327-1_/10

HW: =.VA12

INPUT CROSSREFERENCE: ParamGrp_DISEXCIT-pulse

Source: Sink : UDA327:1_C/RUB Source: Sink : UDA327:1_C/SUB Source: Sink : UDA327:1_C/THYRSUP-FREI-1 Source: Sink : UDA327:1_C/THYRSUP-FREI-2 Source: Sink : UDA327:1_C/TUB Source: Sink : UDA327:1_C/WR-DDA353 Source: Sink : UDA327:2_F>CSsum-SME Source: Sink : UDA327:3_C/MVD2-ON Source: Sink : OUTPUT CROSSREFERENCE: UDA327-1_/10

? INT0\S09:TRANSF/10 INT1\S15:BRDGE-COMMUT INT0\S09:TRANSF/10 INT1\S15:BRDGE-COMMUT INT0\S09:TRANSF/10 INT1\S07:SUMMARY-F/W INT0\S09:TRANSF/10 ? INT0\S09:TRANSF/10 INT1\S15:BRDGE-COMMUT INT0\S09:TRANSF/10 INT1\S07:SUMMARY-F/W INT0\S09:TRANSF/10 INT1\S02:TRANSF>20/40 INT1\S11:FAULT-EVENT4 INT3\S05:FAULT-EVENT6 INT0\S09:TRANSF/10 INT1\S07:SUMMARY-F/W INT2\S34:TRANSFER/30 INT0\S09:TRANSF/10

Source: INT0\S09:TRANSF/10 Sink : ?

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T0/C001/S009 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT0 S09:TRANSF/10 TRANSFER TO UDA327_1 (BI/BO) BIN.OUTPUT

A4 E

36

3BHS135699

change

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.
INPUT CROSSREFERENCE: OUTPUT CROSSREFERENCE:

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

PSR FUPLA2 Release 4.B1

Collahuasi Project SAG Mill / Run Program

INT0: 0.833ms (CLK0) INT1: 1.667ms (2xINT0) INT2: 5.000ms (3xINT1)

replaces:

office resp.:

replaced by:

derived from:

Johannes Gonser

issued:

checked:

ATBDE / J.Gonser INT1 S01:INIT-INT2 INIT-ROUTINE FOR INTERRUPT 2

released:

std. checked:

05-08-26
0004H SEL

doc. type

format

A4 E

language

3BHS135699

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S001 F01/K01

37

sht. nr.

nr. of shts.

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

.1 .2 .3 .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 UDA327-3_>40 2 BSBI X .0 .1 .2 .3 .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15 3 RSFF S R Q .15

UDA327:2_F>-LTR1B UDA327:2_F>-LTS1A UDA327:2_F>-LTS1B UDA327:2_F>-LTT1A UDA327:2_F>-LTT1B UDA327:2_F>-LTR2A UDA327:2_F>-LTR2B UDA327:2_F>-LTS2A UDA327:2_F>-LTS2B UDA327:2_F>-LTT2A UDA327:2_F>-LTT2B UDA327:2_F>-LTEX UDA327:2_F>KX-48V UDA327:2_F>CSsum-SM

UDA327:2_F>CC:CIRC-B UDA327:3_F>CC:EMERG UDA327:3_F>COOL-WAT UDA327:3_F>Stator-T UDA327:3_S>CC:THYSU UDA327:3_W>CC:THYSU UDA327:3_F>CC:THYSU UDA327:3_F>Safety-C UDA327:3_S>MVD1-OFF

UDA327:3_S>MVD1-FEED UDA327:3_S>MVD1-AVA UDA327:3_S>MVD1-FAU UDA327:3_F>LCB-Exci

UDA327:3_S>MVD2-FEED UDA327:3_S>MVD2-AVA

UDA327:3_PowerPack-D

INTERN_RESET

4 o TRAN B

UDA327:3_S>MVD2-FAU

Digital Inputs UDA 327 (Board 2)

INPUT CROSSREFERENCE: INTERN_RESET

UDA327-2_>20 UDA327-3_>40

Source: INT3\S21:RESET/LT Sink : INT1\S10:FAULT-EVENT3 INT1\S25:TRANSFER/70 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:W INT2\S33:FROZENCHARGE INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 Source: ? Sink : INT1\S02:TRANSF>20/40 Source: ? Sink : INT1\S02:TRANSF>20/40

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

OUTPUT CROSSREFERENCE: UDA327:2_F>-LTEX UDA327:2_F>-LTR1A UDA327:2_F>-LTR1B UDA327:2_F>-LTR2A UDA327:2_F>-LTR2B UDA327:2_F>-LTS1A UDA327:2_F>-LTS1B UDA327:2_F>-LTS2A UDA327:2_F>-LTS2B UDA327:2_F>-LTT1A

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source:

INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S002 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S02:TRANSF>20/40 TRANSFER UDA327-2 BIN.IN/OUT


released:

A4 E

38

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

UDA327:2_F>-LTT2A UDA327:2_F>-LTT2B UDA327:2_F>CC:CIRC-BREAK UDA327:2_F>CSsum-SME UDA327:2_F>KX-48V UDA327:3_F>CC:EMERG-STOP UDA327:3_F>CC:THYSU-TRIP UDA327:3_F>COOL-WAT-LEAK UDA327:3_F>LCB-Exci-Trip UDA327:3_F>Safety-CSA-465 UDA327:3_F>Stator-Trans UDA327:3_PowerPack-Doors UDA327:3_S>CC:THYSU-READY UDA327:3_S>MVD1-AVAILABLE UDA327:3_S>MVD1-FAULT UDA327:3_S>MVD1-FEEDBACK UDA327:3_S>MVD1-OFF-FEDBK UDA327:3_S>MVD2-AVAILABLE UDA327:3_S>MVD2-FAULT UDA327:3_S>MVD2-FEEDBACK UDA327:3_W>CC:THYSU-ALARM

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S11:FAULT-EVENT4 INT1\S02:TRANSF>20/40 INT1\S11:FAULT-EVENT4 INT3\S05:FAULT-EVENT6 INT0\S09:TRANSF/10 INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S10:FAULT-EVENT3 INT3\S18:BRAKE-HORN INT1\S02:TRANSF>20/40 INT1\S10:FAULT-EVENT3 INT1\S02:TRANSF>20/40 INT3\S05:FAULT-EVENT6 INT1\S02:TRANSF>20/40 INT3\S05:FAULT-EVENT6 INT1\S02:TRANSF>20/40 INT1\S11:FAULT-EVENT4 INT3\S05:FAULT-EVENT6 INT1\S02:TRANSF>20/40 INT1\S11:FAULT-EVENT4 INT1\S02:TRANSF>20/40 INT1\S11:FAULT-EVENT4 INT1\S02:TRANSF>20/40 INT3\S06:WARN-EVENT7 INT1\S02:TRANSF>20/40 INT3-MODBUS\S03:STATUS-1 INT3\S08:WARN-EVENT9 INT1\S02:TRANSF>20/40 INT3-MODBUS\S03:STATUS-1 INT1\S08:FAULT-EVENT1 INT3\S15:MVD-ON-OFF INT1\S02:TRANSF>20/40 INT3-MODBUS\S03:STATUS-1 INT1\S07:SUMMARY-F/W INT3\S15:MVD-ON-OFF INT1\S02:TRANSF>20/40 INT3-MODBUS\S03:STATUS-1 INT1\S07:SUMMARY-F/W INT1\S02:TRANSF>20/40 INT3-MODBUS\S03:STATUS-1 INT3\S08:WARN-EVENT9 INT1\S02:TRANSF>20/40 INT3-MODBUS\S03:STATUS-1 INT1\S08:FAULT-EVENT1 INT3\S15:MVD-ON-OFF INT1\S02:TRANSF>20/40 INT3-MODBUS\S03:STATUS-1 INT3\S15:MVD-ON-OFF INT1\S02:TRANSF>20/40 ?

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S002 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S02:TRANSF>20/40 TRANSFER UDA327-2 BIN.IN/OUT


released:

A4 E

39

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

.1 .2 .3 .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15 ParamGrp_OvervoltageDelay 8MS MS Digital Inputs Combi I/O UAC 326 (Board 1) Digital Inputs Combi I/O UAC 326 (Board 2) 2 OFD \

KOMBI-2_F>CC:U>R2

KOMBI-2_F>CC:FUSES-A KOMBI-2_F>CC:FUSE-M KOMBI-2_F>CC:U>S1 KOMBI-2_F>CC:U>S2

KOMBI-2_F>CC:FUSES-A

T T\ KOMBI-2_F>CC:U>U

INPUT CROSSREFERENCE: ParamGrp_OvervoltageDelay Source: Sink : UAC326-2_>80 Source: Sink : OUTPUT CROSSREFERENCE: KOMBI-2_F>CC:FUSE-MSTAR KOMBI-2_F>CC:FUSES-AUX-R KOMBI-2_F>CC:FUSES-AUX-S KOMBI-2_F>CC:U>R1 KOMBI-2_F>CC:U>R2 KOMBI-2_F>CC:U>S1 KOMBI-2_F>CC:U>S2 KOMBI-2_F>CC:U>U

? INT1\S03:TRANSF>80 INT0\S02:TRANSF>00 ? INT1\S03:TRANSF>80

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S03:TRANSF>80 INT1\S10:FAULT-EVENT3 INT1\S03:TRANSF>80 INT1\S10:FAULT-EVENT3 INT1\S03:TRANSF>80 INT1\S10:FAULT-EVENT3 INT1\S03:TRANSF>80 INT1\S10:FAULT-EVENT3 INT1\S03:TRANSF>80 INT1\S10:FAULT-EVENT3 INT1\S03:TRANSF>80 INT1\S10:FAULT-EVENT3 INT1\S03:TRANSF>80 INT1\S10:FAULT-EVENT3 INT1\S03:TRANSF>80 INT1\S10:FAULT-EVENT3

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S003 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S03:TRANSF>80 TRANSFER UAC326-1/2 (KOMBI 1&2) BIN.INPUT

A4 E

40

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

45S S INTERN_[ixR1]

T/ 3 THRUL X 2 SWI SELX1 X0 X1 %

INTERN_SW-Torque-Lim

120.056% 120.056%

0.5%

INTERN_[ixR2] 0.5% UDA327:1_S>RA

UPLIM HYS >=LIM % 4 THRUL X UPLIM HYS >=LIM %

5 >=1

6 & B INTERN_I>R1A B 7 &

UDA327:1_S>RB INTERN_[ixS1] 0.5% 8 THRUL X UPLIM HYS >=LIM % 9 THRUL X UPLIM HYS >=LIM % B

INTERN_I>R1B

10 >=1

INTERN_[ixS2] 0.5% UDA327:1_S>SA

11 & B INTERN_I>S1A B 12 &

UDA327:1_S>SB INTERN_[ixT1] 0.5% 13 THRUL X UPLIM HYS >=LIM % 14 THRUL X UPLIM HYS >=LIM % B

INTERN_I>S1B

15 >=1

INTERN_[ixT2] 0.5% UDA327:1_S>TA

16 & B INTERN_I>T1A B 17 &

UDA327:1_S>TB B OVERCURRENT SETTING (Stator): ***************************** Detection at 5200 A (according to Design Datas Turgi, 3BHS123040): According to testing of starting with full load. We have to increase the current limit higher than design data. from 5200 Amp to xxxx Amp. (xxx% of nominal) ^Ig = Ig * SQRT(2)= 2450 * 1.41421 = 3465 => 80% UP-LIMIT = (80% / 3465) * 5200 = 120.05% "Block no.2" I>>/IN = 5200/3465 = 1.50

INTERN_I>T1B

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INPUT CROSSREFERENCE: INTERN_-WRc-CONTROL

INTERN_[ixR1] INTERN_[ixR2] INTERN_[ixS1] INTERN_[ixS2] INTERN_[ixT1] INTERN_[ixT2] ParamGrp_ix>-Limit-Delay UDA327:1_S>RA

Source: INT3\S17:MILL-ON,WR Sink : INT1\S11:FAULT-EVENT4 INT1\S07:SUMMARY-F/W INT1\S04:DETECT-I> INT3\S19:INCH-ANGLE INT3\S18:BRAKE-HORN INT2\S15:NX-LIMI INT2\S33:FROZENCHARGE INT2\S32:ANGLECAPTUR INT2\S29:AIR-GAP-SUP2 INT2\S28:AIR-GAP-SUP1 Source: INT0\S03:FILTER1 Sink : INT1\S05:DETECT-I*T INT1\S04:DETECT-I> INT0\S03:FILTER1 Source: INT0\S04:FILTER2 Sink : INT1\S04:DETECT-I> Source: INT0\S03:FILTER1 Sink : INT1\S05:DETECT-I*T INT1\S04:DETECT-I> INT0\S03:FILTER1 Source: INT0\S04:FILTER2 Sink : INT1\S04:DETECT-I> Source: INT0\S03:FILTER1 Sink : INT1\S05:DETECT-I*T INT1\S04:DETECT-I> INT0\S03:FILTER1 Source: INT0\S04:FILTER2 Sink : INT1\S04:DETECT-I> Source: ? Sink : INT1\S04:DETECT-I> Source: INT0\S02:TRANSF>00 Sink : INT1\S04:DETECT-I>

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S004 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S04:DETECT-I> STATOR OVERCURRENT DETECTION


released:

A4 E

41

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

UDA327:1_S>SB UDA327:1_S>TA UDA327:1_S>TB

Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S04:DETECT-I> INT0\S02:TRANSF>00 INT1\S04:DETECT-I> INT0\S08:IX-COMMUTAT INT0\S02:TRANSF>00 INT1\S04:DETECT-I> INT0\S02:TRANSF>00 INT1\S04:DETECT-I> INT0\S08:IX-COMMUTAT

OUTPUT CROSSREFERENCE: INTERN_I>R1A INTERN_I>R1B INTERN_I>S1A INTERN_I>S1B INTERN_I>T1A INTERN_I>T1B INTERN_SW-Torque-Limit

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S04:DETECT-I> INT1\S08:FAULT-EVENT1 INT1\S04:DETECT-I> INT1\S08:FAULT-EVENT1 INT1\S04:DETECT-I> INT1\S08:FAULT-EVENT1 INT1\S04:DETECT-I> INT1\S08:FAULT-EVENT1 INT1\S04:DETECT-I> INT1\S08:FAULT-EVENT1 INT1\S04:DETECT-I> INT1\S08:FAULT-EVENT1 INT1\S04:DETECT-I> INT1\S04:DETECT-I> INT2\S14:START-PARS

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S004 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S04:DETECT-I> STATOR OVERCURRENT DETECTION


released:

A4 E

42

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_[ixS1] 73.881% 0.5%

INTERN_[ixT1] 73.881% 0.5%

>=LIM % 2 THRUL X UPLIM HYS >=LIM % 3 THRUL X UPLIM HYS >=LIM %

2000ms

/ T T/ MS 5 OND INTERN_I*t-R

2000ms

/ T T/ MS 6 OND INTERN_I*t-S

2000ms

/ T T/ MS INTERN_I*t-T

THERMAL OVERLOAD OF THYRISTORS ****************************** Max. Continous DC - Current (according Design Datas Turgi 3BHS123040): => (3200/ 3465) * 80% = 73.881% t = 10s according design datas => adjusted for 2s in the software

3200A peak

INPUT CROSSREFERENCE: INTERN_[ixR1] INTERN_[ixS1] INTERN_[ixT1]

Source: Sink : Source: Sink : Source: Sink :

INT0\S03:FILTER1 INT1\S05:DETECT-I*T INT1\S04:DETECT-I> INT0\S03:FILTER1 INT0\S03:FILTER1 INT1\S05:DETECT-I*T INT1\S04:DETECT-I> INT0\S03:FILTER1 INT0\S03:FILTER1 INT1\S05:DETECT-I*T INT1\S04:DETECT-I> INT0\S03:FILTER1

OUTPUT CROSSREFERENCE: INTERN_I*t-R INTERN_I*t-S INTERN_I*t-T

Source: Sink : Source: Sink : Source: Sink :

INT1\S05:DETECT-I*T INT1\S08:FAULT-EVENT1 INT1\S05:DETECT-I*T INT1\S08:FAULT-EVENT1 INT1\S05:DETECT-I*T INT1\S08:FAULT-EVENT1

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S005 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S05:DETECT-I*T STATOR CURRENT DETECTION (i*T)


released:

A4 E

43

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

39.77661% 19.786% 0.5%

INTERN_-WRe 3500ms

2 THRLL X LOLIM HYS <=LIM % 3 OND / T T/ MS

0.5%

HYS >=LIM %

INTERN_Ie>

4 &

5 OND B 6 THRUL X UPLIM HYS >=LIM % 8 THRLL X LOLIM HYS <=LIM % 10 OND / T T/ S B 500ms / T T/ MS 7 OND 50ms / T T/ MS 11 >=1 INTERN_U>NET Unet>110% INTERN_Ie<

INTERN_/UN/ 88% 0.5%

74% 0.1% ParamGrp_Unet<95%-Delay 60S

9 THRLL X LOLIM HYS <=LIM %

68% 0.1%

INTERN_U<NET Unet<85%or<95%6s

OVER-/UNDERCURRENT EXCITATION ***************************** [ixe] : 80% = 8V = 1500A Iemax : 1.10 * Ie start (Ie start = Ie st x 1.2= 565 x 1,2 = 678A) Ieg: Ie at Basic Speed( before Fieldweakening) 1.10 * 678 A = 745.8 A => 80% / 1500 * 745.8 = 39.776% Iemin : 0.7 * Ien (Ien = 530A; Ie at rated Power) = 0.7 * 530 A = 371 A => 371/1500 * 80% = 19.786% OVER-/UNDERVOLTAGE NETWORK ************************** /UN/ : 80% = 23kV (calibration) Unet> : 1.10 * /UN/ = 1.10 * 23kV = 25.3kV => 80% / 23kV * 25.3kV = 88 % Delay Unet> = 50ms 0.85 * /UN/ = 0.85 * 23kV = 19.55kV => 80% / 23kV * 19.55kV = 68 %

Unet<

Unet>85%&<95% : 0.925 * /UN/ = 0.925 * 23kV = 21.275kV 80% / 23kV * 21.275kV = 74% Delay Unet<92.5% = 60s.

INPUT CROSSREFERENCE: INTERN_-WRe INTERN_/UN/ INTERN_[ixe] ParamGrp_Iex-Uplim-1 ParamGrp_Unet<95%-Delay

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S07:SUMMARY-F/W INT1\S11:FAULT-EVENT4 INT1\S07:SUMMARY-F/W INT1\S06:DET-UE/IE,UN INT3\S19:INCH-ANGLE INT3\S12:PRIOSEL-4 INT2\S06:INTEG INT0\S07:FILTER5 BACKGND\S05:I-ANALOG-ADP INT1\S06:DET-UE/IE,UN INT0\S07:FILTER5 INT0\S06:FILTER4 BACKGND\S05:I-ANALOG-ADP INT1\S06:DET-UE/IE,UN ? INT1\S06:DET-UE/IE,UN ? INT1\S06:DET-UE/IE,UN

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

OUTPUT CROSSREFERENCE: INTERN_Ie< INTERN_Ie> INTERN_U<NET INTERN_U>NET

Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S06:DET-UE/IE,UN INT1\S08:FAULT-EVENT1 INT1\S06:DET-UE/IE,UN INT1\S08:FAULT-EVENT1 INT1\S06:DET-UE/IE,UN INT1\S08:FAULT-EVENT1 INT1\S06:DET-UE/IE,UN INT1\S08:FAULT-EVENT1

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S006 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S06:DET-UE/IE,UN DETECTION DE IeMAX/MIN;UN>/UN<


released:

A4 E

44

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_SUMW-INT3-9 INTERN_SUMW-INT3-10 INTERN_SUMF-INT1-1 INTERN_SUMF-INT1-2 INTERN_SUMF-INT1-3 INTERN_SUMF-INT1-4 INTERN_SUMF-INT2-5 INTERN_SUMF-INT3-6 B 4 o TRAN B 5 o & B 7 o INTERN_-WRe-CONTROL INTERN_FMO-INT1-1 ParamGrp_SE-Fault-INT1-1 FFFFH INTERN_FMO-INT1-2 ParamGrp_SE-Fault-INT1-2 3FFFH INTERN_FMO-INT1-3 ParamGrp_SE-Fault-INT1-3 FFFFH INTERN_FMO-INT1-4 ParamGrp_SE-Fault-INT1-4 3371H INTERN_FMO-INT2-5 ParamGrp_SE-Fault-INT2-5 3E00H INTERN_FMO-INT3-6 ParamGrp_SE-Fault-INT3-6 F180H INTERN_MVD1-ON CB-Stator 9 FAULT-SE I01 I02 MS I03 I04 I05 I06 I07 I08 I09 I10 I11 I12 B 100ms 11 OND / T T/ MS O01 10 o & INTERN_MVD1-OFF B 100ms / T T/ INTERN_DCF-WRe 8 OND & 6 o TRAN B INTERN_&FAULT INTERN_S/sumF-TRIGG 3 >=1 B 2 o TRAN B INTERN_&WARNING INTERN_s/sumA-TRIGG

INTERN_-WRc-CONTROL

INTERN_-WR UDA327:1_C/WR-DDA35 INTERN_-WRe

50ms

12 OFD \ T T\ MS

UDA327:3_C/MVD1-ON 13 & UDA327:1_C/THYRSUPB

UDA327:3_S>MVD1-FEEDBACK 14 OND o / 50ms T T/ MS ParamGrp_off-status-dly 1500MS UDA327:3_S>MVD1-OFF-FEDBK 17 o INTERN_MVD2-ON CB-Rotor B &

UDA327:3_C/MVD1-OFF 15 OND / T T/ MS o B 18 OND / 100ms T T/ MS 19 OND o / T T/ MS

16 &

INTERN_F/MVD1-OFF-FB

UDA327:3_C/MVD2-ON

ParamGrp_MVD2-OFF-Delay 100MS

UDA327:3_C/MVD2-OFF

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INPUT CROSSREFERENCE: INTERN_-WRc-CONTROL

INTERN_-WRe-CONTROL

INTERN_FMO-INT1-1 INTERN_FMO-INT1-2 INTERN_FMO-INT1-3 INTERN_FMO-INT1-4 INTERN_FMO-INT2-5 INTERN_FMO-INT3-6

Source: INT3\S17:MILL-ON,WR Sink : INT1\S11:FAULT-EVENT4 INT1\S07:SUMMARY-F/W INT1\S04:DETECT-I> INT3\S19:INCH-ANGLE INT3\S18:BRAKE-HORN INT2\S15:NX-LIMI INT2\S33:FROZENCHARGE INT2\S32:ANGLECAPTUR INT2\S29:AIR-GAP-SUP2 INT2\S28:AIR-GAP-SUP1 Source: INT3\S17:MILL-ON,WR Sink : INT1\S07:SUMMARY-F/W INT3\S08:WARN-EVENT9 INT3\S11:PRIOSEL-3 INT3\S05:FAULT-EVENT6 INT3\S16:START/STOP INT3\S17:MILL-O INT3\S12:PRIOSEL-4 Source: INT1\S08:FAULT-EVENT1 Sink : INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT Source: INT1\S09:FAULT-EVENT2 Sink : INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT Source: INT1\S10:FAULT-EVENT3 Sink : INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT Source: INT1\S11:FAULT-EVENT4 Sink : INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT Source: INT2\S03:FAULT-EVENT5 Sink : INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT Source: INT3\S05:FAULT-EVENT6 Sink : INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

07-06-01

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S007 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S07:SUMMARY-F/W WR-RELEASE/MVD-ON-COMMAND; &FAULT/WARNING

A4 E

45

3BHS135699

Sink : Source: Sink : INTERN_SUMF-INT1-2 Source: Sink : INTERN_SUMF-INT1-3 Source: Sink : INTERN_SUMF-INT1-4 Source: Sink : INTERN_SUMF-INT2-5 Source: Sink : INTERN_SUMF-INT3-6 Source: Sink : INTERN_SUMW-INT3-10 Source: Sink : INTERN_SUMW-INT3-7 Source: Sink : INTERN_SUMW-INT3-8 Source: Sink : INTERN_SUMW-INT3-9 Source: Sink : ParamGrp_MVD2-OFF-Delay Source: Sink : ParamGrp_SE-Fault-INT1-1 Source: Sink : ParamGrp_SE-Fault-INT1-2 Source: Sink : ParamGrp_SE-Fault-INT1-3 Source: Sink : ParamGrp_SE-Fault-INT1-4 Source: Sink : ParamGrp_SE-Fault-INT2-5 Source: Sink : ParamGrp_SE-Fault-INT3-6 Source: Sink : ParamGrp_off-status-dly Source: Sink : UDA327:3_S>MVD1-FEEDBACK Source: Sink : UDA327:3_S>MVD1-OFF-FEDBK Source: Sink : INTERN_SUMF-INT1-1 OUTPUT CROSSREFERENCE: INTERN_&FAULT INTERN_&WARNING INTERN_-WR

INT1\S07:SUMMARY-F/W INT3\S15:MVD-ON-OFF INT1\S08:FAULT-EVENT1 INT1\S07:SUMMARY-F/W INT1\S09:FAULT-EVENT2 INT1\S07:SUMMARY-F/W INT1\S10:FAULT-EVENT3 INT1\S07:SUMMARY-F/W INT1\S11:FAULT-EVENT4 INT1\S07:SUMMARY-F/W INT2\S03:FAULT-EVENT5 INT1\S07:SUMMARY-F/W INT3\S05:FAULT-EVENT6 INT1\S07:SUMMARY-F/W INT3\S09:WARN-EVENT10 INT1\S07:SUMMARY-F/W INT3\S06:WARN-EVENT7 INT1\S07:SUMMARY-F/W INT3\S07:WARN-EVENT8 INT1\S07:SUMMARY-F/W INT3\S08:WARN-EVENT9 INT1\S07:SUMMARY-F/W ? INT1\S07:SUMMARY-F/W ? INT1\S07:SUMMARY-F/W ? INT1\S07:SUMMARY-F/W ? INT1\S07:SUMMARY-F/W ? INT1\S07:SUMMARY-F/W ? INT1\S07:SUMMARY-F/W ? INT1\S07:SUMMARY-F/W ? INT1\S07:SUMMARY-F/W INT1\S02:TRANSF>20/40 INT3-MODBUS\S03:STATUS-1 INT1\S07:SUMMARY-F/W INT3\S15:MVD-ON-OFF INT1\S02:TRANSF>20/40 INT3-MODBUS\S03:STATUS-1 INT1\S07:SUMMARY-F/W

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

Source: Sink : Source: Sink : Source: Sink :

INTERN_-WRe

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

Source: Sink : INTERN_DCF-WRe Source: Sink : INTERN_F/MVD1-OFF-FBK Source: Sink : INTERN_MVD1-OFF Source: Sink : INTERN_S/sumF-TRIGGER Source: Sink : INTERN_s/sumA-TRIGGER Source: Sink : UDA327:1_C/THYRSUP-FREI-1 Source: Sink : UDA327:1_C/WR-DDA353 Source: Sink : UDA327:3_C/MVD1-OFF Source: Sink : UDA327:3_C/MVD1-ON Source: Sink : UDA327:3_C/MVD2-OFF Source: Sink : UDA327:3_C/MVD2-ON Source: Sink :

INT1\S07:SUMMARY-F/W INT1\S07:SUMMARY-F/W INT3\S17:MILL-ON,WR INT1\S07:SUMMARY-F/W INT1\S07:SUMMARY-F/W INT3\S17:MILL-ON,WR INT1\S07:SUMMARY-F/W INT1\S25:TRANSFER/70 INT1\S15:BRDGE-COMMUT INT1\S07:SUMMARY-F/W INT3\S24:NW-REM-AD,PM INT2\S18:CONTROL-N INT2\S17:NW2 INT2\S16:NW1 INT1\S07:SUMMARY-F/W INT1\S11:FAULT-EVENT4 INT1\S07:SUMMARY-F/W INT1\S06:DET-UE/IE,UN INT3\S19:INCH-ANGLE INT3\S12:PRIOSEL-4 INT2\S06:INTEG INT1\S07:SUMMARY-F/W INT1\S25:TRANSFER/70 INT1\S07:SUMMARY-F/W INT1\S08:FAULT-EVENT1 INT1\S07:SUMMARY-F/W INT3\S15:MVD-ON-OFF INT1\S07:SUMMARY-F/W INT1\S07:SUMMARY-F/W INT1\S25:TRANSFER/70 INT1\S07:SUMMARY-F/W INT1\S25:TRANSFER/70 INT1\S07:SUMMARY-F/W INT0\S09:TRANSF/10 INT1\S07:SUMMARY-F/W INT0\S09:TRANSF/10 INT1\S07:SUMMARY-F/W INT1\S07:SUMMARY-F/W INT2\S34:TRANSFER/30 INT1\S07:SUMMARY-F/W INT1\S07:SUMMARY-F/W INT2\S34:TRANSFER/30 INT1\S07:SUMMARY-F/W INT2\S34:TRANSFER/30 INT1\S07:SUMMARY-F/W INT2\S34:TRANSFER/30 INT0\S09:TRANSF/10

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

07-06-01

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S007 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S07:SUMMARY-F/W WR-RELEASE/MVD-ON-COMMAND; &FAULT/WARNING

A4 E

46

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_RESET TRIP_SFF-2-FAST TRIP_SFF-3-FAST TRIP_SFF-4-FAST TRIP_SFF-5-SLOW TRIP_SFF-6-SLOW ALARM_SFF-7-SLOW ALARM_SFF-8-SLOW ALARM_SFF-9-SLOW ALARM_SFF-10-SLOW 1 >=1

AF AFF

SFF SF FFO FLO FMO

TRIP_SFF-1-FAST INTERN_SUMF-INT1-1 TRIP_FFO-1-FAST INTERN_FMO-INT1-1

SFFI B INTERN_I>R1A INTERN_I>R1B INTERN_I>S1A INTERN_I>S1B INTERN_I>T1A INTERN_I>T1B INTERN_I*t-R INTERN_I*t-S INTERN_I*t-T INTERN_Ie> INTERN_Ie< INTERN_U>NET Unet>110% INTERN_U<NET Unet<85%or<95%6s INTERN_Unet-R-U<85% Trip Undervolt INTERN_Unet-S-U<85% Trip Undervolt INTERN_Unet-T-U<85% Trip Undervolt INTERN_Unet-R-U<95%-60s Trip Undervolt INTERN_Unet-S-U<95%-60s Trip Undervolt INTERN_Unet-T-U<95%-60s Trip Undervolt INTERN_F/MVD-FEEDBACK INTERN_F/MVD1-OFF-FBK B UDA327:3_S>MVD1-FAULT UDA327:3_S>MVD2-FAULT o .14 o .15 Y FM < Fault Handling: Bit:0 Code:01 Bit:1 Code:02 Bit:2 Code:03 Bit:3 Code:04 Bit:4 Code:05 Bit:5 Code:06 Bit:6 Code:07 Bit:7 Code:08 Bit:8 Code:09 Bit:9 Code:10 Bit:10 Code:11 Bit:11 Code:12 Bit:12 Code:13 Bit:13 Code:14 Bit:14 Code:15 Bit:15 Code:16 2 >=1 4 BIBS .0 .1 .2 .3 .4 .5 .6 .7 .8 .9 .10 .11

.12 B 3 >=1 .13

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

"F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F:

Overcurrent detection bridge RA" Overcurrent detection bridge RB" Overcurrent detection bridge SA" Overcurrent detection bridge SB" Overcurrent detection bridge TA" Overcurrent detection bridge TB" Thermal Overload (I*t) Phase R" Thermal Overload (I*t) Phase S" Thermal Overload (I*t) Phase T" Excitation Overcurrent" Excitation Undercurrent" 23kV Network Overvoltage" 23kV Network Undervoltage" 23kV Breaker Feedback Missing" 23kV Circuit Breaker Trip" 23kV Circuit Breaker Trip (Rotor)"

Note: Antamina Project has no MVD2-Fault signal from the rotor HV-Breaker.

INPUT CROSSREFERENCE: ALARM_SFF-10-SLOW ALARM_SFF-7-SLOW ALARM_SFF-8-SLOW

Source: Sink : Source: Sink : Source:

INT3\S09:WARN-EVENT10 INT1\S08:FAULT-EVENT1 INT3\S06:WARN-EVENT7 INT1\S08:FAULT-EVENT1 INT3\S07:WARN-EVENT8 INT3\S07:WARN-EVENT8

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S008 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S08:FAULT-EVENT1 FAULT HANDLING (I>, U>, U<, I*t)
released:

A4 E

47

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INIT_*INIT

INTERN_F/MVD-FEEDBACK INTERN_F/MVD1-OFF-FBK INTERN_I*t-R INTERN_I*t-S INTERN_I*t-T INTERN_I>R1A INTERN_I>R1B INTERN_I>S1A INTERN_I>S1B INTERN_I>T1A INTERN_I>T1B INTERN_Ie< INTERN_Ie> INTERN_RESET

INTERN_U<NET INTERN_U>NET INTERN_Unet-R-U<85% INTERN_Unet-R-U<95%-60s INTERN_Unet-S-U<85% INTERN_Unet-S-U<95%-60s INTERN_Unet-T-U<85% INTERN_Unet-T-U<95%-60s TRIP_SFF-2-FAST TRIP_SFF-3-FAST TRIP_SFF-4-FAST TRIP_SFF-5-SLOW TRIP_SFF-6-SLOW UDA327:3_S>MVD1-FAULT UDA327:3_S>MVD2-FAULT

Source: INT3\S21:RESET/LT Sink : INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:WARN-EVENT7 INT2\S03:FAULT-EVENT5 Source: INT3\S15:MVD-ON-OFF Sink : INT1\S08:FAULT-EVENT1 Source: INT1\S07:SUMMARY-F/W Sink : INT1\S08:FAULT-EVENT1 Source: INT1\S05:DETECT-I*T Sink : INT1\S08:FAULT-EVENT1 Source: INT1\S05:DETECT-I*T Sink : INT1\S08:FAULT-EVENT1 Source: INT1\S05:DETECT-I*T Sink : INT1\S08:FAULT-EVENT1 Source: INT1\S04:DETECT-I> Sink : INT1\S08:FAULT-EVENT1 Source: INT1\S04:DETECT-I> Sink : INT1\S08:FAULT-EVENT1 Source: INT1\S04:DETECT-I> Sink : INT1\S08:FAULT-EVENT1 Source: INT1\S04:DETECT-I> Sink : INT1\S08:FAULT-EVENT1 Source: INT1\S04:DETECT-I> Sink : INT1\S08:FAULT-EVENT1 Source: INT1\S04:DETECT-I> Sink : INT1\S08:FAULT-EVENT1 Source: INT1\S06:DET-UE/IE,UN Sink : INT1\S08:FAULT-EVENT1 Source: INT1\S06:DET-UE/IE,UN Sink : INT1\S08:FAULT-EVENT1 Source: INT3\S21:RESET/LT Sink : INT1\S10:FAULT-EVENT3 INT1\S25:TRANSFER/70 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:W INT2\S33:FROZENCHARGE INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 Source: INT1\S06:DET-UE/IE,UN Sink : INT1\S08:FAULT-EVENT1 Source: INT1\S06:DET-UE/IE,UN Sink : INT1\S08:FAULT-EVENT1 Source: INT0\S07:FILTER5 Sink : INT1\S08:FAULT-EVENT1 INT2\S03:FAULT-EVENT5 Source: INT0\S07:FILTER5 Sink : INT1\S08:FAULT-EVENT1 INT2\S03:FAULT-EVENT5 Source: INT0\S07:FILTER5 Sink : INT1\S08:FAULT-EVENT1 INT2\S03:FAULT-EVENT5 Source: INT0\S07:FILTER5 Sink : INT1\S08:FAULT-EVENT1 INT2\S03:FAULT-EVENT5 Source: INT0\S07:FILTER5 Sink : INT1\S08:FAULT-EVENT1 INT2\S03:FAULT-EVENT5 Source: INT0\S07:FILTER5 Sink : INT1\S08:FAULT-EVENT1 INT2\S03:FAULT-EVENT5 Source: INT1\S09:FAULT-EVENT2 Sink : INT1\S10:FAULT-EVENT3 INT1\S08:FAULT-EVENT1 Source: INT1\S10:FAULT-EVENT3 Sink : INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 Source: INT1\S11:FAULT-EVENT4 Sink : INT1\S08:FAULT-EVENT1 INT2\S03:FAULT-EVENT5 Source: INT2\S03:FAULT-EVENT5 Sink : INT1\S08:FAULT-EVENT1 INT3\S05:FAULT-EVENT6 Source: INT3\S05:FAULT-EVENT6 Sink : INT1\S08:FAULT-EVENT1 INT3\S06:WARN-EVENT7 Source: INT1\S02:TRANSF>20/40 Sink : INT3-MODBUS\S03:STATUS-1 INT1\S08:FAULT-EVENT1 INT3\S15:MVD-ON-OFF Source: INT1\S02:TRANSF>20/40 Sink : INT3-MODBUS\S03:STATUS-1 INT1\S08:FAULT-EVENT1 INT3\S15:MVD-ON-OFF

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

OUTPUT CROSSREFERENCE: INTERN_FMO-INT1-1 INTERN_SUMF-INT1-1 TRIP_FF-1-FAST TRIP_FFO-1-FAST TRIP_SFF-1-FAST

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S08:FAULT-EVENT1 INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT1\S08:FAULT-EVENT1 INT1\S07:SUMMARY-F/W INT1\S08:FAULT-EVENT1 INT3\S23:FIRST-T/W INT1\S08:FAULT-EVENT1 INT3\S23:FIRST-T/W INT1\S08:FAULT-EVENT1 INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:WARN-EVENT7 INT2\S03:FAULT-EVENT5

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S008 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S08:FAULT-EVENT1 FAULT HANDLING (I>, U>, U<, I*t)
released:

A4 E

48

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_StatusNodes-110H.1 ArcN Node 1H INTERN_StatusNodes-110H.5 ArcN Node 5H INTERN_StatusNodes-110H.6 ArcN Node 6H INTERN_StatusNodes-113H.0 ArcN Node 30H INIT_*INIT

o o o o B 1B 0B 4 EVTBS REL HORN BL FF LT AF SFF AFF SFFI SF FFO FLO FMO INTERN_Arcnet-Fault

TRIP_FF-2-FAST TRIP_SFF-2-FAST INTERN_SUMF-INT1-2 TRIP_FFO-2-FAST INTERN_FMO-INT1-2

INTERN_RESET TRIP_SFF-1-FAST UDA327:2_F>-LTR1A UDA327:2_F>-LTR1B UDA327:2_F>-LTR2A UDA327:2_F>-LTR2B UDA327:2_F>-LTS1A UDA327:2_F>-LTS1B UDA327:2_F>-LTS2A UDA327:2_F>-LTS2B UDA327:2_F>-LTT1A UDA327:2_F>-LTT1B UDA327:2_F>-LTT2A UDA327:2_F>-LTT2B UDA327:2_F>-LTEX UDA327:2_F>KX-48V INTERN_Status-PMA324.2 3 BIBS o .0 o .1 o .2 o .3 o .4 o .5 o .6 o .7 o .8 o .9 o .10 o .11 o .12 o .13 .14 .15 Y

FM

Fault Handling: Bit0 Code:17 "F: Pulse Amplifier-R1A (LT8978) +21" Bit1 Code:18 "F: Pulse Amplifier-R1B (LT8978) +25" Bit2 Code:19 "F: Pulse Amplifier-R2A (LT8978) +45" Bit3 Code:20 "F: Pulse Amplifier-R2B (LT8978) +49" Bit4 Code:21 "F: Pulse Amplifier-S1A (LT8978) +29" Bit5 Code:22 "F: Pulse Amplifier-S1B (LT8978) +33" Bit6 Code:23 "F: Pulse Amplifier-S2A (LT8978) +53" Bit7 Code:24 "F: Pulse Amplifier-S2B (LT8978) +57" Bit8 Code:25 "F: Pulse Amplifier-T1A (LT8978) +37" Bit9 Code:26 "F: Pulse Amplifier-T1B (LT8978) +41" Bit10 Code:27 "F: Pulse Amplifier-T2A (LT8978) +61" Bit11 Code:28 "F: Pulse Amplifier-T2B (LT8978) +65" Bit12 Code:29 "F: Pulse Amplifier Disexcitation (LT8978) +69" Bit13 Code:30 "F: Power Supply 48 Vdc" Bit14 Code:31 "F: Arcnet Communication Error" Bit15 Code:32 "F: Error AB-Coupler PMA324 (+F02)"

INPUT CROSSREFERENCE: INIT_*INIT

INTERN_RESET

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_Status-PMA324.2 INTERN_Status-PSR.2 INTERN_Status-PSR.5 INTERN_StatusNodes-110H.1 INTERN_StatusNodes-110H.5 INTERN_StatusNodes-110H.6 INTERN_StatusNodes-113H.0 TRIP_SFF-1-FAST

UDA327:2_F>-LTEX

Source: INT3\S21:RESET/LT Sink : INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:WARN-EVENT7 INT2\S03:FAULT-EVENT5 Source: INT3\S21:RESET/LT Sink : INT1\S10:FAULT-EVENT3 INT1\S25:TRANSFER/70 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:W INT2\S33:FROZENCHARGE INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 Source: INT3\S01:B448-INPUT Sink : INT1\S09:FAULT-EVENT2 Source: INT3\S01:B448-INPUT Sink : INT1\S09:FAULT-EVENT2 Source: INT3\S01:B448-INPUT Sink : INT1\S09:FAULT-EVENT2 Source: INT3\S01:B448-INPUT Sink : INT1\S09:FAULT-EVENT2 Source: INT3\S01:B448-INPUT Sink : INT1\S09:FAULT-EVENT2 Source: INT3\S01:B448-INPUT Sink : INT1\S09:FAULT-EVENT2 Source: INT3\S01:B448-INPUT Sink : INT1\S09:FAULT-EVENT2 Source: INT1\S08:FAULT-EVENT1 Sink : INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:WARN-EVENT7 INT2\S03:FAULT-EVENT5 Source: INT1\S02:TRANSF>20/40

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S009 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S09:FAULT-EVENT2 FAULT HANDLING (Print boards)


released:

A4 E

49

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

UDA327:2_F>-LTR1B UDA327:2_F>-LTR2A UDA327:2_F>-LTR2B UDA327:2_F>-LTS1A UDA327:2_F>-LTS1B UDA327:2_F>-LTS2A UDA327:2_F>-LTS2B UDA327:2_F>-LTT1A UDA327:2_F>-LTT1B UDA327:2_F>-LTT2A UDA327:2_F>-LTT2B UDA327:2_F>KX-48V

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT1\S09:FAULT-EVENT2

OUTPUT CROSSREFERENCE: INTERN_Arcnet-Fault INTERN_FMO-INT1-2 INTERN_SUMF-INT1-2 TRIP_FF-2-FAST TRIP_FFO-2-FAST TRIP_SFF-2-FAST

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S09:FAULT-EVENT2 INT1\S09:FAULT-EVENT2 INT3\S16:START/STOP INT1\S09:FAULT-EVENT2 INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT1\S09:FAULT-EVENT2 INT1\S07:SUMMARY-F/W INT1\S09:FAULT-EVENT2 INT3\S23:FIRST-T/W INT1\S09:FAULT-EVENT2 INT3\S23:FIRST-T/W INT1\S09:FAULT-EVENT2 INT1\S10:FAULT-EVENT3 INT1\S08:FAULT-EVENT1

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S009 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S09:FAULT-EVENT2 FAULT HANDLING (Print boards)


released:

A4 E

50

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_RESET TRIP_SFF-2-FAST TRIP_SFF-1-FAST B KOMBI-2_F>CC:U>R1 KOMBI-2_F>CC:U>R2 KOMBI-2_F>CC:FUSES-AUX-R KOMBI-2_F>CC:U>U KOMBI-2_F>CC:FUSE-MSTAR KOMBI-2_F>CC:U>S1 KOMBI-2_F>CC:U>S2 KOMBI-2_F>CC:FUSES-AUX-S UDA327:1_F>CC:U>V UDA327:1_F>CC:U>T1 UDA327:1_F>CC:U>T2 UDA327:1_F>CC:FUSES-AUX-T UDA327:1_F>CC:U>W INTERN_F/MVD2-FEEDBACK UDA327:3_F>CC:THYSU-TRIP UDA327:3_F>CC:EMERG-STOP 2 BIBS o .0 o .1 o .2 o .3 o .4 o .5 o .6 o .7 o .8 o .9 o .10 o .11 o .12 .13 o .14 o .15 Y 1 >=1

AF AFF SFFI

SFF SF FFO FLO FMO

TRIP_SFF-3-FAST INTERN_SUMF-INT1-3 TRIP_FFO-3-FAST INTERN_FMO-INT1-3

FM

Fault Handling: Bit:0 Code:33 Bit:1 Code:34 Bit:2 Code:35 Bit:3 Code:36 Bit:4 Code:37 Bit:5 Code:38 Bit:6 Code:39 Bit:7 Code:40 Bit:8 Code:41 Bit:9 Code:42 Bit:10 Code:43 Bit:11 Code:44 Bit:12 Code:45 Bit:13 Code:46 Bit:14 Code:47 Bit:15 Code:48

"F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F:

Network Overvoltage Arresters R1" Network Overvoltage Arresters R2" Cycloconverter Auxiliary Fuses R" Motor Overvoltage Arrester Phase R" Motor Star Point Fuse" Network Overvoltage Arresters S1" Network Overvoltage Arresters S2" Cycloconverter Auxiliary Fuses S" Motor Overvoltage Arrester Phase S" Network Overvoltage Arresters T1" Network Overvoltage Arresters T2" Cycloconverter Auxiliary Fuses T" Motor Overvoltage Arrester Phase T" Rotor Feeder Feedback missing" Thyristor Supervision Trip (Tier 8)" Emergency Stop button pressed"

INPUT CROSSREFERENCE: INIT_*INIT

INTERN_F/MVD2-FEEDBACK INTERN_RESET

KOMBI-2_F>CC:FUSE-MSTAR

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

KOMBI-2_F>CC:FUSES-AUX-R KOMBI-2_F>CC:FUSES-AUX-S KOMBI-2_F>CC:U>R1 KOMBI-2_F>CC:U>R2 KOMBI-2_F>CC:U>S1 KOMBI-2_F>CC:U>S2 KOMBI-2_F>CC:U>U TRIP_SFF-1-FAST

TRIP_SFF-2-FAST

Source: INT3\S21:RESET/LT Sink : INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:WARN-EVENT7 INT2\S03:FAULT-EVENT5 Source: INT3\S15:MVD-ON-OFF Sink : INT1\S10:FAULT-EVENT3 Source: INT3\S21:RESET/LT Sink : INT1\S10:FAULT-EVENT3 INT1\S25:TRANSFER/70 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:W INT2\S33:FROZENCHARGE INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 Source: INT1\S03:TRANSF>80 Sink : INT1\S10:FAULT-EVENT3 Source: INT1\S03:TRANSF>80 Sink : INT1\S10:FAULT-EVENT3 Source: INT1\S03:TRANSF>80 Sink : INT1\S10:FAULT-EVENT3 Source: INT1\S03:TRANSF>80 Sink : INT1\S10:FAULT-EVENT3 Source: INT1\S03:TRANSF>80 Sink : INT1\S10:FAULT-EVENT3 Source: INT1\S03:TRANSF>80 Sink : INT1\S10:FAULT-EVENT3 Source: INT1\S03:TRANSF>80 Sink : INT1\S10:FAULT-EVENT3 Source: INT1\S03:TRANSF>80 Sink : INT1\S10:FAULT-EVENT3 Source: INT1\S08:FAULT-EVENT1 Sink : INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:WARN-EVENT7 INT2\S03:FAULT-EVENT5 Source: INT1\S09:FAULT-EVENT2 Sink : INT1\S10:FAULT-EVENT3 INT1\S08:FAULT-EVENT1

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S010 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S10:FAULT-EVENT3 FAULT HANDLING (FUSES, ARRESTERS)


released:

A4 E

51

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

UDA327:1_F>CC:U>T2 UDA327:1_F>CC:U>V UDA327:1_F>CC:U>W UDA327:3_F>CC:EMERG-STOP UDA327:3_F>CC:THYSU-TRIP

Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S10:FAULT-EVENT3 INT0\S02:TRANSF>00 INT1\S10:FAULT-EVENT3 INT0\S02:TRANSF>00 INT1\S10:FAULT-EVENT3 INT0\S02:TRANSF>00 INT1\S10:FAULT-EVENT3 INT1\S02:TRANSF>20/40 INT1\S10:FAULT-EVENT3 INT3\S18:BRAKE-HORN INT1\S02:TRANSF>20/40 INT1\S10:FAULT-EVENT3

OUTPUT CROSSREFERENCE: INTERN_FMO-INT1-3 INTERN_SUMF-INT1-3 TRIP_FF-3-FAST TRIP_FFO-3-FAST TRIP_SFF-3-FAST

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S10:FAULT-EVENT3 INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT1\S10:FAULT-EVENT3 INT1\S07:SUMMARY-F/W INT1\S10:FAULT-EVENT3 INT3\S23:FIRST-T/W INT1\S10:FAULT-EVENT3 INT3\S23:FIRST-T/W INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S010 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S10:FAULT-EVENT3 FAULT HANDLING (FUSES, ARRESTERS)


released:

A4 E

52

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_RESET TRIP_SFF-3-FAST TRIP_SFF-1-FAST 2 UDA327:3_F>Safety-CSA-465 UDA327:2_F>CSsum-SME UDA327:2_F>CC:CIRC-BREAK KOMBI-1_F>EXCIT-TH-RELAY KOMBI-1_F>ANGLESHIFT KOMBI-1_F>DDA-SME KOMBI-1_F>EARTH-F-STATOR KOMBI-1_F>U>EXCITATION 0B UDA327:3_PowerPack-Doors 3 OND INTERN_-WRe 1000ms UDA327:1_F>DCF:RFO UDA327:1_F>DCF 6 OND INTERN_-WRc-CONTROL ParamGrp_Full-Supervision 3S S INTERN_[nx] 80% = 9.043 rpm ParamGrp_Mill-Stopping 0.15 rpm 1.32446% INTERN_STOP 7 THRLL X 0.5% LOLIM HYS <=LIM % o B 9 THRUL X UPLIM HYS >=LIM % 10 >=1 B MODBUS-O_F>Rotor-Transf INTERN_CORRECT-FLUX< INTERN_CORRECT-FLUX> .13 .14 .15 Y .10 / T T/ 8 & / T T/ MS o B o B .9 4 & 5 >=1 o B o .1 o .2 o .3 o .4 o .5 o .6 .7 o .8 & B 11 BIBS .0 1 >=1

AF AFF SFFI

SFF SF FFO FLO FMO

TRIP_SFF-4-FAST INTERN_SUMF-INT1-4 TRIP_FFO-4-FAST INTERN_FMO-INT1-4

INTERN_overspeed-trip 0.5%

.11

MODBUS-O_F>Stator-Transf UDA327:3_F>Stator-Trans

.12

FM

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

Fault Handling: Bit:0 Code:49 Bit:1 Code:50 Bit:2 Code:51 Bit:3 Code:52 Bit:4 Code:53 Bit:5 Code:54 Bit:6 Code:55 Bit:7 Code:56 Bit:8 Code:57 Bit:9 Code:58 Bit:10 Code:59 Bit:11 Code:60 Bit:12 Code:61 Bit:13 Code:62 Bit:14 Code:63 Bit:15 Code:64

"F: "F: "F: "F: "F: "F: "F: "no "F: "F: "F: "F: "F: "F: "F: "F:

Hardware Overcurrent I>>, CSA463" Circuit Breakers Control Part" Thermal overload excitation" Angle shifter (FM 9925) +A13" Bridge commutation logic (DDA353) +A17" Earth fault stator" Overvoltage arrester excitation" message stored" Power Pack Doors Switch Opened" Excitation converter DCF600" Mill blocked" Mill motor over speed" Stator transformer fault" Excitation transformer fault" Converter voltage trapez limit <" Converter voltage trapez limit >"

INPUT CROSSREFERENCE: INIT_*INIT

INTERN_-WRc-CONTROL

INTERN_-WRe INTERN_CORRECT-FLUX<

Source: INT3\S21:RESET/LT Sink : INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:WARN-EVENT7 INT2\S03:FAULT-EVENT5 Source: INT3\S17:MILL-ON,WR Sink : INT1\S11:FAULT-EVENT4 INT1\S07:SUMMARY-F/W INT1\S04:DETECT-I> INT3\S19:INCH-ANGLE INT3\S18:BRAKE-HORN INT2\S15:NX-LIMI INT2\S33:FROZENCHARGE INT2\S32:ANGLECAPTUR INT2\S29:AIR-GAP-SUP2 INT2\S28:AIR-GAP-SUP1 Source: INT1\S07:SUMMARY-F/W Sink : INT1\S11:FAULT-EVENT4 INT1\S07:SUMMARY-F/W INT1\S06:DET-UE/IE,UN INT3\S19:INCH-ANGLE INT3\S12:PRIOSEL-4 INT2\S06:INTEG Source: INT1\S24:TRAPEZ Sink : INT1\S11:FAULT-EVENT4

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-12-06

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S011 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S11:FAULT-EVENT4 FAULT HANDLING (GENEREL)


released:

A4 E

53

3BHS135699

: INT1\S10:FAULT-EVENT3 INT1\S25:TRANSFER/70 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:W INT2\S33:FROZENCHARGE INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 INTERN_STOP Source: INT3\S16:START/STOP Sink : INT1\S11:FAULT-EVENT4 INT3\S22:STATUS-INDIC INT3\S17:MILL-ON,WR INT2\S19:ROCK-STOP INT2\S16:NW1 INTERN_[nx] Source: INT2\S13:NX Sink : INT1\S11:FAULT-EVENT4 INT3\S22:STATUS-INDIC INT3\S12:PRIOSEL-4 INT2\S15:NX-LIMITS INT2\S26:EXCITAT-4 INT2\S13:NX INT2\ INT2\S04:INTEG1 INTERN_overspeed-trip Source: INT2\S14:START-PARS Sink : INT1\S11:FAULT-EVENT4 KOMBI-1_F>ANGLESHIFT Source: INT2\S02:TRANSF>60 Sink : INT1\S11:FAULT-EVENT4 KOMBI-1_F>DDA-SME Source: INT2\S02:TRANSF>60 Sink : INT1\S11:FAULT-EVENT4 KOMBI-1_F>EARTH-F-STATOR Source: INT2\S02:TRANSF>60 Sink : INT1\S11:FAULT-EVENT4 KOMBI-1_F>EXCIT-TH-RELAY Source: INT2\S02:TRANSF>60 Sink : INT1\S11:FAULT-EVENT4 KOMBI-1_F>U>EXCITATION Source: INT2\S02:TRANSF>60 Sink : INT1\S11:FAULT-EVENT4 MODBUS-O_F>Rotor-Transf Source: INT3-MODBUS\S08:MODBUS-OUT2 Sink : INT1\S11:FAULT-EVENT4 MODBUS-O_F>Stator-Transf Source: INT3-MODBUS\S08:MODBUS-OUT2 Sink : INT1\S11:FAULT-EVENT4 ParamGrp_Full-Supervision Source: ? Sink : INT1\S11:FAULT-EVENT4 ParamGrp_Mill-Stopping Source: ? Sink : INT1\S11:FAULT-EVENT4 TRIP_SFF-1-FAST Source: INT1\S08:FAULT-EVENT1 Sink : INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:WARN-EVENT7 INT2\S03:FAULT-EVENT5 TRIP_SFF-3-FAST Source: INT1\S10:FAULT-EVENT3 Sink : INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 UDA327:1_F>DCF Source: INT0\S02:TRANSF>00 Sink : INT1\S11:FAULT-EVENT4 UDA327:1_F>DCF:RFO Source: INT0\S02:TRANSF>00 Sink : INT1\S11:FAULT-EVENT4 INT3\S08:WARN-EVENT9 UDA327:2_F>CC:CIRC-BREAK Source: INT1\S02:TRANSF>20/40 Sink : INT1\S11:FAULT-EVENT4 UDA327:2_F>CSsum-SME Source: INT1\S02:TRANSF>20/40 Sink : INT1\S11:FAULT-EVENT4 INT3\S05:FAULT-EVENT6 INT0\S09:TRANSF/10 UDA327:3_F>Safety-CSA-465 Source: INT1\S02:TRANSF>20/40 Sink : INT1\S11:FAULT-EVENT4 INT3\S05:FAULT-EVENT6 UDA327:3_F>Stator-Trans Source: INT1\S02:TRANSF>20/40 Sink : INT1\S11:FAULT-EVENT4 UDA327:3_PowerPack-Doors Source: INT1\S02:TRANSF>20/40 Sink : INT1\S11:FAULT-EVENT4 OUTPUT CROSSREFERENCE: INTERN_FMO-INT1-4 INTERN_SUMF-INT1-4 TRIP_FF-4-FAST TRIP_FFO-4-FAST TRIP_SFF-4-FAST

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

Sink

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S11:FAULT-EVENT4 INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT1\S11:FAULT-EVENT4 INT1\S07:SUMMARY-F/W INT1\S11:FAULT-EVENT4 INT3\S23:FIRST-T/W INT1\S11:FAULT-EVENT4 INT3\S23:FIRST-T/W INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT2\S03:FAULT-EVENT5

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-12-06

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S011 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S11:FAULT-EVENT4 FAULT HANDLING (GENEREL)


released:

A4 E

54

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_REVERSE ParamGrp_PHASSHIFT:dt1 54.99878% ParamGrp_PHASSHIFT:dt1-re 25.00610% INTERN_nx 80% = 9.043 rpm INTERN_REL-ZPR 3 SWI SELX1 X0 -14.1% X1 % 4 0% SWI SELX1 X0 X1 %

SELX1 X0 X1 % 5 SWI SELX1 X0 6 ADD +1 o +2 % 0% 0B 100% -100% 2 MULT X Y X*Y % 10 ADD +1

-43.6% 43.6%

X1 %

ParamGrp_delta-phi-integr 1.67236%

7 INT-I + IC SIC T0/TI UPLIM LOLIM + < 9 SWI SELX1 X0

+2

0% 0% 8% 12.68% 16% 24.96% 24% 36.52%

8 0% FCTL X X1 Y1 X2 Y2 X3 Y3 X4 Y4 Y %

X1 %

+3 %

X0 11 SIN X1 %

13 MULT X 14 Y ADD X*Y o +1 % 100% +2 %

15 SQRT %

16 MULT X Y X*Y 18 ADD +1

INTERN_cos-e1

INTERN_sin-e1

% 17 MULT X Y X*Y o +2 INTERN_cos{e1+DELTph % % 19 MULT X 21 Y ADD X*Y +1 % 20 MULT X Y X*Y +2 INTERN_sin{e1+DELTph % %

PHASESHIFTING ************* delta T1 [s] = 0.004167 (12-pulsig und 50 Hz) (Summe der kleinen Zeitkonstanten) p = 12 fnetz = 50 Hz pi = 3.14 fg = 5.727 Hz delta T1[%] = 250 x pi x fg x delta T1[s]= 18.743 % Angle correction of the bandpass filter (delta phi = -25 ) (-25 /180) x pi = -43.61% Integrator to switch from 0 to 25 in about 100ms T0/Tn = 1.667ms/100ms x 100% = 1.67%

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INPUT CROSSREFERENCE: INTERN_REL-ZPR INTERN_REVERSE

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_SW-Change-over-1

INTERN_cos-e1 INTERN_nx

INT2\S04:INTEG1 INT1\S12:PHASE-SHIFT1 INT2\S23:EXCITAT-1 INT2\S13:NX INT2\S09:INTEG6 INT2\S07:INTEG4 INT3\S12:PRIOSEL-4 INT1\S13:PHASE-SHIFT2 LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S03:STATUS-1 INT1\S12:PHASE-SHIFT1 PANEL-AFC094\S05:LED-CO INT2\S14:START-PARS INT2\S19:ROCK-STOP INT2\S18:CONTROL-N INT2\S13:NX INT2\S17:NW2 INT3\S12:PRIOSEL-4 INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 INT2\S34:TRANSFER/30 INT2\S23:EXCITAT-1 INT2\S13:NX INT2\S09:INTEG6 INT2\S08:INTEG5 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S05:INTEG2 INT2\S04:INTEG1 INT2\S10:INTEG7 INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 INT2\S13:NX BACKGND\S06:SELECT-IND BACKGND\S05:I-ANALOG-ADP INT3-MODBUS\S05:ANALOG-OUT-1 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIF INT2\S20:ANTIVOLT INT2\S18:CONTROL-N

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-12-06

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S012 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S12:PHASE-SHIFT1 CREATION OF cos/sin{e1+DELTphi1}


released:

A4 E

55

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

Sink : ParamGrp_PHASSHIFT:dt1-re Source: Sink : ParamGrp_delta-phi-integr Source: Sink : OUTPUT CROSSREFERENCE: INTERN_cos{e1+DELTphi1} INTERN_sin{e1+DELTphi1}

INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 ? INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 ? INT1\S12:PHASE-SHIFT1

Source: Sink : Source: Sink :

INT1\S12:PHASE-SHIFT1 INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT2\S22:COSPHI2 INT1\S12:PHASE-SHIFT1 INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT2\S22:COSPHI2

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-12-06

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S012 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S12:PHASE-SHIFT1 CREATION OF cos/sin{e1+DELTphi1}


released:

A4 E

56

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

80% = 9.043 rpm %

X*Y

X Y

3 ADD X*Y o +1 % 100% +2 %

4 SQRT %

5 MULT X Y X*Y % 6 MULT X Y X*Y % 8 MULT X Y X*Y % 9 MULT X Y X*Y % 7 ADD +1

INTERN_cos{e1+DELTphi1}

INTERN_sin{e1+DELTphi1} 12 SWI SELX1 11 SWI SELX1 X0 X1 % X0 X1 % 13 MULT X Y X*Y %

o +2 % 10 ADD +1

INTERN_cos{e1+D-phi

INTERN_SW-Change-over-1 INTERN_REVERSE ParamGrp_PHASSHIFT:dt1 54.99878% ParamGrp_PHASSHIFT:dt1-re 25.00610% ParamGrp_delta-T3 11.70044%

14 MULT X 15 Y ADD X*Y o +1 % 100% +2 %

+2 %

INTERN_sin{e1+D-phi

16 SQRT %

17 MULT X Y X*Y % 18 MULT X Y X*Y % 20 MULT X Y X*Y % 21 MULT X Y X*Y % 19 ADD +1

INTERN_cos-e1

INTERN_sin-e1

o +2 % 22 ADD +1

INTERN_cos{e1+DELTph

+2 %

INTERN_sin{e1+DELTph

PHASESHIFTING ************* delta T2 [s]= fg = p = pi= delta T2[%] =

0.00142 (12-pulsig und 50 Hz) 5.727 Hz 12 3.14 250 x pi x fg x delta T2[s] = 6.387 %

INPUT CROSSREFERENCE: INTERN_REVERSE

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

Source: INT3\S12:PRIOSEL-4 Sink : INT1\S13:PHASE-SHIFT2 LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S03:STATUS-1 INT1\S12:PHASE-SHIFT1 PANEL-AFC094\S05:LED-CO INT2\S14:START-PARS INT2\S19:ROCK-STOP INT2\S18:CONTROL-N INT2\S13:NX INT2\S17:NW2 INTERN_SW-Change-over-1 Source: INT3\S12:PRIOSEL-4 Sink : INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 INT2\S34:TRANSFER/30 INT2\S23:EXCITAT-1 INT2\S13:NX INT2\S09:INTEG6 INT2\S08:INTEG5 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S05:INTEG2 INT2\S04:INTEG1 INTERN_cos-e1 Source: INT2\S10:INTEG7 Sink : INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 INTERN_cos{e1+DELTphi1} Source: INT1\S12:PHASE-SHIFT1 Sink : INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT2\S22:COSPHI2 INTERN_nx Source: INT2\S13:NX Sink : BACKGND\S06:SELECT-IND BACKGND\S05:I-ANALOG-ADP INT3-MODBUS\S05:ANALOG-OUT-1 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIF INT2\S20:ANTIVOLT INT2\S18:CONTROL-N INTERN_sin-e1 Source: INT2\S10:INTEG7 Sink : INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 INTERN_sin{e1+DELTphi1} Source: INT1\S12:PHASE-SHIFT1 Sink : INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT2\S22:COSPHI2 ParamGrp_PHASSHIFT:dt1 Source: ? Sink : INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 ParamGrp_PHASSHIFT:dt1-re Source: ? Sink : INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 ParamGrp_delta-T2 Source: ? Sink : INT1\S13:PHASE-SHIFT2 ParamGrp_delta-T3 Source: ? Sink : INT1\S13:PHASE-SHIFT2 OUTPUT CROSSREFERENCE: INTERN_cos{e1+D-phi1+2} INTERN_cos{e1+DELTphi3} INTERN_sin{e1+D-phi1+2}

Source: Sink : Source: Sink : Source:

INT1\S13:PHASE-SHIFT2 INT2\S22:COSPHI2 INT2\S20:ANTIVOLT INT1\S13:PHASE-SHIFT2 INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

06-04-05

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S013 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S13:PHASE-SHIFT2 CREATION OF cos/sin{e1+D-phi1+2}


released:

A4 E

57

3BHS135699

change

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

PSR FUPLA2 Release 4.B1

Collahuasi Project SAG Mill / Run Program

replaces:

office resp.:

replaced by:

derived from:

Johannes Gonser

issued:

checked:

ATBDE / J.Gonser INT1 S13:PHASE-SHIFT2 CREATION OF cos/sin{e1+D-phi1+2}

released:

std. checked:

06-04-05

doc. type

format

A4 E

language

3BHS135699

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S013 F01/K01

58

sht. nr.

nr. of shts.

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_/ixT1/ INTERN_sin-e1 INTERN_cos-e1

T SIN COS

ALPHA BETA D Q

4 DQRST R S INTERN_/ixR1/* INTERN_/ixS1/* INTERN_/ixT1/*

INTERN_SW-Change-over-1 INTERN_sin{e1+DELTphi1} INTERN_sin{e1+DELTphi3}

2 SWI SELX1 X0 X1 % 3 SWI SELX1 X0 X1 % SIN

T BETA

INTERN_cos{e1+DELTphi1} INTERN_cos{e1+DELTphi3}

COS

INPUT CROSSREFERENCE: INTERN_/ixR1/ INTERN_/ixS1/ INTERN_/ixT1/ INTERN_SW-Change-over-1

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_cos-e1 INTERN_cos{e1+DELTphi1} INTERN_cos{e1+DELTphi3} INTERN_sin-e1 INTERN_sin{e1+DELTphi1} INTERN_sin{e1+DELTphi3}

INT0\S08:IX-COMMUTAT INT1\S14:PHASE-SHIFT3 INT2\S36:UNBALANCE-IX INT2\S05:INTEG2 INT0\S08:IX-COMMUTAT INT1\S14:PHASE-SHIFT3 INT2\S36:UNBALANCE-IX INT2\S05:INTEG2 INT0\S08:IX-COMMUTAT INT1\S14:PHASE-SHIFT3 INT2\S36:UNBALANCE-IX INT2\S05:INTEG2 INT3\S12:PRIOSEL-4 INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 INT2\S34:TRANSFER/30 INT2\S23:EXCITAT-1 INT2\S13:NX INT2\S09:INTEG6 INT2\S08:INTEG5 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S05:INTEG2 INT2\S04:INTEG1 INT2\S10:INTEG7 INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 INT1\S12:PHASE-SHIFT1 INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT2\S22:COSPHI2 INT1\S13:PHASE-SHIFT2 INT1\S14:PHASE-SHIFT3 INT2\S10:INTEG7 INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 INT1\S12:PHASE-SHIFT1 INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT2\S22:COSPHI2 INT1\S13:PHASE-SHIFT2 INT1\S14:PHASE-SHIFT3

OUTPUT CROSSREFERENCE: INTERN_/ixR1/* INTERN_/ixS1/* INTERN_/ixT1/* INTERN_ixd INTERN_ixq

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S14:PHASE-SHIFT3 INT1\S19:PHASHIF4 INT2\S20:ANTIVOLT INT1\S14:PHASE-SHIFT3 INT1\S19:PHASHIF4 INT2\S20:ANTIVOLT INT1\S14:PHASE-SHIFT3 INT1\S19:PHASHIF4 INT2\S20:ANTIVOLT INT1\S14:PHASE-SHIFT3 INT1\S14:PHASE-SHIFT3 INT2\S23:EXCITAT-1 INT1\S14:PHASE-SHIFT3 INT1\S14:PHASE-SHIFT3 INT2\S23:EXCITAT-1

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S014 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S14:PHASE-SHIFT3 CREATION OF ixd/ixq;/ix./*


released:

A4 E

59

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_MSB-iwR*

o B 3 &

R B Q 5 =1 B o o UDA327:1_S>-SWR B INTERN_MSB-iwS* o B 11 & R B Q 13 =1 B o 17 o >=1 UDA327:1_S>-TWR B INTERN_MSB-iwT* o B 19 & R B Q 21 =1 B o 22 TRAN B < 24 TRAN B C/RUB C/SUB C/TUB UDA 327 UDA 327 UDA 327 BO BO BO B INTERN_TSI 23 >=1 INTERN_TUB 18 & 20 RSFF S 14 TRAN B < 16 TRAN B B INTERN_SSI 15 >=1 INTERN_SUB 9 >=1 10 & 12 RSFF S 6 TRAN B < 8 TRAN B B INTERN_RSI 7 >=1 INTERN_RUB

UDA327:1_C/RUB

UDA327:1_C/SUB

UDA327:1_C/TUB

RSI : PULSE AT LEAST 1 CALCULATING CYCLE = 1.67ms MSB-FORMATION = RELEASE RUB (MSB = VALUE NEGATIVE {iw.})

INPUT CROSSREFERENCE: INTERN_-WR

INTERN_MSB-iwR* INTERN_MSB-iwS* INTERN_MSB-iwT* UDA327:1_S>-RWR UDA327:1_S>-SWR UDA327:1_S>-TWR

Source: INT1\S07:SUMMARY-F/W Sink : INT1\S25:TRANSFER/70 INT1\S15:BRDGE-COMMUT INT1\S07:SUMMARY-F/W INT3\S24:NW-REM-AD,PM INT2\S18:CONTROL-N INT2\S17:NW2 INT2\S16:NW1 Source: INT2\S22:COSPHI2 Sink : INT1\S15:BRDGE-COMMUT Source: INT2\S22:COSPHI2 Sink : INT1\S15:BRDGE-COMMUT Source: INT2\S22:COSPHI2 Sink : INT1\S15:BRDGE-COMMUT Source: INT0\S02:TRANSF>00 Sink : INT1\S20:UST-R INT1\S15:BRDGE-COMMUT Source: INT0\S02:TRANSF>00 Sink : INT1\S21:UST-S INT1\S15:BRDGE-COMMUT Source: INT0\S02:TRANSF>00 Sink : INT1\S22:UST-T INT1\S15:BRDGE-COMMUT

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

OUTPUT CROSSREFERENCE: INTERN_RSI INTERN_RUB INTERN_SSI INTERN_SUB INTERN_TSI INTERN_TUB UDA327:1_C/RUB UDA327:1_C/SUB UDA327:1_C/TUB

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S15:BRDGE-COMMUT INT1\S16:CONTROL-R INT1\S15:BRDGE-COMMUT INT1\S20:UST-R INT1\S15:BRDGE-COMMUT INT1\S15:BRDGE-COMMUT INT1\S17:CONTROL-S INT1\S15:BRDGE-COMMUT INT1\S21:UST-S INT1\S15:BRDGE-COMMUT INT1\S15:BRDGE-COMMUT INT1\S18:CONTROL-T INT1\S15:BRDGE-COMMUT INT1\S22:UST-T INT1\S15:BRDGE-COMMUT INT1\S15:BRDGE-COMMUT INT0\S09:TRANSF/10 INT1\S15:BRDGE-COMMUT INT0\S09:TRANSF/10 INT1\S15:BRDGE-COMMUT INT0\S09:TRANSF/10

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S015 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S15:BRDGE-COMMUT BRIDGE COMMUTATION COMMAND


released:

A4 E

60

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

1.400391K INTERN_iwR** INTERN_/ixR/*k-1 ParamGrp_I-CONTROL-R:kp 0.851562K ParamGrp_I-CONTROL-R:K% 1.00098% INTERN_RSI ParamGrp_I-CONT-R:T0/TN 1.94702% ParamGrp_GR-Limit 100.00000% W -X KP 0% K(%) IC SIC T0/TN UPL-I LOL-I UPLIM o LOLIM 3 TRAN % 4 TRANW 5 TRANW 6 TRANW Y <>LIM

o +1 +2 %

INTERN_delta-u-R INTERN_REG-R-LIMIT

100% -100%

INTERN_GR-limit INTERN_I-CONTR:KN INTERN_I-CONTR:KP

INTERN_I-CONTR:TO/TN

CURRENTCONTROLLER SETTINGS PHASE R,S AND T ****************************************** kn = 1.55 ToInt1= 1.389ms Ts = 0.07s = Tn ks = 9.69 => kp = Ts/(2 * ks * deltaT1[s]) = 0.07/(2* 9.69 *0.00347)=1.06 => T0/Tn = 100* ToInt1/Tn = 100 * 0.001389/0.07 = 1.95% => K% 1 (Erfahrungswert)

INPUT CROSSREFERENCE: INTERN_/ixR/*k-1 INTERN_RSI INTERN_iwR** INTERN_u-aR* ParamGrp_GR-Limit ParamGrp_I-CONT-R:T0/TN ParamGrp_I-CONTROL-R:K% ParamGrp_I-CONTROL-R:kn ParamGrp_I-CONTROL-R:kp

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S19:PHASHIF4 INT1\S16:CONTROL-R INT1\S15:BRDGE-COMMUT INT1\S16:CONTROL-R INT2\S22:COSPHI2 INT1\S26:RECORDING INT1\S16:CONTROL-R INT2\S20:ANTIVOLT INT1\S16:CONTROL-R ? INT1\S16:CONTROL-R ? INT1\S16:CONTROL-R ? INT1\S16:CONTROL-R ? INT1\S16:CONTROL-R ? INT1\S16:CONTROL-R

OUTPUT CROSSREFERENCE: INTERN_GR-limit INTERN_I-CONTR:KN INTERN_I-CONTR:KP INTERN_I-CONTR:TO/TN

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_REG-R-LIMIT INTERN_delta-u-R INTERN_i-reg-out-R

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S16:CONTROL-R INT1\S22:UST-T INT1\S21:UST-S INT1\S20:UST-R INT1\S18:CONTROL-T INT1\S17:CONTROL-S INT1\S16:CONTROL-R INT1\S18:CONTROL-T INT1\S17:CONTROL-S INT1\S16:CONTROL-R INT1\S18:CONTROL-T INT1\S17:CONTROL-S INT1\S16:CONTROL-R INT1\S18:CONTROL-T INT1\S17:CONTROL-S INT1\S16:CONTROL-R INT1\S23:LIMIT INT1\S16:CONTROL-R INT1\S22:UST-T INT1\S21:UST-S INT1\S16:CONTROL-R INT1\S20:UST-R INT1\S16:CONTROL-R

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S016 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S16:CONTROL-R CURRENT CONTROLLER PHASE R


released:

A4 E

61

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_iwS** INTERN_/ixS/*k-1 INTERN_I-CONTR:KP ParamGrp_I-CONTROL-S:K% 1.00098% INTERN_SSI INTERN_I-CONTR:TO/TN 100% -100% INTERN_GR-limit 0%

W -X KP K(%) IC SIC T0/TN UPL-I LOL-I UPLIM o LOLIM

Y <>LIM

o +1 +2 %

INTERN_delta-u-S INTERN_REG-S-LIMIT

ref to segment CONTROL-R

INPUT CROSSREFERENCE: INTERN_/ixS/*k-1 INTERN_GR-limit INTERN_I-CONTR:KN INTERN_I-CONTR:KP INTERN_I-CONTR:TO/TN INTERN_SSI INTERN_iwS** INTERN_u-aS* ParamGrp_I-CONTROL-S:K%

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S19:PHASHIF4 INT1\S17:CONTROL-S INT1\S16:CONTROL-R INT1\S22:UST-T INT1\S21:UST-S INT1\S20:UST-R INT1\S18:CONTROL-T INT1\S17:CONTROL-S INT1\S16:CONTROL-R INT1\S18:CONTROL-T INT1\S17:CONTROL-S INT1\S16:CONTROL-R INT1\S18:CONTROL-T INT1\S17:CONTROL-S INT1\S16:CONTROL-R INT1\S18:CONTROL-T INT1\S17:CONTROL-S INT1\S15:BRDGE-COMMUT INT1\S17:CONTROL-S INT2\S22:COSPHI2 INT1\S17:CONTROL-S INT2\S20:ANTIVOLT INT1\S17:CONTROL-S ? INT1\S17:CONTROL-S

OUTPUT CROSSREFERENCE: INTERN_REG-S-LIMIT INTERN_delta-u-S INTERN_i-reg-out-S

Source: Sink : Source: Sink : Source: Sink :

INT1\S17:CONTROL-S INT1\S23:LIMIT INT1\S17:CONTROL-S INT1\S22:UST-T INT1\S20:UST-R INT1\S17:CONTROL-S INT1\S21:UST-S INT1\S17:CONTROL-S

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S017 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S17:CONTROL-S CURRENT CONTROLLER PHASE S


released:

A4 E

62

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_iwT** INTERN_/ixT/*k-1 INTERN_I-CONTR:KP ParamGrp_I-CONTROL-T:K% 1.00098% INTERN_TSI INTERN_I-CONTR:TO/TN 100% -100% INTERN_GR-limit 0%

W -X KP K(%) IC SIC T0/TN UPL-I LOL-I UPLIM o LOLIM

Y <>LIM

o +1 +2 %

INTERN_delta-u-T INTERN_REG-T-LIMIT

ref to segment CONTROL-R

INPUT CROSSREFERENCE: INTERN_/ixT/*k-1 INTERN_GR-limit INTERN_I-CONTR:KN INTERN_I-CONTR:KP INTERN_I-CONTR:TO/TN INTERN_TSI INTERN_iwT** INTERN_u-aT* ParamGrp_I-CONTROL-T:K%

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S19:PHASHIF4 INT1\S18:CONTROL-T INT1\S16:CONTROL-R INT1\S22:UST-T INT1\S21:UST-S INT1\S20:UST-R INT1\S18:CONTROL-T INT1\S17:CONTROL-S INT1\S16:CONTROL-R INT1\S18:CONTROL-T INT1\S17:CONTROL-S INT1\S16:CONTROL-R INT1\S18:CONTROL-T INT1\S17:CONTROL-S INT1\S16:CONTROL-R INT1\S18:CONTROL-T INT1\S17:CONTROL-S INT1\S15:BRDGE-COMMUT INT1\S18:CONTROL-T INT2\S22:COSPHI2 INT1\S18:CONTROL-T INT2\S20:ANTIVOLT INT1\S18:CONTROL-T ? INT1\S18:CONTROL-T

OUTPUT CROSSREFERENCE: INTERN_REG-T-LIMIT INTERN_delta-u-T INTERN_i-reg-out-T

Source: Sink : Source: Sink : Source: Sink :

INT1\S18:CONTROL-T INT1\S23:LIMIT INT1\S18:CONTROL-T INT1\S21:UST-S INT1\S20:UST-R INT1\S18:CONTROL-T INT1\S22:UST-T INT1\S18:CONTROL-T

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S018 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S18:CONTROL-T CURRENT CONTROLLER PHASE T


released:

A4 E

63

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_/ixT1/*

3 TRANW

INTERN_/ixT/*k-1

CREATION OF HISTORY VALUE ix. FOR THE CURRENT CONTROLLER

INPUT CROSSREFERENCE: INTERN_/ixR1/* INTERN_/ixS1/* INTERN_/ixT1/*

Source: Sink : Source: Sink : Source: Sink :

INT1\S14:PHASE-SHIFT3 INT1\S19:PHASHIF4 INT2\S20:ANTIVOLT INT1\S14:PHASE-SHIFT3 INT1\S19:PHASHIF4 INT2\S20:ANTIVOLT INT1\S14:PHASE-SHIFT3 INT1\S19:PHASHIF4 INT2\S20:ANTIVOLT

OUTPUT CROSSREFERENCE: INTERN_/ixR/*k-1 INTERN_/ixS/*k-1 INTERN_/ixT/*k-1

Source: Sink : Source: Sink : Source: Sink :

INT1\S19:PHASHIF4 INT1\S16:CONTROL-R INT1\S19:PHASHIF4 INT1\S17:CONTROL-S INT1\S19:PHASHIF4 INT1\S18:CONTROL-T

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S019 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S19:PHASHIF4 CREATION OF /ix./*k-1


released:

A4 E

64

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_delta-u-T INTERN_GR-limit

o +3 %

UDA327:1_S>-RWR 3 o INTERN_RUB B &

LIM XLIM >UL UPLIM o LOLIM <LL % 4 RSFF o S X R Q 5 SWI o SELX1 o X0 X1 %

INTERN_REG-R-LIMIT> INTERN_REG-R-LIMIT<

GDB-R1_UstR 6 TRAN % GDB-R2_UstR

s/UstR

(KOMBI AO)

GDB021-R-Ucontrol : Controle voltage "UstR" on the bus

INPUT CROSSREFERENCE: INTERN_GR-limit INTERN_RUB INTERN_delta-u-S INTERN_delta-u-T INTERN_i-reg-out-R UDA327:1_S>-RWR

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S16:CONTROL-R INT1\S22:UST-T INT1\S21:UST-S INT1\S20:UST-R INT1\S18:CONTROL-T INT1\S17:CONTROL-S INT1\S15:BRDGE-COMMUT INT1\S20:UST-R INT1\S15:BRDGE-COMMUT INT1\S17:CONTROL-S INT1\S22:UST-T INT1\S20:UST-R INT1\S18:CONTROL-T INT1\S21:UST-S INT1\S20:UST-R INT1\S16:CONTROL-R INT1\S20:UST-R INT1\S16:CONTROL-R INT0\S02:TRANSF>00 INT1\S20:UST-R INT1\S15:BRDGE-COMMUT

OUTPUT CROSSREFERENCE: GDB-R1_UstR GDB-R2_UstR INTERN_REG-R-LIMIT< INTERN_REG-R-LIMIT>

Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S20:UST-R INT1\S26:RECORDING INT1\S20:UST-R INT1\S20:UST-R ? INT1\S20:UST-R INT1\S23:LIMIT INT1\S20:UST-R INT1\S23:LIMIT

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S020 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S20:UST-R CREATION OF CONTROL VOLTAGE PHASE R

A4 E

65

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_delta-u-T INTERN_GR-limit

o +3 %

UDA327:1_S>-SWR 3 o INTERN_SUB B &

LIM XLIM >UL UPLIM o LOLIM <LL % 4 RSFF o S X R Q 5 SWI o SELX1 o X0 X1 %

INTERN_REG-S-LIMIT> INTERN_REG-S-LIMIT<

GDB-S1_UstS 6 TRAN % GDB-S2_UstS

s/UstS GDB021-S_Ucontrol

(KOMBI AO) Controle voltage "UstS" on the bus

INPUT CROSSREFERENCE: INTERN_GR-limit INTERN_SUB INTERN_delta-u-R INTERN_delta-u-T INTERN_i-reg-out-S UDA327:1_S>-SWR

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S16:CONTROL-R INT1\S22:UST-T INT1\S21:UST-S INT1\S20:UST-R INT1\S18:CONTROL-T INT1\S17:CONTROL-S INT1\S15:BRDGE-COMMUT INT1\S21:UST-S INT1\S15:BRDGE-COMMUT INT1\S16:CONTROL-R INT1\S22:UST-T INT1\S21:UST-S INT1\S18:CONTROL-T INT1\S21:UST-S INT1\S20:UST-R INT1\S17:CONTROL-S INT1\S21:UST-S INT1\S17:CONTROL-S INT0\S02:TRANSF>00 INT1\S21:UST-S INT1\S15:BRDGE-COMMUT

OUTPUT CROSSREFERENCE: GDB-S1_UstS GDB-S2_UstS INTERN_REG-S-LIMIT< INTERN_REG-S-LIMIT>

Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S21:UST-S INT1\S26:RECORDING INT1\S21:UST-S INT1\S21:UST-S ? INT1\S21:UST-S INT1\S23:LIMIT INT1\S21:UST-S INT1\S23:LIMIT

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S021 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S21:UST-S CREATION OF CONTROL VOLTAGE PHASE S

A4 E

66

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_delta-u-S INTERN_GR-limit

o +3 %

UDA327:1_S>-TWR 3 o INTERN_TUB B &

LIM XLIM >UL UPLIM o LOLIM <LL % 4 RSFF o S X R Q 5 SWI o SELX1 o X0 X1 %

INTERN_REG-T-LIMIT> INTERN_REG-T-LIMIT<

GDB-T1_UstT 6 TRAN % GDB-T2_UstT

s/UstT GDB021-T_Ucontrol

(KOMBI A0) Controle voltage "UstT" on the bus

INPUT CROSSREFERENCE: INTERN_GR-limit INTERN_TUB INTERN_delta-u-R INTERN_delta-u-S INTERN_i-reg-out-T UDA327:1_S>-TWR

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S16:CONTROL-R INT1\S22:UST-T INT1\S21:UST-S INT1\S20:UST-R INT1\S18:CONTROL-T INT1\S17:CONTROL-S INT1\S15:BRDGE-COMMUT INT1\S22:UST-T INT1\S15:BRDGE-COMMUT INT1\S16:CONTROL-R INT1\S22:UST-T INT1\S21:UST-S INT1\S17:CONTROL-S INT1\S22:UST-T INT1\S20:UST-R INT1\S18:CONTROL-T INT1\S22:UST-T INT1\S18:CONTROL-T INT0\S02:TRANSF>00 INT1\S22:UST-T INT1\S15:BRDGE-COMMUT

OUTPUT CROSSREFERENCE: GDB-T1_UstT GDB-T2_UstT INTERN_REG-T-LIMIT< INTERN_REG-T-LIMIT>

Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S22:UST-T INT1\S22:UST-T INT1\S22:UST-T ? INT1\S22:UST-T INT1\S23:LIMIT INT1\S22:UST-T INT1\S23:LIMIT

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S022 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S22:UST-T CREATION OF CONTROL VOLTAGE PHASE T

A4 E

67

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_REG-R-LIMIT> B INTERN_REG-S-LIMIT INTERN_REG-S-LIMIT< INTERN_REG-S-LIMIT> B INTERN_REG-T-LIMIT INTERN_REG-T-LIMIT< INTERN_REG-T-LIMIT> B INPUT CROSSREFERENCE: INTERN_REG-R-LIMIT INTERN_REG-R-LIMIT< INTERN_REG-R-LIMIT> INTERN_REG-S-LIMIT INTERN_REG-S-LIMIT< INTERN_REG-S-LIMIT> INTERN_REG-T-LIMIT INTERN_REG-T-LIMIT< INTERN_REG-T-LIMIT> 3 >=1 2 >=1

INTERN_REG-R-LIMITA

INTERN_REG-S-LIMITA

INTERN_REG-T-LIMITA

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S16:CONTROL-R INT1\S23:LIMIT INT1\S20:UST-R INT1\S23:LIMIT INT1\S20:UST-R INT1\S23:LIMIT INT1\S17:CONTROL-S INT1\S23:LIMIT INT1\S21:UST-S INT1\S23:LIMIT INT1\S21:UST-S INT1\S23:LIMIT INT1\S18:CONTROL-T INT1\S23:LIMIT INT1\S22:UST-T INT1\S23:LIMIT INT1\S22:UST-T INT1\S23:LIMIT

OUTPUT CROSSREFERENCE: INTERN_REG-R-LIMITATION INTERN_REG-S-LIMITATION INTERN_REG-T-LIMITATION

Source: Sink : Source: Sink : Source: Sink :

INT1\S23:LIMIT INT1\S24:TRAPEZ INT1\S23:LIMIT INT1\S24:TRAPEZ INT1\S23:LIMIT INT1\S24:TRAPEZ

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S023 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S23:LIMIT REGULATION LIMITATION


released:

A4 E

68

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_REG-T-LIMITATION 0B

3 4 2 ADD +1 +2 % 3 MIN 80% X1 X2 % <<1 <<2 MIN B 0% 7 & 6 TRAN B B 0% X0 X1 % 8 SWI SELX1 X0 X1 % 9 SWI SELX1 X0 X1 % 10 ADD +1 5 SWI SELX1

INTERN_+psiw

ParamGrp_TRAPEZ:reg-up 31.25000%

ParamGrp_TRAPEZ:reg-down -100.00000%

+2

1.6% -1.6% ParamGrp_TRAPEZ:T-INTEG 0.02441%

+3 %

0% 0B 50% -50%

11 INT-I + IC SIC T0/TI UPLIM LOLIM +

12 X LIM XLIM INTERN_+delta-psi-T INTERN_CORRECT-FLUX INTERN_CORRECT-FLUX

ParamGrp_TRAPEZ:UPLIM 15.00854% ParamGrp_TRAPEZ:LOLIM -29.99878%

UPLIM >UL LOLIM <LL % < 13 THRUL X UPLIM 0.25% HYS >=LIM % 14 THRUL o X UPLIM 0.25% HYS >=LIM % ; Tint1 = 1.667ms TI = 6.6 s

ParamGrp_TRAPEZ:W/UPLIM 10.00366%

INTERN_W/Delta-psi-

ParamGrp_TRAPEZ:W/LOLIM 15.00244%

INTERN_W/Delta-psi-

T0/TI: 0.02525%

PARAMETER BASE DATE ACC. TO GUIDONIA BLOCK12: UPLIM/LOLIM acc. to Rekingen

INPUT CROSSREFERENCE: INTERN_+psiw INTERN_REG-R-LIMITATION INTERN_REG-S-LIMITATION INTERN_REG-T-LIMITATION ParamGrp_TRAPEZ:LOLIM ParamGrp_TRAPEZ:T-INTEG ParamGrp_TRAPEZ:UPLIM ParamGrp_TRAPEZ:W/LOLIM

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

ParamGrp_TRAPEZ:W/UPLIM ParamGrp_TRAPEZ:reg-down ParamGrp_TRAPEZ:reg-up

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT2\S21:PSIW BACKGND\S06:SELECT-IND INT1\S24:TRAPEZ INT2\S23:EXCITAT-1 INT1\S23:LIMIT INT1\S24:TRAPEZ INT1\S23:LIMIT INT1\S24:TRAPEZ INT1\S23:LIMIT INT1\S24:TRAPEZ ? INT1\S24:TRAPEZ ? INT1\S24:TRAPEZ ? INT1\S24:TRAPEZ ? INT1\S24:TRAPEZ ? INT1\S24:TRAPEZ ? INT1\S24:TRAPEZ ? INT1\S24:TRAPEZ

OUTPUT CROSSREFERENCE: INTERN_+delta-psi-T INTERN_CORRECT-FLUX< INTERN_CORRECT-FLUX> INTERN_W/Delta-psi-T-< INTERN_W/Delta-psi-T->

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S24:TRAPEZ BACKGND\S06:SELECT-IND INT1\S24:TRAPEZ INT2\S15:NX-LIMITS INT1\S24:TRAPEZ INT1\S11:FAULT-EVENT4 INT1\S24:TRAPEZ INT1\S11:FAULT-EVENT4 INT1\S24:TRAPEZ PANEL-AFC094\S03:PANEL-OUT INT1\S24:TRAPEZ PANEL-AFC094\S03:PANEL-OUT

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S024 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S24:TRAPEZ TRAPEZ REGULATION


released:

A4 E

69

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

0B 0B 0B 0B 0B INTERN_-WR 0B 0B 0B 0B 0B 0B 0B 0B

.2 .3 .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15 Y 2 BIBS .0 .1 UAC326-1_/70

INTERN_RESET MODBUS-O_S>EXCITAT-FAN-FB INTERN_DCF-WRe 0B 0B 0B 0B 0B 0B 0B 0B 0B 0B 0B 0B 0B

.2 .3 .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15 Y UAC326-2_/90

INPUT CROSSREFERENCE: INTERN_-WR

Source: INT1\S07:SUMMARY-F/W Sink : INT1\S25:TRANSFER/70 INT1\S15:BRDGE-COMMUT INT1\S07:SUMMARY-F/W INT3\S24:NW-REM-AD,PM INT2\S18:CONTROL-N INT2\S17:NW2 INT2\S16:NW1 INTERN_DCF-WRe Source: INT1\S07:SUMMARY-F/W Sink : INT1\S25:TRANSFER/70 INTERN_RESET Source: INT3\S21:RESET/LT Sink : INT1\S10:FAULT-EVENT3 INT1\S25:TRANSFER/70 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:W INT2\S33:FROZENCHARGE INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 INTERN_S/sumF-TRIGGER Source: INT1\S07:SUMMARY-F/W Sink : INT1\S25:TRANSFER/70 INTERN_s/sumA-TRIGGER Source: INT1\S07:SUMMARY-F/W Sink : INT1\S25:TRANSFER/70 MODBUS-O_S>EXCITAT-FAN-FB Source: INT3-MODBUS\S01:MODBUS-OUT1 Sink : INT1\S25:TRANSFER/70 INT3\S05:FAULT-EVENT6 OUTPUT CROSSREFERENCE: UAC326-1_/70 UAC326-2_/90

Source: Sink : Source: Sink :

INT1\S25:TRANSFER/70 ? INT1\S25:TRANSFER/70 ?

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S025 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S25:TRANSFER/70 TRANSFER TO UAC326-1 / UAC326-2 BIN.OUTPUT

A4 E

70

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

% GDB-R1_UstR GDB-S1_UstS INTERN_[psix] INTERN_Pm 3 TRAN % 4 TRAN % 5 TRAN % 6 TRAN % 7 MULT X 108.28247% INTERN_/[ixR1]/ Y X*Y % 8 MULT X Y X*Y % 9 MULT X Y X*Y % UAC326-1_i-pi/ixR

UAC326-2_s/Recording

UAC326-2_s/Recording

UAC326-2_s/Recording

UAC326-2_s/Recording

ParamGrp_IXR

INTERN_/[ixS1]/

UAC326-1_i-pi/ixS

INTERN_/[ixT1]/

UAC326-1_i-pi/ixT

Calibration for: Analogue ampere meter for stator current indication /[ixR1]/,/[ixS1]/,/[ixT1]/ Scaling: Analog meter : 0 - 10V : 0 - 4000A Actual current : 0 - 8V : 0 - 3465A 100% x ((3465x10)/(4000x8)) = 108.28%

INPUT CROSSREFERENCE: GDB-R1_UstR GDB-S1_UstS INTERN_+iw INTERN_/[ixR1]/ INTERN_/[ixS1]/ INTERN_/[ixT1]/ INTERN_Pm INTERN_[psix] INTERN_iwR** ParamGrp_IXR

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S20:UST-R INT1\S26:RECORDING INT1\S20:UST-R INT1\S21:UST-S INT1\S26:RECORDING INT1\S21:UST-S INT2\S19:ROCK-STOP INT2\S15:NX-LIMITS INT1\S26:RECORDING INT2\S33:FROZENCHARGE INT2\S22:COSPHI2 INT0\S03:FILTER1 INT1\S26:RECORDING INT2\S27:MOT-POWER INT0\S08:IX-COMMUTAT INT0\S03:FILTER1 INT1\S26:RECORDING INT2\S27:MOT-POWER INT0\S08:IX-COMMUTAT INT0\S03:FILTER1 INT1\S26:RECORDING INT2\S27:MOT-POWER INT0\S08:IX-COMMUTAT INT2\S27:MOT-POWER INT1\S26:RECORDING INT3\S24:NW-REM-AD,PM INT2\S10:INTEG7 BACKGND\S06:SELECT-IND INT1\S26:RECORDING INT2\S23:EXCITAT-1 INT2\S20:ANTIVOLT INT2\S13:NX INT2\S10:INTEG7 INT2\S22:COSPHI2 INT1\S26:RECORDING INT1\S16:CONTROL-R ? INT1\S26:RECORDING

OUTPUT CROSSREFERENCE: UAC326-1_i-pi/ixR UAC326-1_i-pi/ixS UAC326-1_i-pi/ixT UAC326-2_s/Recording-AO2 UAC326-2_s/Recording-AO3 UAC326-2_s/Recording-AO4 UAC326-2_s/Recording-AO5 UAC326-2_s/Recording-AO6 UAC326-2_s/Recording-AO8

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S26:RECORDING ? INT1\S26:RECORDING ? INT1\S26:RECORDING ? INT1\S26:RECORDING ? INT1\S26:RECORDING ? INT1\S26:RECORDING ? INT1\S26:RECORDING ? INT1\S26:RECORDING ? INT1\S26:RECORDING ?

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-02-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T1/C001/S026 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT1 S26:RECORDING Analog Output for Recording


released:

A4 E

71

3BHS135699

change

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.
INPUT CROSSREFERENCE: OUTPUT CROSSREFERENCE:

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

PSR FUPLA2 Release 4.B1

Collahuasi Project SAG Mill / Run Program

replaces:

INT 3: 20.000 ms (4 x INT 2)

office resp.:

replaced by:

derived from:

Johannes Gonser

issued:

checked:

ATBDE / J.Gonser INT2 S01:INIT-INT3 INIT-routine for INTERRUPT 3

released:

std. checked:

05-08-26
0008H SEL

doc. type

format

A4 E

language

3BHS135699

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S001 F01/K01

72

sht. nr.

nr. of shts.

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

.1 .2 .3 .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15 MODBUS-O_Critical-Stop B HW: =.VA 2 >=1

KOMBI-1_W>EARTH-F-RO KOMBI-1_F>EARTH-F-S

KOMBI-1_F>EXCIT-TH-R KOMBI-1_F>DDA-SME KOMBI-1_F>ANGLESHIF KOMBI-1_F>TRACO-24V KOMBI-1_Critical-St o

INTERN_Critical-Stop

INPUT CROSSREFERENCE: MODBUS-O_Critical-Stop UAC326-1_>60

Source: Sink : Source: Sink :

INT3-MODBUS\S01:MODBUS-OUT1 INT2\S02:TRANSF>60 ? INT2\S02:TRANSF>60

OUTPUT CROSSREFERENCE: INTERN_Critical-Stop KOMBI-1_Critical-Stop KOMBI-1_F>ANGLESHIFT KOMBI-1_F>DDA-SME KOMBI-1_F>EARTH-F-STATOR KOMBI-1_F>EXCIT-TH-RELAY KOMBI-1_F>TRACO-24V KOMBI-1_F>U>EXCITATION KOMBI-1_W>EARTH-F-ROTOR

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT2\S02:TRANSF>60 PANEL-AFC094\S03:PANEL-OUT INT3\S05:FAULT-EVENT6 INT2\S02:TRANSF>60 INT2\S02:TRANSF>60 INT2\S02:TRANSF>60 INT1\S11:FAULT-EVENT4 INT2\S02:TRANSF>60 INT1\S11:FAULT-EVENT4 INT2\S02:TRANSF>60 INT1\S11:FAULT-EVENT4 INT2\S02:TRANSF>60 INT1\S11:FAULT-EVENT4 INT2\S02:TRANSF>60 INT2\S03:FAULT-EVENT5 INT2\S02:TRANSF>60 INT1\S11:FAULT-EVENT4 INT2\S02:TRANSF>60 INT3\S08:WARN-EVENT9

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S002 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S02:TRANSF>60 TRANSFER UDA327-3 BIN.INPUTS


released:

A4 E

73

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_RESET TRIP_SFF-4-FAST TRIP_SFF-1-FAST B INTERN_F/AGP1 INTERN_F/AGP2 INTERN_F/AGP3 INTERN_F/AGP4 INTERN_F/AGP5 INTERN_F/AGP6 INTERN_F/AGP7 INTERN_F/AGP8 INTERN_F/AGP9 KOMBI-1_F>TRACO-24V INTERN_Unet-R-U<85% Trip Undervolt INTERN_Unet-R-U<95%-60s Trip Undervolt INTERN_Unet-S-U<85% Trip Undervolt INTERN_Unet-S-U<95%-60s Trip Undervolt INTERN_Unet-T-U<85% Trip Undervolt INTERN_Unet-T-U<95%-60s Trip Undervolt INTERN_F/23kV-frequency INTERN_DCP-Frozen-Fail INTERN_F/Brake-release 2 >=1 .10 B 3 >=1 .11 B 4 >=1 .12 B .13 .14 .15 Y 5 BIBS .0 .1 .2 .3 .4 .5 .6 .7 .8 o .9 1 >=1

AF AFF SFFI

SFF SF FFO FLO FMO

TRIP_SFF-5-SLOW INTERN_SUMF-INT2-5 TRIP_FFO-5-SLOW INTERN_FMO-INT2-5

FM

Fault Handling: Bit:0 Code:65 Bit:1 Code:66 Bit:2 Code:67 Bit:3 Code:68 Bit:4 Code:69 Bit:5 Code:70 Bit:6 Code:71 Bit:7 Code:72 Bit:8 Code:73 Bit:9 Code:74 Bit:10 Code:75 Bit:11 Code:76 Bit:12 Code:77 Bit:13 Code:78 Bit:14 Code:79 Bit:15 Code:80

"F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F:

Airgap too small probe no.1" Airgap too small probe no.2" Airgap too small probe no.3" Airgap too small probe no.4" Airgap too small probe no.5" Airgap too small probe no.6b" Airgap too small probe no.7" Airgap too small probe no.8" Airgap too small probe no.9" 24Vdc power supply" 23kV network under voltage, Phase R" 23kV network under voltage, Phase S" 23kV network under voltage, Phase T" 23kV network under frequency" Mill charge is frozen" Brakes do not release at start"

INPUT CROSSREFERENCE: INIT_*INIT

INTERN_DCP-Frozen-Fail

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_F/23kV-frequency INTERN_F/AGP1 INTERN_F/AGP2 INTERN_F/AGP3 INTERN_F/AGP4 INTERN_F/AGP5 INTERN_F/AGP6 INTERN_F/AGP7 INTERN_F/AGP8 INTERN_F/AGP9

Source: INT3\S21:RESET/LT Sink : INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:WARN-EVENT7 INT2\S03:FAULT-EVENT5 Source: INT2\S33:FROZENCHARGE Sink : INT2\S03:FAULT-EVENT5 Source: INT0\S07:FILTER5 Sink : INT2\S03:FAULT-EVENT5 Source: INT2\S28:AIR-GAP-SUP1 Sink : INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 Source: INT2\S28:AIR-GAP-SUP1 Sink : INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 Source: INT2\S28:AIR-GAP-SUP1 Sink : INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 Source: INT2\S28:AIR-GAP-SUP1 Sink : INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 Source: INT2\S28:AIR-GAP-SUP1 Sink : INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 Source: INT2\S29:AIR-GAP-SUP2 Sink : INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 Source: INT2\S29:AIR-GAP-SUP2 Sink : INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 Source: INT2\S29:AIR-GAP-SUP2 Sink : INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 Source: INT2\S29:AIR-GAP-SUP2

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S003 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S03:FAULT-EVENT5 FAULT HANDLING (Air gap supervision)


released:

A4 E

74

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_RESET

INTERN_Unet-R-U<85% INTERN_Unet-R-U<95%-60s INTERN_Unet-S-U<85% INTERN_Unet-S-U<95%-60s INTERN_Unet-T-U<85% INTERN_Unet-T-U<95%-60s KOMBI-1_F>TRACO-24V TRIP_SFF-1-FAST

TRIP_SFF-4-FAST

Source: INT3\S21:RESET/LT Sink : INT1\S10:FAULT-EVENT3 INT1\S25:TRANSFER/70 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:W INT2\S33:FROZENCHARGE INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 Source: INT0\S07:FILTER5 Sink : INT1\S08:FAULT-EVENT1 INT2\S03:FAULT-EVENT5 Source: INT0\S07:FILTER5 Sink : INT1\S08:FAULT-EVENT1 INT2\S03:FAULT-EVENT5 Source: INT0\S07:FILTER5 Sink : INT1\S08:FAULT-EVENT1 INT2\S03:FAULT-EVENT5 Source: INT0\S07:FILTER5 Sink : INT1\S08:FAULT-EVENT1 INT2\S03:FAULT-EVENT5 Source: INT0\S07:FILTER5 Sink : INT1\S08:FAULT-EVENT1 INT2\S03:FAULT-EVENT5 Source: INT0\S07:FILTER5 Sink : INT1\S08:FAULT-EVENT1 INT2\S03:FAULT-EVENT5 Source: INT2\S02:TRANSF>60 Sink : INT2\S03:FAULT-EVENT5 Source: INT1\S08:FAULT-EVENT1 Sink : INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:WARN-EVENT7 INT2\S03:FAULT-EVENT5 Source: INT1\S11:FAULT-EVENT4 Sink : INT1\S08:FAULT-EVENT1 INT2\S03:FAULT-EVENT5

OUTPUT CROSSREFERENCE: INTERN_FMO-INT2-5 INTERN_SUMF-INT2-5 TRIP_FF-5-SLOW TRIP_FFO-5-SLOW TRIP_SFF-5-SLOW

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT2\S03:FAULT-EVENT5 INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT2\S03:FAULT-EVENT5 INT1\S07:SUMMARY-F/W INT2\S03:FAULT-EVENT5 INT3\S23:FIRST-T/W INT2\S03:FAULT-EVENT5 INT3\S23:FIRST-T/W INT2\S03:FAULT-EVENT5 INT1\S08:FAULT-EVENT1 INT3\S05:FAULT-EVENT6

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S003 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S03:FAULT-EVENT5 FAULT HANDLING (Air gap supervision)


released:

A4 E

75

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_[nx] 80% = 9.043 rpm INTERN_[nx]1s 80% = 9.043 rpm

SELX1 X0 X1 % 2 SWI SELX1 X0 143.17627% 125.00000% X1 %

% 4 MULT X

ParamGrp_c-old ParamGrp_c ParamGrp_lolim 5.40161%

Y X*Y % %

5 ABS 100%

ParamGrp_K5 61.73706% ParamGrp_K1 47.14355%

6 LIM X XLIM UPLIM >UL LOLIM <LL % 8 SWI SELX1 X0 X1 %

Y X*Y % 9 MULT X INTERN_T0/T2

Y X*Y % 10 OND o / T T/ S INTERN_K5

INTERN_WRe ParamGrp_ZPR-RELEASE 6S

INTERN_REL-ZPR

nx: => => => => => => =>

8V c[%]

= 5.727Hz = 80% = fg = 25 * fg = 25 * 5.727% = 143.175%

K5[%] = 5 x 100 /(1.414 x fg) = 5 x 100 /(1.414 x 5.727) = 61.734% K1[%] = 100 x (sqrt2/3) = (1.414/3) x 100 = 47.14% T2 (alt) = (1.414 x T) = 1.414 x0.3183s = 0.45s To/T2 (alt) = 100 x Tint2/(1.414 x 0.3183s) = 100 x 0.005s/0.45s = 1.11% T2 (neu) = (1.414 x 3) / 2pi x fg = (1.414 x 3)/2 x 3.14 x 5.727 = 0.11794s To/T2 (neu) = 100 x Tint2 / 0.11794s) = 100 x 0.005s /0.11794s = 4.24%

REL-ZPR: 6s AFTER -WRe (approx.1s AFTER -WRc)

INPUT CROSSREFERENCE: INTERN_SW-Change-over-1

INTERN_WRe INTERN_[nx]

INTERN_[nx]1s ParamGrp_K1 ParamGrp_K5 ParamGrp_ZPR-RELEASE ParamGrp_c ParamGrp_c-old ParamGrp_lolim

Source: INT3\S12:PRIOSEL-4 Sink : INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 INT2\S34:TRANSFER/30 INT2\S23:EXCITAT-1 INT2\S13:NX INT2\S09:INTEG6 INT2\S08:INTEG5 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S05:INTEG2 INT2\S04:INTEG1 Source: INT2\S06:INTEG3 Sink : INT2\S09:INTEG6 INT2\S08:INTEG5 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S04:INTEG1 Source: INT2\S13:NX Sink : INT1\S11:FAULT-EVENT4 INT3\S22:STATUS-INDIC INT3\S12:PRIOSEL-4 INT2\S15:NX-LIMITS INT2\S26:EXCITAT-4 INT2\S13:NX INT2\ INT2\S04:INTEG1 Source: INT2\S13:NX Sink : INT2\S13:NX INT2\S04:INTEG1 Source: ? Sink : INT2\S04:INTEG1 Source: ? Sink : INT2\S04:INTEG1 Source: ? Sink : INT2\S04:INTEG1 Source: ? Sink : INT2\S04:INTEG1 Source: ? Sink : INT2\S04:INTEG1 Source: ? Sink : INT2\S04:INTEG1

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

OUTPUT CROSSREFERENCE: INTERN_K5 INTERN_REL-ZPR INTERN_T0/T2

Source: Sink : Source: Sink : Source: Sink :

INT2\S04:INTEG1 INT2\S09:INTEG6 INT2\S07:INTEG4 INT2\S04:INTEG1 INT1\S12:PHASE-SHIFT1 INT2\S23:EXCITAT-1 INT2\S13:NX INT2\S09:INTEG6 INT2\S07:INTEG4 INT2\S04:INTEG1 INT2\S09:INTEG6 INT2\S07:INTEG4

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S004 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S04:INTEG1 CALCULATION FACTOR 5K AND T0/T2


released:

A4 E

76

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_[nx] 80% = 9.043 rpm

ParamGrp_r-a 1.26953% INTERN_/ixR1/ INTERN_/uxMR/

3 MULT X Y X*Y % +2 % 5 7 33.33% TRAN MULT % X 8 Y ADD X*Y o +1 % +2 10 % MULT X 11 Y ADD X*Y o +1 % +2 % 14 TRAN % 4 ADD o +1

0% 100% 8% 99.4% 16% 97.7% 24% 94.7%

X X1 Y1 X2 Y2 X3 Y3 X4 Y4 Y % 6 MULT X Y X*Y % 9 MULT X Y X*Y % 12 MULT X Y X*Y % 15 MULT X Y X*Y % 16 MULT X Y X*Y % o +4 % 17 ADD +1 13 ADD +1 +2 X1 %

INTERN_/ixS1/ INTERN_/uxMS/

o +3

INTERN_/ixT1/ INTERN_/uxMT/

18 DIV X Y X/Y %

INTERN_u-i-alfa

57.74%

o +2 %

19 DIV X Y X/Y %

INTERN_u-i-beta

r-a = 0.0127p.u.=> 1.27% (acc. to Motordatas, Alstom / Mr.RIEZINGER ) BLOCK BLOCK 5 = 33.33% 14 = 57.74% (1/3) (1.732/3)

INPUT CROSSREFERENCE: INTERN_/ixR1/ INTERN_/ixS1/ INTERN_/ixT1/ INTERN_/uxMR/ INTERN_/uxMS/ INTERN_/uxMT/ INTERN_SW-Change-over-1

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_[nx]

ParamGrp_r-a

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INT0\S08:IX-COMMUTAT INT1\S14:PHASE-SHIFT3 INT2\S36:UNBALANCE-IX INT2\S05:INTEG2 INT0\S08:IX-COMMUTAT INT1\S14:PHASE-SHIFT3 INT2\S36:UNBALANCE-IX INT2\S05:INTEG2 INT0\S08:IX-COMMUTAT INT1\S14:PHASE-SHIFT3 INT2\S36:UNBALANCE-IX INT2\S05:INTEG2 INT0\S05:FILTER3 INT2\S27:MOT-POWER INT2\S05:INTEG2 INT0\S05:FILTER3 INT2\S05:INTEG2 INT0\S05:FILTER3 INT2\S05:INTEG2 INT3\S12:PRIOSEL-4 INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 INT2\S34:TRANSFER/30 INT2\S23:EXCITAT-1 INT2\S13:NX INT2\S09:INTEG6 INT2\S08:INTEG5 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S05:INTEG2 INT2\S04:INTEG1 INT2\S13:NX INT1\S11:FAULT-EVENT4 INT3\S22:STATUS-INDIC INT3\S12:PRIOSEL-4 INT2\S15:NX-LIMITS INT2\S26:EXCITAT-4 INT2\S13:NX INT2\ INT2\S04:INTEG1 ? INT2\S05:INTEG2

OUTPUT CROSSREFERENCE: INTERN_u-i-alfa INTERN_u-i-beta

Source: Sink : Source: Sink :

INT2\S05:INTEG2 INT2\S13:NX INT2\S06:INTEG3 INT2\S05:INTEG2 INT2\S13:NX INT2\S08:INTEG5

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S005 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S05:INTEG2 CREATION OF u_i_alfa AND u_i_beta


released:

A4 E

77

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

5K 1K INTERN_u-i-alfa

X0 X1 K

ADMLT K +1

5 ADD +1 o +2 o +3 %

0% 0B 100% -100%

6 INT-I + IC SIC T0/TI UPLIM LOLIM + 0% < 0B 100% -100%

7 INT-I + IC SIC T0/TI UPLIM LOLIM + <

INTERN_offset-u-i-a

INTERN_out-ZPR-psi-alfa ParamGrp_T0/TI 17.99316%

8 ADD +1 o +2 %

0% 199% -199%

9 INT-I + IC SIC T0/TI UPLIM LOLIM +

INTERN_psi-alfa

Poles:76, ToInt2 = 5.000 ms, fg = 5.727 Hz => Block 4 : To/TI [%] = (pi/2) * ToInt2 * p = (3.14/2) * 0.005 * 38= 0.2983% => Block 9 : T0/T1 [%] = 200 * ToInt2 x fg /0.3183 = 200 * 0.005 * 5.727 /0.3183 = 17.9924%

INPUT CROSSREFERENCE: INTERN_-WRe INTERN_SW-Change-over-1

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_out-ZPR-psi-alfa INTERN_u-i-alfa ParamGrp_T0/TI

INT1\S07:SUMMARY-F/W INT1\S11:FAULT-EVENT4 INT1\S07:SUMMARY-F/W INT1\S06:DET-UE/IE,UN INT3\S19:INCH-ANGLE INT3\S12:PRIOSEL-4 INT2\S06:INTEG INT3\S12:PRIOSEL-4 INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 INT2\S34:TRANSFER/30 INT2\S23:EXCITAT-1 INT2\S13:NX INT2\S09:INTEG6 INT2\S08:INTEG5 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S05:INTEG2 INT2\S04:INTEG1 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S05:INTEG2 INT2\S13:NX INT2\S06:INTEG3 ? INT2\S08:INTEG5 INT2\S06:INTEG3

OUTPUT CROSSREFERENCE: INTERN_T0/TI-OFFSET INTERN_WRe INTERN_offset-u-i-alfa INTERN_psi-alfa

Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT2\S06:INTEG3 INT2\S08:INTEG5 INT2\S06:INTEG3 INT2\S06:INTEG3 INT2\S09:INTEG6 INT2\S08:INTEG5 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S04:INTEG1 INT2\S06:INTEG3 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S06:INTEG3 INT2\S11:DETECTN1 INT2\S10:INTEG7 INT2\S09:INTEG6 INT2\S07:INTEG4

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S006 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S06:INTEG3 OFFSET u-i-alfa , psi-alfa


released:

A4 E

78

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

% INTERN_REL-ZPR B INTERN_WRe INTERN_psi-alfa

RSFF S R Q 0% 4 SWI o SELX1 X0 X1 % 5 MULT X Y X*Y % 6 INT-I + IC SIC T0/TI UPLIM LOLIM +

INTERN_K5 INTERN_offset-u-i-alfa INTERN_T0/T2

199% -199%

7 ADD +1 +2 % 8 SWI SELX1 X0 X1 %

9 MULT X

INTERN_SW-Change-over-1 20% 100%

Y X*Y % INTERN_out-ZPR-psi-

INPUT CROSSREFERENCE: INTERN_K5 INTERN_REL-ZPR INTERN_SW-Change-over-1

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_T0/T2 INTERN_WRe INTERN_offset-u-i-alfa INTERN_psi-alfa INTERN_psi-beta

INT2\S04:INTEG1 INT2\S09:INTEG6 INT2\S07:INTEG4 INT2\S04:INTEG1 INT1\S12:PHASE-SHIFT1 INT2\S23:EXCITAT-1 INT2\S13:NX INT2\S09:INTEG6 INT2\S07:INTEG4 INT3\S12:PRIOSEL-4 INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 INT2\S34:TRANSFER/30 INT2\S23:EXCITAT-1 INT2\S13:NX INT2\S09:INTEG6 INT2\S08:INTEG5 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S05:INTEG2 INT2\S04:INTEG1 INT2\S04:INTEG1 INT2\S09:INTEG6 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S09:INTEG6 INT2\S08:INTEG5 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S04:INTEG1 INT2\S06:INTEG3 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S06:INTEG3 INT2\S11:DETECTN1 INT2\S10:INTEG7 INT2\S09:INTEG6 INT2\S07:INTEG4 INT2\S08:INTEG5 INT2\S12:DETECTN2 INT2\S10:INTEG7 INT2\S09:INTEG6 INT2\S07:INTEG4

OUTPUT CROSSREFERENCE: INTERN_out-ZPR-psi-alfa

Source: INT2\S07:INTEG4 Sink : INT2\S06:INTEG3

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S007 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S07:INTEG4 ZPR-psi-alfa

released:

A4 E

79

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

K INTERN_u-i-beta +1

ADD +1 o +2 o +3 %

0% 0B 100% -100%

INTERN_T0/TI-OFFSET

4 INT-I + IC SIC T0/TI UPLIM LOLIM + 0% < 0B 100% -100%

5 INT-I + IC SIC T0/TI UPLIM LOLIM + <

INTERN_offset-u-i-b

INTERN_out-ZPR-psi-beta INTERN_WRe ParamGrp_T0/TI 17.99316%

6 ADD +1 o +2 %

0%

7 INT-I + IC SIC T0/TI UPLIM LOLIM +

199% -199%

INTERN_psi-beta

INPUT CROSSREFERENCE: INTERN_SW-Change-over-1

INTERN_T0/TI-OFFSET INTERN_WRe INTERN_out-ZPR-psi-beta INTERN_u-i-beta ParamGrp_T0/TI

Source: INT3\S12:PRIOSEL-4 Sink : INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 INT2\S34:TRANSFER/30 INT2\S23:EXCITAT-1 INT2\S13:NX INT2\S09:INTEG6 INT2\S08:INTEG5 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S05:INTEG2 INT2\S04:INTEG1 Source: INT2\S06:INTEG3 Sink : INT2\S08:INTEG5 INT2\S06:INTEG3 Source: INT2\S06:INTEG3 Sink : INT2\S09:INTEG6 INT2\S08:INTEG5 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S04:INTEG1 Source: INT2\S09:INTEG6 Sink : INT2\S08:INTEG5 Source: INT2\S05:INTEG2 Sink : INT2\S13:NX INT2\S08:INTEG5 Source: ? Sink : INT2\S08:INTEG5 INT2\S06:INTEG3

OUTPUT CROSSREFERENCE: INTERN_offset-u-i-beta INTERN_psi-beta

Source: Sink : Source: Sink :

INT2\S08:INTEG5 INT2\S09:INTEG6 INT2\S08:INTEG5 INT2\S08:INTEG5 INT2\S12:DETECTN2 INT2\S10:INTEG7 INT2\S09:INTEG6 INT2\S07:INTEG4

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S008 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S08:INTEG5 OFFSET u-i-beta , psi-beta


released:

A4 E

80

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

% INTERN_REL-ZPR B INTERN_WRe INTERN_psi-beta

RSFF S R Q 0% 4 SWI o SELX1 X0 X1 % 5 MULT X Y X*Y % 6 INT-I + IC SIC T0/TI UPLIM LOLIM +

INTERN_K5 INTERN_offset-u-i-beta INTERN_T0/T2

199% -199%

7 ADD +1 +2 % 8 SWI SELX1 X0 X1 %

9 MULT X

INTERN_SW-Change-over-1 20% 100%

Y X*Y %

INTERN_out-ZPR-psi-b

INPUT CROSSREFERENCE: INTERN_K5 INTERN_REL-ZPR INTERN_SW-Change-over-1

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_T0/T2 INTERN_WRe INTERN_offset-u-i-beta INTERN_psi-alfa INTERN_psi-beta

INT2\S04:INTEG1 INT2\S09:INTEG6 INT2\S07:INTEG4 INT2\S04:INTEG1 INT1\S12:PHASE-SHIFT1 INT2\S23:EXCITAT-1 INT2\S13:NX INT2\S09:INTEG6 INT2\S07:INTEG4 INT3\S12:PRIOSEL-4 INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 INT2\S34:TRANSFER/30 INT2\S23:EXCITAT-1 INT2\S13:NX INT2\S09:INTEG6 INT2\S08:INTEG5 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S05:INTEG2 INT2\S04:INTEG1 INT2\S04:INTEG1 INT2\S09:INTEG6 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S09:INTEG6 INT2\S08:INTEG5 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S04:INTEG1 INT2\S08:INTEG5 INT2\S09:INTEG6 INT2\S08:INTEG5 INT2\S06:INTEG3 INT2\S11:DETECTN1 INT2\S10:INTEG7 INT2\S09:INTEG6 INT2\S07:INTEG4 INT2\S08:INTEG5 INT2\S12:DETECTN2 INT2\S10:INTEG7 INT2\S09:INTEG6 INT2\S07:INTEG4

OUTPUT CROSSREFERENCE: INTERN_out-ZPR-psi-beta

Source: INT2\S09:INTEG6 Sink : INT2\S08:INTEG5

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S009 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S09:INTEG6 ZPR-psi-beta

released:

A4 E

81

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

% INTERN_psi-beta 2 MULT X Y X*Y %

+2 %

4 SQRT % X Y

INTERN_[psix] 5 DIV X/Y % 6 DIV X Y X/Y % INTERN_cos-e1 INTERN_sin-e1

INPUT CROSSREFERENCE: INTERN_psi-alfa INTERN_psi-beta

Source: Sink : Source: Sink :

INT2\S06:INTEG3 INT2\S11:DETECTN1 INT2\S10:INTEG7 INT2\S09:INTEG6 INT2\S07:INTEG4 INT2\S08:INTEG5 INT2\S12:DETECTN2 INT2\S10:INTEG7 INT2\S09:INTEG6 INT2\S07:INTEG4

OUTPUT CROSSREFERENCE: INTERN_[psix] INTERN_cos-e1 INTERN_sin-e1

Source: Sink : Source: Sink : Source: Sink :

INT2\S10:INTEG7 BACKGND\S06:SELECT-IND INT1\S26:RECORDING INT2\S23:EXCITAT-1 INT2\S20:ANTIVOLT INT2\S13:NX INT2\S10:INTEG7 INT2\S10:INTEG7 INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 INT2\S10:INTEG7 INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S010 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S10:INTEG7 SPEED detection : [psix],sin/cos-e1


released:

A4 E

82

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

0% 0% 0B 173.06% 0% -173.06% -28.10% 18.56%

ICO-1 ICO SIC A0 A1 A2 B1 B2 +

+1

INTERN_d-psi-alfa/d

Parameters of G2[z] 2 according to attached Table Fr 50 Hz A0 = 173.06% A1 = 0% A2 = -173.06% B1 = -28.10% B2 = 18.56%

INPUT CROSSREFERENCE: INTERN_psi-alfa

Source: INT2\S06:INTEG3 Sink : INT2\S11:DETECTN1 INT2\S10:INTEG7 INT2\S09:INTEG6 INT2\S07:INTEG4

OUTPUT CROSSREFERENCE: INTERN_d-psi-alfa/dt

Source: INT2\S11:DETECTN1 Sink : INT2\S13:NX

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S011 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S11:DETECTN1 Calculation of dpsi-alfa/dt


released:

A4 E

83

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

0% 0% 0B 173.06% 0% -173.06% -28.10% 18.56%

ICO-1 ICO SIC A0 A1 A2 B1 B2 +

+1

INTERN_d-psi-beta/d

INPUT CROSSREFERENCE: INTERN_psi-beta

Source: INT2\S08:INTEG5 Sink : INT2\S12:DETECTN2 INT2\S10:INTEG7 INT2\S09:INTEG6 INT2\S07:INTEG4

OUTPUT CROSSREFERENCE: INTERN_d-psi-beta/dt

Source: INT2\S12:DETECTN2 Sink : INT2\S13:NX

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S012 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S12:DETECTN2 Calculation of dpsi-beta/dt


released:

A4 E

84

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_u-i-beta

INTERN_d-psi-alfa/dt INTERN_u-i-alfa

X1 % 3 SWI SELX1 X0 X1 %

MULT X Y X*Y % 4 MULT X Y X*Y %

5 ADD +1

+2 % 7 & B 80%

INTERN_REL-ZPR INTERN_[psix]

6 SQRT % 8 SWI SELX1 X0 X1 %

9 DIV X

Y X/Y % 10 SWI SELX1 X0 X1 %

11 MULT X

ParamGrp_nx-manipulation 69.84253% ParamGrp_nx-manipulation1 79.99878%

Y X*Y % 48% 12 SWI SELX1 X0 X1 %

13 THRUL X

ParamGrp_Change-Over-Par 34.99756%

1%

15 ADD +1 o +2 %

0% 0B 2.0% 100% -100%

16 INT-I + IC SIC T0/TI UPLIM LOLIM + < 17 ADD +1 o +2 %

48% 1%

UPLIM HYS >=LIM % < 14 THRUL X UPLIM HYS >=LIM %

INTERN_60%-n

INTERN_[nx] 80% = 9.043 rpm 18 INT-I + IC SIC T0/TI UPLIM LOLIM + < 19 MULT X Y X*Y % 20 SWI SELX1 X0 o X1 %

0% 0B 0.5% 100% -100%

INTERN_[nx]1s 80% = 9.043 rpm

ParamGrp_NX 94.19556%

UAC326-1_i-pi/nx 0..12 rpm

INTERN_REVERSE

INTERN_nx 80% = 9.043 rpm

Parameter Block 10 nx in : 10V = 100% = 5.0Hz nx out : 8V = 80% = 5.727Hz = ng = 9.043 rpm => Adaption = (80% / 5.727 Hz) * 5.0 Hz = 69.8445% 60%-n : : : 4.8V = 4.295Hz = 6.782rpm 0.25s = 2% 1.0 s = 0.5% (1s filter for the voltage integration)

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

T0/TI T0/TI

INPUT CROSSREFERENCE: INTERN_REL-ZPR INTERN_REVERSE

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_SW-Change-over-1

INTERN_[psix] INTERN_d-psi-alfa/dt INTERN_d-psi-beta/dt

INT2\S04:INTEG1 INT1\S12:PHASE-SHIFT1 INT2\S23:EXCITAT-1 INT2\S13:NX INT2\S09:INTEG6 INT2\S07:INTEG4 INT3\S12:PRIOSEL-4 INT1\S13:PHASE-SHIFT2 LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S03:STATUS-1 INT1\S12:PHASE-SHIFT1 PANEL-AFC094\S05:LED-CO INT2\S14:START-PARS INT2\S19:ROCK-STOP INT2\S18:CONTROL-N INT2\S13:NX INT2\S17:NW2 INT3\S12:PRIOSEL-4 INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 INT2\S34:TRANSFER/30 INT2\S23:EXCITAT-1 INT2\S13:NX INT2\S09:INTEG6 INT2\S08:INTEG5 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S05:INTEG2 INT2\S04:INTEG1 INT2\S10:INTEG7 BACKGND\S06:SELECT-IND INT1\S26:RECORDING INT2\S23:EXCITAT-1 INT2\S20:ANTIVOLT INT2\S13:NX INT2\S10:INTEG7 INT2\S11:DETECTN1 INT2\S13:NX INT2\S12:DETECTN2 INT2\S13:NX

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S013 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S13:NX nx , [nx] GENERATION


released:

A4 E

85

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

Sink : Source: Sink : ParamGrp_NX Source: Sink : ParamGrp_nx-manipulation Source: Sink : ParamGrp_nx-manipulation1 Source: Sink : ParamGrp_Change-Over-Par OUTPUT CROSSREFERENCE: INTERN_60%-n INTERN_[nx]

INT2\S13:NX INT2\S08:INTEG5 ? INT2\S13:NX ? INT2\S13:NX ? INT2\S13:NX ? INT2\S13:NX

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_[nx]1s INTERN_nx

UAC326-1_i-pi/nx

INT2\S13:NX INT3\S17:MILL-ON,WR INT2\S15:NX-LIMITS INT2\S14:START-PARS INT2\S13:NX INT1\S11:FAULT-EVENT4 INT3\S22:STATUS-INDIC INT3\S12:PRIOSEL-4 INT2\S15:NX-LIMITS INT2\S26:EXCITAT-4 INT2\S13:NX INT2\ INT2\S04:INTEG1 INT2\S13:NX INT2\S13:NX INT2\S04:INTEG1 INT2\S13:NX BACKGND\S06:SELECT-IND BACKGND\S05:I-ANALOG-ADP INT3-MODBUS\S05:ANALOG-OUT-1 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIF INT2\S20:ANTIVOLT INT2\S18:CONTROL-N INT2\S13:NX ?

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S013 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S13:NX nx , [nx] GENERATION


released:

A4 E

86

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

50S ParamGrp_nw-delay2 50S X1 S 3 SWI SELX1 X0 2 SWI SELX1 X0 X1 % X1 % 5 SWI SELX1 INTERN_nw-Anfahren INTERN_nw-delay

ParamGrp_nw-Anfahren 1.3 rpm 11.49902% INTERN_CREEPING ParamGrp_Anfahren-Inching 1.3 rpm 11.49902% ParamGrp_Anfahren-Creep 0.4 rpm 3.54004%

INTERN_INCHING ParamGrp_nw-min 3.0 rpm 26.53809% ParamGrp_nw-inching 1.3 rpm 11.49902% ParamGrp_nw-creeping 0.3 rpm 2.65503% 6 MS INTERN_START ParamGrp_start-dly-start 15S S ParamGrp_nw-ramptime 0.00610% ParamGrp_start-dly3 0.01221% ParamGrp_ramp-inch-creep 0.01831% INTERN_60%-n / T /T\

4 SWI SELX1 X0 X1 % X0 X1 % 8 SWI SELX1 7 SWI SELX1 X0 X1 % X0 X1 % 10 SWIF SELX1 9 SWIF SELX1 X0 X1 K X0 X1 K 12 SWI SELX1 11 SWI SELX1 X0 X1 % X0 X1 % 14 SWI SELX1 13 SWI SELX1 X0 X1 % X0 X1 % 15 SWI SELX1 X0 X1 % INTERN_overspeed-tr INTERN_nw-uplim INTERN_Kp-n INTERN_nw-ramp INTERN_nw-min

ParamGrp_CONT-N:kp-start 4.505859K ParamGrp_kp-n-INCH-CREEP 5.505859K ParamGrp_CONT-N:kp-runn 3.000000K

INTERN_REVERSE INTERN_Nw-Int-Limit ParamGrp_nw-uplim-incCre 3.0 rpm 26.53809%

ParamGrp_overspeed-forwar 11 rpm 97.32056% ParamGrp_overspeed-revers 11 rpm 97.32056% ParamGrp_overspeed-incCre 3 rpm 26.53809% INTERN_SW-Torque-Limit ParamGrp_Iw-Max-Start-Lim 104.00391% ParamGrp_Iw-Max-Run-Lim 84.00879%

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_I-LIM-CONTR-N

Nx [rpm]

Normal Mode

2.0 + . . . 1.3 + . .....................

Nx .................

Min Speed

Inching Speed

. ___ ___________________ __________________________ 2 45 Time [s]

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-12-06

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S014 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S14:START-PARS Parameter Setting


released:

A4 E

87

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

Inching Mode Creeping Mode

: 1.3 rpm. : 0.3 rpm.

Over speed limit: Normal Mode (F/R) : 11.0 rpm. Inc/Cre Mode(F/R) : 3.0 rpm. Torque limit: Starting Running

: 105 % (105% / 80% = 130% of norminal) : 85 % (85% / 80% = 106% of norminal)

INPUT CROSSREFERENCE: INTERN_60%-n INTERN_CREEPING

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_INCH-OR-CREEP INTERN_INCHING

INTERN_Nw-Int-Limit INTERN_REVERSE

INTERN_START INTERN_SW-Torque-Limit ParamGrp_Anfahren-Creep ParamGrp_Anfahren-Inching ParamGrp_CONT-N:kp-runn ParamGrp_CONT-N:kp-start ParamGrp_Iw-Max-Run-Lim ParamGrp_Iw-Max-Start-Lim ParamGrp_kp-n-INCH-CREEP ParamGrp_nw-Anfahren ParamGrp_nw-creeping ParamGrp_nw-delay ParamGrp_nw-delay2 ParamGrp_nw-inching ParamGrp_nw-min ParamGrp_nw-ramptime

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

ParamGrp_nw-uplim-incCre ParamGrp_overspeed-forwar ParamGrp_overspeed-incCre ParamGrp_overspeed-revers ParamGrp_ramp-inch-creep ParamGrp_start-dly-start ParamGrp_start-dly3

INT2\S13:NX INT3\S17:MILL-ON,WR INT2\S15:NX-LIMITS INT2\S14:START-PARS INT3\S12:PRIOSEL-4 LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT2\S14:START-PARS INT2\S23:EXCITAT-1 INT2\S17:NW2 INT3\S12:PRIOSEL-4 INT3\S18:BRAKE-HORN INT3\S12:PRIOSEL-4 INT2\S14:START-PARS INT3\S12:PRIOSEL-4 LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S19:INCH-ANGLE INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT2\S14:START-PARS INT2\S32:ANGLECAPTUR INT2\S16:NW1 INT2\S14:START-PARS INT2\S16:NW1 INT3\S12:PRIOSEL-4 INT1\S13:PHASE-SHIFT2 LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S03:STATUS-1 INT1\S12:PHASE-SHIFT1 PANEL-AFC094\S05:LED-CO INT2\S14:START-PARS INT2\S19:ROCK-STOP INT2\S18:CONTROL-N INT2\S13:NX INT2\S17:NW2 INT3\S16:START/STOP INT3\S17:MILL-ON,WR INT2\S14:START-PARS INT2\S16:NW1 INT1\S04:DETECT-I> INT1\S04:DETECT-I> INT2\S14:START-PARS ? INT2\S14:START-PARS ? INT2\S14:START-PARS ? INT2\S14:START-PARS ? INT2\S14:START-PARS ? INT2\S14:START-PARS ? INT2\S14:START-PARS ? INT2\S14:START-PARS ? INT2\S14:START-PARS ? INT2\S14:START-PARS ? INT2\S14:START-PARS ? INT2\S14:START-PARS ? INT2\S14:START-PARS ? INT2\S14:START-PARS ? INT2\S14:START-PARS ? INT2\S14:START-PARS ? INT2\S14:START-PARS ? INT2\S14:START-PARS ? INT2\S14:START-PARS ? INT2\S14:START-PARS ? INT2\S14:START-PARS ? INT2\S14:START-PARS

OUTPUT CROSSREFERENCE: INTERN_I-LIM-CONTR-N INTERN_Kp-n

Source: Sink : Source: Sink :

INT2\S14:START-PARS INT2\S18:CONTROL-N INT2\S14:START-PARS INT2\S18:CONTROL-N

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-12-06

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S014 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S14:START-PARS Parameter Setting


released:

A4 E

88

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_nw-min INTERN_nw-ramp INTERN_nw-uplim INTERN_overspeed-trip

Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT2\S16:NW1 INT2\S14:START-PARS INT2\S16:NW1 INT2\S14:START-PARS INT2\S17:NW2 INT2\S14:START-PARS INT2\S17:NW2 INT2\S14:START-PARS INT1\S11:FAULT-EVENT4

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-12-06

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S014 F01/K01


doc. type format language sht. nr.

3
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S14:START-PARS Parameter Setting


released:

A4 E

89

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to t is prohibited; it is civilly and criminally actionable.

84.99756% ParamGrp_Nw-Min-Unet85% 8.0 rpm 70.77026% ParamGrp_Unet-Limit-95% 95.00122% ParamGrp_Nw-Min-Unet95% 8.5 rpm 75.19531% ParamGrp_Unet-Limit-96% 96.00220% 96% 0.5%

Y1 X2 Y2 X3 1 THRUL X UPLIM HYS >=LIM %

2 OND 3s / T T/ S 3 SWI SELX1 X0 X1 %

ParamGrp_Nw-Max-Lim 9.776 rpm 86.48682%

110%

Y3 X4 Y4 Y %

7 MIN X1 <<1 <<2

INTERN_+delta-psi-T ParamGrp_+Delta-psi-Lim1 9.776 rpm 86.48682% ParamGrp_+Delta-psi-Lim2 9.776 rpm 86.48682% ParamGrp_+Delta-psi-Lim3 9.043 rpm 79.99878% ParamGrp_+Delta-psi-Lim4 8.500 rpm 75.19531% ParamGrp_+Delta-psi-Lim5 8.000 rpm 70.77026% 8 OND ParamGrp_Counter-Reset 3600S S o / T T/ 9 RSFF S o R Q < INTERN_-WRc-CONTROL 10 MS / 50ms T /T\ MS 12 THRUL o X 15% UPLIM 0.5% HYS >=LIM % ParamGrp_Delta-psi-count 0005H 11% 0.5% o

5 FCTL o X 0% X1 Y1 14% X2 Y2 15% X3 Y3 20% X4 Y4 25% X5 Y5 Y % 6 FCTL X X1 Y1 X2 Y2 X3 Y3 X4 Y4 X5 Y5 Y % B X3 % X2 <<3 MIN

0% 10% 11 >=1 12% 14% 16%

50ms

13 MS / T /T\ MS

15 THRUL X UPLIM HYS >=LIM %

14 CNT CLK/ R N# >=N

18 >=1

50ms

INTERN_REM-nw-adapt ParamGrp_Speed-Reset 8.0 rpm 70.77026% 0.5%

16 MS / T /T\ MS 19 THRLL X LOLIM HYS <=LIM % o

17 CNT CLK/ R N# >=N B 20 >=1 B 50ms

22 RSFF S

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

21 MS / T /T\ MS

R Q 23 SWI SELX1 < X0 X1 % 27 OND /

INTERN_Nw-Limit-8-rp

26 24 TRAN % 25 TRAN % 2S S INTERN_60%-n INTERN_W/Unet<95% INTERN_+iw INTERN_Torque-Lim-Alarm 80.99976% 29 ABS % 0.5% 30 THRUL X UPLIM HYS >=LIM COMPW X X=Y X>Y Y T T/

INTERN_NW-Uplim-Forw Speed Limit

INTERN_[nx] 80% = 9.043 rpm ParamGrp_Delay-Speed-Diff

28 &

INTERN_SpeedLim-Une B

31 OND /

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-12-06

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S015 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S15:NX-LIMITS Speed Reference Limit


released:

A4 E

90

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

Block no.29 : Torque Overload Limit

INPUT CROSSREFERENCE: INTERN_+delta-psi-T INTERN_+iw INTERN_-WRc-CONTROL

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_60%-n INTERN_Min-Phase-Volt INTERN_REM-nw-adapt INTERN_Torque-Lim-Alarm INTERN_W/Unet<95% INTERN_[nx]

ParamGrp_+Delta-psi-Lim1

Source: Sink : ParamGrp_+Delta-psi-Lim2 Source: Sink : ParamGrp_+Delta-psi-Lim3 Source: Sink : ParamGrp_+Delta-psi-Lim4 Source: Sink : ParamGrp_+Delta-psi-Lim5 Source: Sink : ParamGrp_Counter-Reset Source: Sink : ParamGrp_Delay-Speed-Diff Source: Sink : ParamGrp_Delta-psi-count Source: Sink : ParamGrp_Load-Limit-Delay Source: Sink : ParamGrp_Nw-Max-Lim Source: Sink : ParamGrp_Nw-Min-Unet85% Source: Sink : ParamGrp_Nw-Min-Unet95% Source: Sink : ParamGrp_Speed-Reset Source: Sink : ParamGrp_Unet-Limit-85% Source: Sink : ParamGrp_Unet-Limit-95% Source: Sink : ParamGrp_Unet-Limit-96% Source: Sink : OUTPUT CROSSREFERENCE: INTERN_NW-Uplim-Forward

INT1\S24:TRAPEZ BACKGND\S06:SELECT-IND INT1\S24:TRAPEZ INT2\S15:NX-LIMITS INT2\S19:ROCK-STOP INT2\S15:NX-LIMITS INT1\S26:RECORDING INT2\S33:FROZENCHARGE INT2\S22:COSPHI2 INT3\S17:MILL-ON,WR INT1\S11:FAULT-EVENT4 INT1\S07:SUMMARY-F/W INT1\S04:DETECT-I> INT3\S19:INCH-ANGLE INT3\S18:BRAKE-HORN INT2\S15:NX-LIMI INT2\S33:FROZENCHARGE INT2\S32:ANGLECAPTUR INT2\S29:AIR-GAP-SUP2 INT2\S28:AIR-GAP-SUP1 INT2\S13:NX INT3\S17:MILL-ON,WR INT2\S15:NX-LIMITS INT2\S14:START-PARS INT0\S07:FILTER5 INT2\S15:NX-LIMITS INT3-MODBUS\S09:SETPOINTS INT3-MODBUS\S09:SETPOINTS INT2\S15:NX-LIMITS INT2\S17:NW2 ? INT2\S15:NX-LIMITS INT0\S07:FILTER5 INT3\S06:WARN-EVENT7 INT2\S15:NX-LIMITS INT2\S13:NX INT1\S11:FAULT-EVENT4 INT3\S22:STATUS-INDIC INT3\S12:PRIOSEL-4 INT2\S15:NX-LIMITS INT2\S26:EXCITAT-4 INT2\S13:NX INT2\ INT2\S04:INTEG1 ? INT2\S15:NX-LIMITS ? INT2\S15:NX-LIMITS ? INT2\S15:NX-LIMITS ? INT2\S15:NX-LIMITS ? INT2\S15:NX-LIMITS ? INT2\S15:NX-LIMITS ? INT2\S15:NX-LIMITS ? INT2\S15:NX-LIMITS ? INT2\S15:NX-LIMITS ? INT2\S15:NX-LIMITS ? INT2\S15:NX-LIMITS ? INT2\S15:NX-LIMITS ? INT2\S15:NX-LIMITS ? INT2\S15:NX-LIMITS ? INT2\S15:NX-LIMITS ? INT2\S15:NX-LIMITS

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_Nw-Limit-8-rpm INTERN_SpeedLim-Unet<95 INTERN_Torque-Limit

Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT2\S15:NX-LIMITS INT2\S16:NW1 INT2\S15:NX-LIMITS PANEL-AFC094\S03:PANEL-OUT INT3-MODBUS\S03:STATUS-1 INT2\S15:NX-LIMITS INT2\S15:NX-LIMITS PANEL-AFC094\S03:PANEL-OUT INT2\S15:NX-LIMITS PANEL-AFC094\S03:PANEL-OUT

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-12-06

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S015 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S15:NX-LIMITS Speed Reference Limit


released:

A4 E

91

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_START INTERN_nw-delay INTERN_nw-Anfahren INTERN_nw-min

/ T T/ S X0 4 & 5 MS 20S / T /T\ S 8 >=1 9 SWI SELX1 X0 X1 % 10 SWI SELX1 X0 X1 % 15 ADD +1 X1 % 0% X0 X1 % INTERN_nw-I/lowlimi 2 SWI SELX1

INTERN_CENTRAL-SEL

o B

INTERN_SLOWER B 0% -80%

INTERN_FASTER 11 & INTERN_-WR INTERN_nw>REF 6 & / B ParamGrp_nw-delay1 20S S T T/ B 12 & 7 OND o o 0% 80%

+2

INTERN_NW-Uplim-Forward Speed Limit ParamGrp_Nw-Integration 0.50049% ParamGrp_Nw-Int-Max-Lim 100.00000% ParamGrp_Nw-Int-Min-Lim 0.00000%

13 SWI SELX1 0% X0 80% X1 % 14 SWI SELX1 0% X0 -80% X1 % 16 ADD +1 o +2 %

+3

+4 % 17 INT-I + IC SIC T0/TI UPLIM LOLIM + <

INTERN_nw-I/+

0% 0B

INTERN_Nw-Int-Limit

INPUT CROSSREFERENCE: INTERN_-WR

INTERN_CENTRAL-SEL

INTERN_FASTER INTERN_NW-Uplim-Forward INTERN_SLOWER INTERN_START INTERN_STOP

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_nw-Anfahren INTERN_nw-delay INTERN_nw-min INTERN_nw>REF ParamGrp_Nw-Int-Max-Lim ParamGrp_Nw-Int-Min-Lim ParamGrp_Nw-Integration ParamGrp_nw-delay1

Source: INT1\S07:SUMMARY-F/W Sink : INT1\S25:TRANSFER/70 INT1\S15:BRDGE-COMMUT INT1\S07:SUMMARY-F/W INT3\S24:NW-REM-AD,PM INT2\S18:CONTROL-N INT2\S17:NW2 INT2\S16:NW1 Source: BACKGND\S04:MODE-SELECT Sink : INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 INT3\S18:BRAKE-HORN INT3\S14:START-UP-AUX INT3\S11:PRIOSEL-3 INT3\S10:PRIOSEL-2 INT3\S15:MVD-ON-OFF INT3\S16:START/STOP INT3\S17:MILL-ON,WR INT3\S12:PRIOSEL-4 INT2\S17:NW2 INT2\S1 Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S05:LED-CONTROL1 INT3\S19:INCH-ANGLE INT2\S16:NW1 Source: INT2\S15:NX-LIMITS Sink : INT2\S16:NW1 Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S05:LED-CONTROL1 INT3\S19:INCH-ANGLE INT2\S16:NW1 Source: INT3\S16:START/STOP Sink : INT3\S17:MILL-ON,WR INT2\S14:START-PARS INT2\S16:NW1 Source: INT3\S16:START/STOP Sink : INT1\S11:FAULT-EVENT4 INT3\S22:STATUS-INDIC INT3\S17:MILL-ON,WR INT2\S19:ROCK-STOP INT2\S16:NW1 Source: INT2\S14:START-PARS Sink : INT2\S16:NW1 Source: INT2\S14:START-PARS Sink : INT2\S16:NW1 Source: INT2\S14:START-PARS Sink : INT2\S16:NW1 Source: INT2\S17:NW2 Sink : INT2\S16:NW1 Source: ? Sink : INT2\S16:NW1 Source: ? Sink : INT2\S16:NW1 Source: ? Sink : INT2\S16:NW1 Source: ? Sink : INT2\S16:NW1

OUTPUT CROSSREFERENCE: INTERN_Nw-Int-Limit

Source: INT2\S16:NW1 Sink : INT2\S14:START-PARS INT2\S16:NW1

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S016 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S16:NW1 SPEED REFERENCE LIMITATION


released:

A4 E

92

3BHS135699

change

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

PSR FUPLA2 Release 4.B1

Sink

Collahuasi Project SAG Mill / Run Program

replaces:

office resp.:

replaced by:

derived from:

: INT2\S17:NW2

Johannes Gonser

issued:

checked:

ATBDE / J.Gonser INT2 S16:NW1 SPEED REFERENCE LIMITATION

released:

std. checked:

05-08-26

doc. type

format

A4 E

language

3BHS135699

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S016 F01/K01

93

sht. nr.

nr. of shts.

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_-WR INTERN_nw-ramp INTERN_nw-uplim

o SIC T0/TI UPLIM LOLIM + 2 SWI SELX1 X0 X1 %

X1 <<2 INTERN_nw>REF

INTERN_CENTRAL-SEL 80% INTERN_REM-nw-adapt

X2 % 7 SWI SELX1

INTERN_REVERSE 4 ADD +1 o +2 % INTERN_WR-DELAYED INTERN_CREEPING ParamGrp_StartRamp 0.10376% ParamGrp_StartRampCreep 0.50049% 5 SWI SELX1 X0 X1 % 0% T0/TI UPLIM LOLIM + < 6 INT-I + IC SIC

0%

X0 o X1 %

INTERN_/nw/

INPUT CROSSREFERENCE: INTERN_-WR

INTERN_CENTRAL-SEL

INTERN_CREEPING

INTERN_REM-nw-adapt INTERN_REVERSE

INTERN_WR-DELAYED INTERN_nw-I/+ INTERN_nw-I/lowlimit INTERN_nw-ramp INTERN_nw-uplim ParamGrp_StartRamp ParamGrp_StartRampCreep

Source: INT1\S07:SUMMARY-F/W Sink : INT1\S25:TRANSFER/70 INT1\S15:BRDGE-COMMUT INT1\S07:SUMMARY-F/W INT3\S24:NW-REM-AD,PM INT2\S18:CONTROL-N INT2\S17:NW2 INT2\S16:NW1 Source: BACKGND\S04:MODE-SELECT Sink : INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 INT3\S18:BRAKE-HORN INT3\S14:START-UP-AUX INT3\S11:PRIOSEL-3 INT3\S10:PRIOSEL-2 INT3\S15:MVD-ON-OFF INT3\S16:START/STOP INT3\S17:MILL-ON,WR INT3\S12:PRIOSEL-4 INT2\S17:NW2 INT2\S1 Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT2\S14:START-PARS INT2\S23:EXCITAT-1 INT2\S17:NW2 Source: INT3-MODBUS\S09:SETPOINTS Sink : INT3-MODBUS\S09:SETPOINTS INT2\S15:NX-LIMITS INT2\S17:NW2 Source: INT3\S12:PRIOSEL-4 Sink : INT1\S13:PHASE-SHIFT2 LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S03:STATUS-1 INT1\S12:PHASE-SHIFT1 PANEL-AFC094\S05:LED-CO INT2\S14:START-PARS INT2\S19:ROCK-STOP INT2\S18:CONTROL-N INT2\S13:NX INT2\S17:NW2 Source: INT2\S18:CONTROL-N Sink : INT2\S18:CONTROL-N INT2\S17:NW2 Source: INT2\S16:NW1 Sink : INT2\S17:NW2 Source: INT2\S16:NW1 Sink : INT2\S17:NW2 Source: INT2\S14:START-PARS Sink : INT2\S17:NW2 Source: INT2\S14:START-PARS Sink : INT2\S17:NW2 Source: ? Sink : INT2\S17:NW2 Source: ? Sink : INT2\S17:NW2

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

OUTPUT CROSSREFERENCE: INTERN_/nw/ INTERN_nw>REF

Source: Sink : Source: Sink :

INT2\S17:NW2 BACKGND\S06:SELECT-IND BACKGND\S05:I-ANALOG-ADP INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S21:PSIW INT2\S18:CONTROL-N INT2\S17:NW2 INT2\S16:NW1

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-11-25

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S017 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S17:NW2 CREATION OF nw>REF ; /nw/


released:

A4 E

94

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

MS 4 0% 0K INTERN_/nw/ INTERN_nx 80% = 9.043 rpm INTERN_Kp-n 0% 0% ParamGrp_CONT-N:integ 0.50049% INTERN_REVERSE INTERN_I-LIM-CONTR-N ParamGrp_+iw-min 4.99878% 2 SWI SELX1 X0 o X1 % 3 SWI o SELX1 o X0 X1 % (nx < 60%-n) (nx > 60%-n) 0.500% = 1.0s UPLIM N KN W -X KP K(%) IC SIC T0/TN PI-R1 YLIM Y <>LIM 0%

5 SWI SELX1 X0 X1 %

INTERN_+iw-RS

LOLIM

KP

: 6 3

T0/TN :

UPLIM/LOLIM : 104% = 1.3 x 80% (Mn)

REM

: START

-> UPLIM = 104% LOLIM = 6% = 104% = 0% = 0% = -104%

INCH-START -> FORW: UPLIM LOLIM REV : UPLIM LOLIM

INPUT CROSSREFERENCE: INTERN_-WR

INTERN_/nw/ INTERN_I-LIM-CONTR-N INTERN_Kp-n INTERN_REVERSE

INTERN_nx

ParamGrp_+iw-min ParamGrp_CONT-N:integ

Source: INT1\S07:SUMMARY-F/W Sink : INT1\S25:TRANSFER/70 INT1\S15:BRDGE-COMMUT INT1\S07:SUMMARY-F/W INT3\S24:NW-REM-AD,PM INT2\S18:CONTROL-N INT2\S17:NW2 INT2\S16:NW1 Source: INT2\S17:NW2 Sink : BACKGND\S06:SELECT-IND BACKGND\S05:I-ANALOG-ADP INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S21:PSIW INT2\S18:CONTROL-N Source: INT2\S14:START-PARS Sink : INT2\S18:CONTROL-N Source: INT2\S14:START-PARS Sink : INT2\S18:CONTROL-N Source: INT3\S12:PRIOSEL-4 Sink : INT1\S13:PHASE-SHIFT2 LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S03:STATUS-1 INT1\S12:PHASE-SHIFT1 PANEL-AFC094\S05:LED-CO INT2\S14:START-PARS INT2\S19:ROCK-STOP INT2\S18:CONTROL-N INT2\S13:NX INT2\S17:NW2 Source: INT2\S13:NX Sink : BACKGND\S06:SELECT-IND BACKGND\S05:I-ANALOG-ADP INT3-MODBUS\S05:ANALOG-OUT-1 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIF INT2\S20:ANTIVOLT INT2\S18:CONTROL-N Source: ? Sink : INT2\S18:CONTROL-N Source: ? Sink : INT2\S18:CONTROL-N

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

OUTPUT CROSSREFERENCE: INTERN_+iw-RS INTERN_WR-DELAYED

Source: Sink : Source: Sink :

INT2\S18:CONTROL-N INT2\S19:ROCK-STOP INT2\S18:CONTROL-N INT2\S18:CONTROL-N INT2\S17:NW2

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-12-06

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S018 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S18:CONTROL-N SPEED CONTROLLER: CREATION OF +iw-RS


released:

A4 E

95

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

0%

1 ADD +1 o +2 %

ParamGrp_RS:TI-BREMS 0.12207% INTERN_REVERSE ParamGrp_RS:+iwmin 7.00073% 2 SWI SELX1 104% X0 o X1 % 3 SWI SELX1 X0 -104% X1 %

4 INT-I + IC o SIC T0/TI

UPLIM

LOLIM + <

X1 %

INTERN_+iw

LIMITATION OF +iw ramp time and +iwmin are adjustable with parameters c1 = 1.3 x 80% = 104 %

INPUT CROSSREFERENCE: INTERN_+iw-RS INTERN_REVERSE

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_STOP ParamGrp_RS:+iwmin ParamGrp_RS:TI-BREMS

INT2\S18:CONTROL-N INT2\S19:ROCK-STOP INT3\S12:PRIOSEL-4 INT1\S13:PHASE-SHIFT2 LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S03:STATUS-1 INT1\S12:PHASE-SHIFT1 PANEL-AFC094\S05:LED-CO INT2\S14:START-PARS INT2\S19:ROCK-STOP INT2\S18:CONTROL-N INT2\S13:NX INT2\S17:NW2 INT3\S16:START/STOP INT1\S11:FAULT-EVENT4 INT3\S22:STATUS-INDIC INT3\S17:MILL-ON,WR INT2\S19:ROCK-STOP INT2\S16:NW1 ? INT2\S19:ROCK-STOP ? INT2\S19:ROCK-STOP

OUTPUT CROSSREFERENCE: INTERN_+iw

Source: INT2\S19:ROCK-STOP Sink : INT2\S15:NX-LIMITS INT1\S26:RECORDING INT2\S33:FROZENCHARGE INT2\S22:COSPHI2

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S019 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S19:ROCK-STOP S19:ROCKING-STOPPING-SEQUENCE


released:

A4 E

96

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

80% = 9.043 rpm % INTERN_sin{e1+D-phi1+2} INTERN_cos{e1+D-phi1+2}

X*Y

Q SIN COS

BETA

1.016% INTERN_/ixR1/*

3 TRAN %

4 MULT X Y X*Y % 6 MULT X Y X*Y % 8 MULT X Y X*Y % +2 % 7 ADD +1 +2 % 9 ADD +1 +2 % INTERN_u-aR*

INTERN_/ixS1/*

INTERN_u-aS*

INTERN_/ixT1/*

INTERN_u-aT*

ra= 0.0127 ohm ra= 1.27% => BLOCK3: 1.27% x 0.8 = 1.016%

INPUT CROSSREFERENCE: INTERN_/ixR1/* INTERN_/ixS1/* INTERN_/ixT1/* INTERN_[psix] INTERN_cos{e1+D-phi1+2} INTERN_nx

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_sin{e1+D-phi1+2}

INT1\S14:PHASE-SHIFT3 INT1\S19:PHASHIF4 INT2\S20:ANTIVOLT INT1\S14:PHASE-SHIFT3 INT1\S19:PHASHIF4 INT2\S20:ANTIVOLT INT1\S14:PHASE-SHIFT3 INT1\S19:PHASHIF4 INT2\S20:ANTIVOLT INT2\S10:INTEG7 BACKGND\S06:SELECT-IND INT1\S26:RECORDING INT2\S23:EXCITAT-1 INT2\S20:ANTIVOLT INT2\S13:NX INT2\S10:INTEG7 INT1\S13:PHASE-SHIFT2 INT2\S22:COSPHI2 INT2\S20:ANTIVOLT INT2\S13:NX BACKGND\S06:SELECT-IND BACKGND\S05:I-ANALOG-ADP INT3-MODBUS\S05:ANALOG-OUT-1 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIF INT2\S20:ANTIVOLT INT2\S18:CONTROL-N Source: INT1\S13:PHASE-SHIFT2 Sink : INT2\S22:COSPHI2 INT2\S20:ANTIVOLT

OUTPUT CROSSREFERENCE: INTERN_u-aR* INTERN_u-aS* INTERN_u-aT*

Source: Sink : Source: Sink : Source: Sink :

INT2\S20:ANTIVOLT INT1\S16:CONTROL-R INT2\S20:ANTIVOLT INT1\S17:CONTROL-S INT2\S20:ANTIVOLT INT1\S18:CONTROL-T

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S020 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S20:ANTIVOLT ANTICIPATORY VOLTAGE PHASE R,S,T


released:

A4 E

97

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

80% ParamGrp_psiw-y2 79.99878% ParamGrp_psiw-y3 78.03955% ParamGrp_psiw-y4 76.19019% ParamGrp_psiw-y5 73.99902% 86.485% 84.00% 82.00%

X2 Y2 X3 Y3 X4 Y4 X5 Y5 Y % INTERN_+psiw

/nw/ : 9.043 /nw/max: 9.776 Ieg(at 9.043 rpm) Ie(at 9.776 rpm)

rpm = rpm = = 530 = 470

80 % 86.4845 % A = 80 % A = 70.943 %

psiw x nx = constant = 64% /nw/ : USUALLY /nx/ SHOULD BE USED, BUT DUE TO THE BETTER (MORE LINEAR) SIGNAL /nw/ IS USED!

INPUT CROSSREFERENCE: INTERN_/nw/ ParamGrp_psiw-y2 ParamGrp_psiw-y3 ParamGrp_psiw-y4 ParamGrp_psiw-y5

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT2\S17:NW2 BACKGND\S06:SELECT-IND BACKGND\S05:I-ANALOG-ADP INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S21:PSIW INT2\S18:CONTROL-N ? INT2\S21:PSIW ? INT2\S21:PSIW ? INT2\S21:PSIW ? INT2\S21:PSIW

OUTPUT CROSSREFERENCE: INTERN_+psiw

Source: INT2\S21:PSIW Sink : BACKGND\S06:SELECT-IND INT1\S24:TRAPEZ INT2\S23:EXCITAT-1

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S021 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S21:PSIW CREATION OF +psiw


released:

A4 E

98

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

ParamGrp_COSPHI2-iw**-phi 0.00000%

2 MULT X Y X*Y %

4 DQRST +2 % D Q SIN COS R S T BETA INTERN_iwR** INTERN_iwS** INTERN_iwT**

INTERN_sin{e1+D-phi1+2} INTERN_cos{e1+D-phi1+2} 5 MULT X Y X*Y % 6 ADD +1 +2 % D Q SIN COS S 7 DQRST R

ParamGrp_COSPHI2-iw*-phi 0.00000% INTERN_sin{e1+DELTphi1} INTERN_cos{e1+DELTphi1}

8 IWR* R TRANW MSB.15 9 IWS* S TRANW MSB.15 10 IWT* T TRANW MSB.15

INTERN_iwR* INTERN_MSB-iwR*

INTERN_iwS* INTERN_MSB-iwS*

T BETA

INTERN_iwT* INTERN_MSB-iwT*

PARAMETER FOR ADJUST PHASESHIFTING BETWEEN CURRENT REFERENCE AND ACTUAL VALUE

INPUT CROSSREFERENCE: INTERN_+idw

Source: Sink : INTERN_+iw Source: Sink : INTERN_cos{e1+D-phi1+2} Source: Sink : INTERN_cos{e1+DELTphi1} Source: Sink : INTERN_sin{e1+D-phi1+2} Source: Sink : INTERN_sin{e1+DELTphi1} Source: Sink : ParamGrp_COSPHI2-iw**-phi Source: Sink : ParamGrp_COSPHI2-iw*-phi Source: Sink : OUTPUT CROSSREFERENCE: INTERN_++iw INTERN_MSB-iwR* INTERN_MSB-iwS* INTERN_MSB-iwT* INTERN_iwR* INTERN_iwR** INTERN_iwS* INTERN_iwS**

INT2\S23:EXCITAT-1 INT2\S22:COSPHI2 INT2\S19:ROCK-STOP INT2\S15:NX-LIMITS INT1\S26:RECORDING INT2\S33:FROZENCHARGE INT2\S22:COSPHI2 INT1\S13:PHASE-SHIFT2 INT2\S22:COSPHI2 INT2\S20:ANTIVOLT INT1\S12:PHASE-SHIFT1 INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT2\S22:COSPHI2 INT1\S13:PHASE-SHIFT2 INT2\S22:COSPHI2 INT2\S20:ANTIVOLT INT1\S12:PHASE-SHIFT1 INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT2\S22:COSPHI2 ? INT2\S22:COSPHI2 ? INT2\S22:COSPHI2

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_iwT* INTERN_iwT**

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT2\S22:COSPHI2 BACKGND\S06:SELECT-IND INT2\S23:EXCITAT-1 INT2\S22:COSPHI2 INT2\S22:COSPHI2 INT1\S15:BRDGE-COMMUT INT2\S22:COSPHI2 INT1\S15:BRDGE-COMMUT INT2\S22:COSPHI2 INT1\S15:BRDGE-COMMUT INT2\S22:COSPHI2 ? INT2\S22:COSPHI2 INT1\S26:RECORDING INT1\S16:CONTROL-R INT2\S22:COSPHI2 ? INT2\S22:COSPHI2 INT1\S17:CONTROL-S INT2\S22:COSPHI2 ? INT2\S22:COSPHI2 INT1\S18:CONTROL-T

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S022 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S22:COSPHI2 CREATION OF iw.** ; MSB-iw.*


released:

A4 E

99

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_SW-Change-over-1 INTERN_ixd ParamGrp_Idw 0.00000%

SELX1 X0 X1 % 4 SWI SELX1 X0 X1 % 3 MULT X Y X*Y % 5 MULT X Y X*Y %

6 ADD +1

INTERN_ixq INTERN_++iw

+2 %

7 SQRT % 125%

INTERN_REL-ZPR INTERN_[psix] 9 ADD +1 o +2 % 0% 10 0B SWI SELX1 0.25% X0 10% X1 % 100% 0% 0% 11 INT-I + IC SIC

8 MULT X Y X*Y % 18 SWI SELX1 X0

INTERN_I

T0/TI UPLIM LOLIM + < 13 SWI SELX1 X0

ParamGrp_ifw-1:kp-faktor 0.187500K INTERN_CREEPING ParamGrp_ifw:kp-faktorNor 0.500000K ParamGrp_ifw:kp-faktorCre 0.500000K

12 SWI SELX1 X0 X1 K X1 K 14 ADMLT K +1 o +2 15 SWI SELX1 X0 X1 %

16 INT-I + 0% IC o SIC

ParamGrp_ifw:I-faktorNor 0.50049% ParamGrp_ifw:I-faktorCre 0.50049%

100% -100%

T0/TI UPLIM LOLIM +

17 ADD +1 +2 % X1 % 22 SWI SELX1 X0 19 ADMLT K +1 20 INT-I + 0% IC o SIC T0/TI 200% UPLIM -200% LOLIM + INTERN_+idw

ParamGrp_ifw-2:kp-faktor 0.500000K ParamGrp_ifw-2:I-faktor 0.04883%

21 ADD +1 +2 % X1 % INTERN_delta-ifw

i phi psiwn

: 100% = 2450A (rms) => 3465A peak : 100% = phi nominal : 80% = 8V

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

Filter for psi x: BLOCK10: 50ms = 10% (ACC.TO Cyclo Improvements) PI Controller(1): BLOCK14: kp = 1; Tn = 1000 ms T0/TI = 0.5% PI Controller(2): BLOCK18: kp = 1; Tn = 10 s T0/TI = 0.05%

INPUT CROSSREFERENCE: INTERN_++iw INTERN_+psiw INTERN_CREEPING

Source: Sink : Source: Sink : Source: Sink :

INTERN_REL-ZPR

INT2\S22:COSPHI2 BACKGND\S06:SELECT-IND INT2\S23:EXCITAT-1 INT2\S22:COSPHI2 INT2\S21:PSIW BACKGND\S06:SELECT-IND INT1\S24:TRAPEZ INT2\S23:EXCITAT-1 INT3\S12:PRIOSEL-4 LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT2\S14:START-PARS INT2\S23:EXCITAT-1 INT2\S17:NW2 Source: INT2\S04:INTEG1 Sink : INT1\S12:PHASE-SHIFT1 INT2\S23:EXCITAT-1 INT2\S13:NX INT2\S09:INTEG6 INT2\S07:INTEG4

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S023 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S23:EXCITAT-1 GENERATION OF phi AND i , delta ifw


released:

A4 E

100

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_[psix]

Source: Sink : INTERN_ixd Source: Sink : INTERN_ixq Source: Sink : ParamGrp_Idw Source: Sink : ParamGrp_ifw-1:kp-faktor Source: Sink : ParamGrp_ifw-2:I-faktor Source: Sink : ParamGrp_ifw-2:kp-faktor Source: Sink : ParamGrp_ifw:I-faktorCre Source: Sink : ParamGrp_ifw:I-faktorNor Source: Sink : ParamGrp_ifw:kp-faktorCre Source: Sink : ParamGrp_ifw:kp-faktorNor Source: Sink : OUTPUT CROSSREFERENCE: INTERN_+idw INTERN_I INTERN_PHI INTERN_delta-ifw

INT2\S10:INTEG7 BACKGND\S06:SELECT-IND INT1\S26:RECORDING INT2\S23:EXCITAT-1 INT2\S20:ANTIVOLT INT2\S13:NX INT2\S10:INTEG7 INT1\S14:PHASE-SHIFT3 INT1\S14:PHASE-SHIFT3 INT2\S23:EXCITAT-1 INT1\S14:PHASE-SHIFT3 INT1\S14:PHASE-SHIFT3 INT2\S23:EXCITAT-1 ? INT2\S23:EXCITAT-1 ? INT2\S23:EXCITAT-1 ? INT2\S23:EXCITAT-1 ? INT2\S23:EXCITAT-1 ? INT2\S23:EXCITAT-1 ? INT2\S23:EXCITAT-1 ? INT2\S23:EXCITAT-1 ? INT2\S23:EXCITAT-1

Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT2\S23:EXCITAT-1 INT2\S22:COSPHI2 INT2\S23:EXCITAT-1 INT2\S24:EXCITAT-2 INT2\S23:EXCITAT-1 INT2\S25:EXCITAT-3 INT2\S24:EXCITAT-2 INT2\S23:EXCITAT-1 INT2\S25:EXCITAT-3

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S023 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S23:EXCITAT-1 GENERATION OF phi AND i , delta ifw


released:

A4 E

101

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

X/Y % 58.1%

X Y

3 ADD X*Y +1 % 24.3%o +2 %

7 DIV X 4 MULT X Y X*Y % 94.1% 5 ADD +1 +2 %

6 SQRT %

Y X/Y % 8 MULT X Y X*Y % 9 MULT X Y X*Y %

58.1%

71.6%

10 ADD +1 o +2 %

11 MULT X Y X*Y % 12 MULT X Y X*Y % <

INTERN_GAW

INTERN_Ed/PHI

FUP-BLOCK2 : Esigma + Eq =

0.142 + 0.439 = 0.581 => 58.1%

FUP-BLOCK3 : cos(phi) = 0.97 (underexcited) => Iq/I = sin(phi) = 0.243 => 24.3% FUP-BLOCK5 : (Iw/I)sqr = cos(phi)sqr = 94.1% FUP-BLOCK8 : Eq = 58.1% FUP-BLOCK9 : Eg = 71.6% => DATAS ACC. TO CALCULATION OF Alstom / Mr.RIEZINGER

INPUT CROSSREFERENCE: INTERN_I INTERN_PHI

Source: Sink : Source: Sink :

INT2\S23:EXCITAT-1 INT2\S24:EXCITAT-2 INT2\S23:EXCITAT-1 INT2\S25:EXCITAT-3 INT2\S24:EXCITAT-2

OUTPUT CROSSREFERENCE: INTERN_Ed/PHI INTERN_GAW

Source: Sink : Source: Sink :

INT2\S24:EXCITAT-2 INT2\S25:EXCITAT-3 INT2\S24:EXCITAT-2 INT2\S25:EXCITAT-3

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S024 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S24:EXCITAT-2 GENERATION OF Ed/PHI AND GAW


released:

A4 E

102

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

X*Y % INTERN_GAW

Y X*Y %

ADD +1 +2 % 13.9% 4 MULT X Y X*Y % 24.92% 5 ADD +1 +2 % 67.2% 1.00% 80.0% 1.66% 90.0% 2.53% 100.0% 4.37% 110.0% 9.18% 120.0% 18.36% 6 1.87% FCTL X X1 Y1 X2 Y2 X3 Y3 X4 Y4 X5 Y5 X6 Y6 Y % 24.92%

7 MULT X Y X*Y % 8 MULT X Y X*Y %

11 ADD +1

+2

INTERN_delta-ifw ParamGrp_scale-delta-ifw 24.92065%

9 MULT X Y X*Y % 10 MULT X Y X*Y %

+3

+4 %

INTERN_iwe

FUP-BLOCK 2 : 110% ; 1.1 x Ed (Ed=100% at 9.042 rpm) FUP-BLOCK 7&9&10 : 24.92% ; Jf = 373.83A = 1pu ; Idt = 1500A (Nominal Exc.Converter DC - Current) Jf/Idt= 373.83A/1500A = 0.2492 => 24.92 % FUP-BLOCK 4 : 13.9% ; K1 = 0.139 pu ACC. TO DATA FROM ABB Generation Mr.RIEZINGER FUP-BLOCK 8 : 1.87% ; K2 x If/Idt x 100% = 0.075pu * 24.92% = 1.87% K2 = 0.075pu ACC. TO DATA FROM Alstom / Mr.RIEZINGER FUP-BLOCK 6 : ACC. TO GRAPH theta p[f(PHIp)

If = Ed + AWstst zus + GAW + phi(p) x f1 + theta p[f(phi p)

INPUT CROSSREFERENCE: INTERN_Ed/PHI INTERN_GAW INTERN_PHI INTERN_delta-ifw ParamGrp_scale-delta-ifw

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT2\S24:EXCITAT-2 INT2\S25:EXCITAT-3 INT2\S24:EXCITAT-2 INT2\S25:EXCITAT-3 INT2\S23:EXCITAT-1 INT2\S25:EXCITAT-3 INT2\S24:EXCITAT-2 INT2\S23:EXCITAT-1 INT2\S25:EXCITAT-3 ? INT2\S25:EXCITAT-3

OUTPUT CROSSREFERENCE: INTERN_iwe

Source: INT2\S25:EXCITAT-3 Sink : INT2\S26:EXCITAT-4

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S025 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S25:EXCITAT-3 EXCITATION REF.CURRENT CALCULATION-iwe

A4 E

103

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_[nx] 80% = 9.043 rpm ParamGrp_iwe-start-Y1 120.00122% ParamGrp_iwe-start-X2 28.00293% ParamGrp_iwe-start-Y2 120.00122% ParamGrp_iwe-start-X3 40.00244% ParamGrp_iwe-start-Y3 100.00000% ParamGrp_iwe-start-X4 50.00000% ParamGrp_iwe-start-Y4 100.00000%

0%

X X1 Y1 X2 Y2 X3 Y3 X4

120% 100%

Y4 X5 Y5 Y % % Y X*Y 0% X

3 LIM XLIM >UL UPLIM <LL LOLIM % UAC326-1_/iwe

ParamGrp_iwe-max-lim 84.99756%

INCREASE OF iwe FOR STARTUP: iwe [%] 120 100 | | +----+\ | \+---------------+----+ | | ng = 9.043rpm | | nmax = 9.776rpm +----+------+---------------+---+------> nx[rpm] 0 x x ng Nmax [x] [x] [80] [86.484%] [%]

WILL BE ASJUSTED DURING COMMISSIONING!

Testprogram 1:

Precondition: -

Test excitation converter / load test rotor simulate an excitation current setpoint by pressing "slower" or "faster" at the panel board AFC094 Testprogram 1 selected auxiliaries on HV-circuit breaker on Mill drive on (release excit.converter)

INPUT CROSSREFERENCE: INTERN_[nx]

INTERN_iwe ParamGrp_iwe-max-lim ParamGrp_iwe-start-X2 ParamGrp_iwe-start-X3 ParamGrp_iwe-start-X4 ParamGrp_iwe-start-Y1 ParamGrp_iwe-start-Y2

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

ParamGrp_iwe-start-Y3 ParamGrp_iwe-start-Y4

Source: INT2\S13:NX Sink : INT1\S11:FAULT-EVENT4 INT3\S22:STATUS-INDIC INT3\S12:PRIOSEL-4 INT2\S15:NX-LIMITS INT2\S26:EXCITAT-4 INT2\S13:NX INT2\ INT2\S04:INTEG1 Source: INT2\S25:EXCITAT-3 Sink : INT2\S26:EXCITAT-4 Source: ? Sink : INT2\S26:EXCITAT-4 Source: ? Sink : INT2\S26:EXCITAT-4 Source: ? Sink : INT2\S26:EXCITAT-4 Source: ? Sink : INT2\S26:EXCITAT-4 Source: ? Sink : INT2\S26:EXCITAT-4 Source: ? Sink : INT2\S26:EXCITAT-4 Source: ? Sink : INT2\S26:EXCITAT-4 Source: ? Sink : INT2\S26:EXCITAT-4

OUTPUT CROSSREFERENCE: UAC326-1_/iwe

Source: INT2\S26:EXCITAT-4 Sink : ?

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S026 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S26:EXCITAT-4 iwe-adaption


released:

A4 E

104

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

ParamGrp_eff-hex 0030H ParamGrp_ixX-eff-scaling 176.77002% INTERN_/[ixS1]/

N CNT CNT=N I02

Y 5 PEEK I01 I02 8 PEEK I01 I02 11 ABS % 12 PEEK3 I01 O01 I02 13 MULT X Y 6 DIV O01 141.421% X Y X/Y % 9 DIV O01 141.421% X Y X/Y % 14 u-eff-AV I01 O01 15 MULT X Y X*Y % 173.2% X*Y % 7 MULT X Y X*Y % 10 MULT X Y X*Y % INTERN_ixR-eff

INTERN_ixS-eff

INTERN_/[ixT1]/

INTERN_/uxMR/ ParamGrp_UX-eff 70.70923%

INTERN_ixT-eff INTERN_uxM-eff

X*Y %

16 MULT X Y X*Y %

17 MULT X Y X*Y % INTERN_Pm

ParamGrp_Pm-adapt 93.00537%

Motor Power calculation: Pm = Imeff x Umeff x 1.732 x cos phi x eta Correctiopn Factor: cos(phi) * eta = 0.97 * 0.97 = 0.94 => 94 % Imeff = m/1.414 Umeff = m/1.414 cos phi = 0.97 eta = 0.97

Pm 52.149% = 21000 kW Need to be scaled during loaded mill!

INPUT CROSSREFERENCE: INTERN_/[ixR1]/ INTERN_/[ixS1]/ INTERN_/[ixT1]/ INTERN_/uxMR/ ParamGrp_Pm-adapt ParamGrp_UX-eff ParamGrp_eff-hex ParamGrp_ixX-eff-scaling

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT0\S03:FILTER1 INT1\S26:RECORDING INT0\S03:FILTER1 INT1\S26:RECORDING INT0\S03:FILTER1 INT1\S26:RECORDING INT0\S05:FILTER3 INT2\S27:MOT-POWER ? INT2\S27:MOT-POWER ? INT2\S27:MOT-POWER ? INT2\S27:MOT-POWER ? INT2\S27:MOT-POWER

INT2\S27:MOT-POWER INT0\S08:IX-COMMUTAT INT2\S27:MOT-POWER INT0\S08:IX-COMMUTAT INT2\S27:MOT-POWER INT0\S08:IX-COMMUTAT INT2\S05:INTEG2

OUTPUT CROSSREFERENCE: INTERN_Pm

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_ixR-eff INTERN_ixS-eff INTERN_ixT-eff INTERN_uxM-eff

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT2\S27:MOT-POWER INT1\S26:RECORDING INT3\S24:NW-REM-AD,PM INT2\S27:MOT-POWER LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 PANEL-AFC094\S02:PANL-DISPLAY INT2\S27:MOT-POWER LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 PANEL-AFC094\S02:PANL-DISPLAY INT2\S27:MOT-POWER LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 PANEL-AFC094\S02:PANL-DISPLAY INT2\S27:MOT-POWER BACKGND\S05:I-ANALOG-ADP

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S027 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S27:MOT-POWER Motor Power Calculation


released:

A4 E

105

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

27.998% 0.1% INTERN_-WRc-CONTROL

THRLL X LOLIM HYS <=LIM % B

3 & INTERN_W/AGP1 4 THRLL X LOLIM HYS <=LIM %

UAC326-2_s>AGP2 0.00000%

5 ADD +1 +2 % 27.998% 0.1% 6 THRLL X LOLIM HYS <=LIM %

24.0% 0.1%

INTERN_F/AGP1 INTERN_s>AGP2-offse

7 & INTERN_W/AGP2 B 8 THRLL X LOLIM HYS <=LIM %

UAC326-2_s>AGP3 0.00000%

9 ADD +1 +2 % 27.998% 0.1% 10 THRLL X LOLIM HYS <=LIM %

24.0% 0.1%

INTERN_F/AGP2 INTERN_s>AGP3-offse

11 & INTERN_W/AGP3 B 13 THRLL X LOLIM HYS <=LIM %

UAC326-2_s>AGP4 0.00000%

12 ADD +1 +2 % 27.998% 0.1% 14 THRLL X LOLIM HYS <=LIM %

24.0% 0.1%

INTERN_F/AGP3 INTERN_s>AGP4-offse

15 & INTERN_W/AGP4 B 16 THRLL X LOLIM HYS <=LIM % 19 &

UAC326-2_s>AGP5 0.00000%

17 ADD +1 +2 % 27.998% 0.1% 18 THRLL X LOLIM HYS <=LIM %

24.0% 0.1%

INTERN_F/AGP4 INTERN_s>AGP5-offse

INTERN_W/AGP5 B 20 THRLL X LOLIM HYS <=LIM %

24.0% 0.1%

INTERN_F/AGP5

Normal Airgap : 16.0 mm = 43.999% Airgap Warning : 12.0 mm = 27.998% Airgap Trip : 11.0 mm = 23.998%

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

4..20 mA

0 - 10 Vdc

5 - 30 mm (Signal Converter)

WARNING AND TRIP VALUES NEED TO BE CONFIRMED DURING COMMISSIONING

INPUT CROSSREFERENCE: INTERN_-WRc-CONTROL

UAC326-2_s>AGP1 UAC326-2_s>AGP2 UAC326-2_s>AGP3 UAC326-2_s>AGP4 UAC326-2_s>AGP5

Source: INT3\S17:MILL-ON,WR Sink : INT1\S11:FAULT-EVENT4 INT2\S33:FROZENCHARGE Source: ? Sink : INT3\S25:STANDSTILL-L Source: ? Sink : INT3\S25:STANDSTILL-L Source: ? Sink : INT3\S25:STANDSTILL-L Source: ? Sink : INT2\S28:AIR-GAP-SUP1 Source: ? Sink : INT2\S28:AIR-GAP-SUP1

INT1\S07:SUMMARY-F/W INT1\S04:DETECT-I> INT3\S19:INCH-ANGLE INT3\S18:BRAKE-HORN INT2\S15:NX-LIMI INT2\S32:ANGLECAPTUR INT2\S29:AIR-GAP-SUP2 INT2\S28:AIR-GAP-SUP1 INT2\S32:ANGLECAPTUR INT2\S28:AIR-GAP-SUP1 INT2\S32:ANGLECAPTUR INT2\S28:AIR-GAP-SUP1 INT2\S32:ANGLECAPTUR INT2\S28:AIR-GAP-SUP1

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-03-07

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S028 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S28:AIR-GAP-SUP1 Air gap detection Capacitive


released:

A4 E

106

3BHS135699

INTERN_F/AGP2 INTERN_F/AGP3 INTERN_F/AGP4 INTERN_F/AGP5 INTERN_W/AGP1 INTERN_W/AGP2 INTERN_W/AGP3 INTERN_W/AGP4 INTERN_W/AGP5 INTERN_s>AGP1-offset INTERN_s>AGP2-offset INTERN_s>AGP3-offset INTERN_s>AGP4-offset INTERN_s>AGP5-offset

Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT2\S31:AIR-GAP-MON2 INT2\S28:AIR-GAP-SUP1 INT2\S31:AIR-GAP-MON2 INT2\S28:AIR-GAP-SUP1 INT2\S31:AIR-GAP-MON2 INT2\S28:AIR-GAP-SUP1 INT2\S31:AIR-GAP-MON2 INT2\S28:AIR-GAP-SUP1 INT2\S31:AIR-GAP-MON2 INT2\S28:AIR-GAP-SUP1 INT3\S06:WARN-EVENT7 INT2\S28:AIR-GAP-SUP1 INT3\S06:WARN-EVENT7 INT2\S28:AIR-GAP-SUP1 INT3\S06:WARN-EVENT7 INT2\S28:AIR-GAP-SUP1 INT3\S06:WARN-EVENT7 INT2\S28:AIR-GAP-SUP1 INT3\S06:WARN-EVENT7 INT2\S28:AIR-GAP-SUP1 INT2\S30:AIR-GAP-MON1 INT2\S28:AIR-GAP-SUP1 INT2\S30:AIR-GAP-MON1 INT2\S28:AIR-GAP-SUP1 INT2\S30:AIR-GAP-MON1 INT2\S28:AIR-GAP-SUP1 INT2\S30:AIR-GAP-MON1 INT2\S28:AIR-GAP-SUP1 INT2\S30:AIR-GAP-MON1

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INT2\S03:FAULT-EVENT5 INT2\S03:FAULT-EVENT5 INT2\S03:FAULT-EVENT5 INT2\S03:FAULT-EVENT5 INT2\S03:FAULT-EVENT5

INT2\S28:AIR-GAP-SUP1 INT2\S28:AIR-GAP-SUP1 INT2\S28:AIR-GAP-SUP1 INT2\S28:AIR-GAP-SUP1 INT2\S28:AIR-GAP-SUP1

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-03-07

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S028 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S28:AIR-GAP-SUP1 Air gap detection Capacitive


released:

A4 E

107

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

0.00000%

% 27.998% 0.1%

2 THRLL X LOLIM HYS <=LIM % B

3 & INTERN_W/AGP6 4 THRLL X LOLIM HYS <=LIM %

INTERN_-WRc-CONTROL

UAC326-2_s>AGP7 ParamGrp_Offset-AGP7 100.00000%

5 ADD +1 +2 % 27.998% 0.1% 6 THRLL X LOLIM HYS <=LIM %

24.0% 0.1%

INTERN_F/AGP6 INTERN_s>AGP7-offse

7 & INTERN_W/AGP7 B 8 THRLL X LOLIM HYS <=LIM %

UAC326-2_s>AGP8 0.00000%

9 ADD +1 +2 % 27.998% 0.1% 10 THRLL X LOLIM HYS <=LIM %

24.0% 0.1%

INTERN_F/AGP7 INTERN_s>AGP8-offse

11 & INTERN_W/AGP8 B 12 THRLL X LOLIM HYS <=LIM %

UAC326-2_s>AGP9 0.00000%

13 ADD +1 +2 % 27.998% 0.1% 14 THRLL X LOLIM HYS <=LIM %

24.0% 0.1%

INTERN_F/AGP8 INTERN_s>AGP9-offse

15 & INTERN_W/AGP9 B 16 THRLL X LOLIM HYS <=LIM %

UAC326-1_s>AGP10 0.00000%

17 ADD +1 +2 % 27.998% 0.1% 18 THRLL X LOLIM HYS <=LIM %

24.0% 0.1%

INTERN_F/AGP9 INTERN_s>AGP10-offs

19 & INTERN_W/AGP10 B 20 THRLL X LOLIM HYS <=LIM %

UAC326-1_s>AGP11 0.00000%

21 ADD +1 +2 % 22 THRLL X LOLIM HYS <=LIM %

24.0% 0.1%

INTERN_F/AGP10 INTERN_s>AGP11-offs

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

27.998% 0.1%

23 & INTERN_W/AGP11 B 24 THRLL X LOLIM HYS <=LIM %

24.0% 0.1%

INTERN_F/AGP11

INPUT CROSSREFERENCE: INTERN_-WRc-CONTROL

ParamGrp_Offset-AGP6 ParamGrp_Offset-AGP7 UAC326-1_s>AGP10

Source: INT3\S17:MILL-ON,WR Sink : INT1\S11:FAULT-EVENT4 INT1\S07:SUMMARY-F/W INT1\S04:DETECT-I> INT3\S19:INCH-ANGLE INT3\S18:BRAKE-HORN INT2\S15:NX-LIMI INT2\S33:FROZENCHARGE INT2\S32:ANGLECAPTUR INT2\S29:AIR-GAP-SUP2 INT2\S28:AIR-GAP-SUP1 Source: ? Sink : INT2\S29:AIR-GAP-SUP2 Source: ? Sink : INT2\S29:AIR-GAP-SUP2 Source: ? Sink : INT2\S29:AIR-GAP-SUP2

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-06-02

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S029 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S29:AIR-GAP-SUP2 Air gap detection Capacitive


released:

A4 E

108

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

UAC326-2_s>AGP7 UAC326-2_s>AGP8 UAC326-2_s>AGP9

Sink : Source: Sink : Source: Sink : Source: Sink :

INT2\S29:AIR-GAP-SUP2 ? INT2\S29:AIR-GAP-SUP2 ? INT2\S29:AIR-GAP-SUP2 ? INT2\S29:AIR-GAP-SUP2

OUTPUT CROSSREFERENCE: INTERN_F/AGP10 INTERN_F/AGP11 INTERN_F/AGP6 INTERN_F/AGP7 INTERN_F/AGP8 INTERN_F/AGP9 INTERN_W/AGP10 INTERN_W/AGP11 INTERN_W/AGP6 INTERN_W/AGP7 INTERN_W/AGP8 INTERN_W/AGP9 INTERN_s>AGP10-offset INTERN_s>AGP11-offset INTERN_s>AGP6-offset INTERN_s>AGP7-offset INTERN_s>AGP8-offset INTERN_s>AGP9-offset

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT2\S29:AIR-GAP-SUP2 INT2\S31:AIR-GAP-MON2 INT2\S29:AIR-GAP-SUP2 INT2\S31:AIR-GAP-MON2 INT2\S29:AIR-GAP-SUP2 INT2\S31:AIR-GAP-MON2 INT2\S29:AIR-GAP-SUP2 INT2\S31:AIR-GAP-MON2 INT2\S29:AIR-GAP-SUP2 INT2\S31:AIR-GAP-MON2 INT2\S29:AIR-GAP-SUP2 INT2\S31:AIR-GAP-MON2 INT2\S29:AIR-GAP-SUP2 INT3\S06:WARN-EVENT7 INT2\S29:AIR-GAP-SUP2 INT3\S06:WARN-EVENT7 INT2\S29:AIR-GAP-SUP2 INT3\S06:WARN-EVENT7 INT2\S29:AIR-GAP-SUP2 INT3\S06:WARN-EVENT7 INT2\S29:AIR-GAP-SUP2 INT3\S06:WARN-EVENT7 INT2\S29:AIR-GAP-SUP2 INT3\S06:WARN-EVENT7 INT2\S29:AIR-GAP-SUP2 INT2\S30:AIR-GAP-MON1 INT2\S29:AIR-GAP-SUP2 INT2\S30:AIR-GAP-MON1 INT2\S29:AIR-GAP-SUP2 INT2\S30:AIR-GAP-MON1 INT2\S29:AIR-GAP-SUP2 INT2\S30:AIR-GAP-MON1 INT2\S29:AIR-GAP-SUP2 INT2\S30:AIR-GAP-MON1 INT2\S29:AIR-GAP-SUP2 INT2\S30:AIR-GAP-MON1

INT3\S05:FAULT-EVENT6 INT3\S05:FAULT-EVENT6 INT2\S03:FAULT-EVENT5 INT2\S03:FAULT-EVENT5 INT2\S03:FAULT-EVENT5 INT2\S03:FAULT-EVENT5

INT2\S29:AIR-GAP-SUP2 INT2\S29:AIR-GAP-SUP2 INT2\S29:AIR-GAP-SUP2 INT2\S29:AIR-GAP-SUP2 INT2\S29:AIR-GAP-SUP2 INT2\S29:AIR-GAP-SUP2

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-06-02

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S029 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S29:AIR-GAP-SUP2 Air gap detection Capacitive


released:

A4 E

109

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to t is prohibited; it is civilly and criminally actionable.

83.33130% % ParamGrp_Airgap-Scaling2 16.66870% ParamGrp_AGC-INT-TIME 10MS ParamGrp_AGC-INT-UPLIM 100.00000% ParamGrp_AGC-INT-LOWLIM 0.00000% ParamGrp_AGC-MIN-HYST 0.09766% ParamGrp_AGC-MS-TIME 20MS ParamGrp_AGC-OND-TIME 15MS ParamGrp_AGC-MS-S&H-TIME 10MS ParamGrp_AGC-DELAY-STATIC 3000MS INTERN_s>AGP2-offset

X*Y

+1 +2 %

3 MINPEEK2 I01 O01 I02 I03 I04 I05 I06 I07 I08 I09

INTERN_s>AGP1

4 MULT X Y X*Y %

5 ADD +1 +2 %

INTERN_s>AGP3-offset

7 MULT X Y X*Y %

6 MINPEEK2 I01 O01 I02 I03 I04 I05 I06 I07 I08 I09 9 MINPEEK2 I01 O01 I02 I03 I04 I05 I06 I07 I08 I09 12 MINPEEK2 I01 O01 I02 I03 I04 I05 I06 I07 I08 I09 15 MINPEEK2 I01 O01 I02 I03 I04 I05 I06 I07 I08 I09 18 MINPEEK2 I01 O01 I02 I03 I04 I05 I06 I07 I08 I09 21 MINPEEK2 I01 O01 I02 I03 I04 I05 I06 I07 I08 I09 24 MINPEEK2 I01 O01 I02 I03 I04 I05 I06 I07 I08 I09 27 MINPEEK2 I01 O01 I02 I03

INTERN_s>AGP2

8 ADD +1 +2 %

INTERN_s>AGP3

INTERN_s>AGP4-offset

10 MULT X Y X*Y %

11 ADD +1 +2 %

INTERN_s>AGP4

INTERN_s>AGP5-offset

13 MULT X Y X*Y %

14 ADD +1 +2 %

INTERN_s>AGP5

INTERN_s>AGP6-offset

16 MULT X Y X*Y %

17 ADD +1 +2 %

INTERN_s>AGP6

INTERN_s>AGP7-offset

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

19 MULT X Y X*Y %

20 ADD +1 +2 %

INTERN_s>AGP7

INTERN_s>AGP8-offset

22 MULT X Y X*Y %

23 ADD +1 +2 %

INTERN_s>AGP8

INTERN_s>AGP9-offset

25 MULT X Y X*Y %

26 ADD +1 +2 %

INTERN_s>AGP9

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-02-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S030 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S30:AIR-GAP-MON1 Air gap monitoring


released:

A4 E

110

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_s>AGP10-offset

MULT X Y X*Y %

I09 29 ADD +1 +2 % 30 MINPEEK2 I01 O01 I02 I03 I04 I05 I06 I07 I08 I09 33 MINPEEK2 I01 O01 I02 I03 I04 I05 I06 I07 I08 I09

INTERN_s>AGP10

INTERN_s>AGP11-offset

31 MULT X Y X*Y %

32 ADD +1 +2 %

INTERN_s>AGP11

Creeping speed: nc = 0.3 rpm Pole number: p = 76 ParamGrp_AGC-DELAY-STATIC: t > 60/(nc x p) = 2632ms ==> 3000s

INPUT CROSSREFERENCE: INTERN_s>AGP1-offset

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

Source: Sink : INTERN_s>AGP10-offset Source: Sink : INTERN_s>AGP11-offset Source: Sink : INTERN_s>AGP2-offset Source: Sink : INTERN_s>AGP3-offset Source: Sink : INTERN_s>AGP4-offset Source: Sink : INTERN_s>AGP5-offset Source: Sink : INTERN_s>AGP6-offset Source: Sink : INTERN_s>AGP7-offset Source: Sink : INTERN_s>AGP8-offset Source: Sink : INTERN_s>AGP9-offset Source: Sink : ParamGrp_AGC-DELAY-STATIC Source: Sink : ParamGrp_AGC-INT-LOWLIM Source: Sink : ParamGrp_AGC-INT-TIME Source: Sink : ParamGrp_AGC-INT-UPLIM Source: Sink : ParamGrp_AGC-MIN-HYST Source: Sink : ParamGrp_AGC-MS-S&H-TIME Source: Sink : ParamGrp_AGC-MS-TIME Source: Sink : ParamGrp_AGC-OND-TIME Source: Sink : ParamGrp_Airgap-Scaling1 Source: Sink : ParamGrp_Airgap-Scaling2 Source: Sink : OUTPUT CROSSREFERENCE: INTERN_s>AGP1 INTERN_s>AGP10 INTERN_s>AGP11 INTERN_s>AGP2 INTERN_s>AGP3 INTERN_s>AGP4

INT2\S28:AIR-GAP-SUP1 INT2\S30:AIR-GAP-MON1 INT2\S29:AIR-GAP-SUP2 INT2\S30:AIR-GAP-MON1 INT2\S29:AIR-GAP-SUP2 INT2\S30:AIR-GAP-MON1 INT2\S28:AIR-GAP-SUP1 INT2\S30:AIR-GAP-MON1 INT2\S28:AIR-GAP-SUP1 INT2\S30:AIR-GAP-MON1 INT2\S28:AIR-GAP-SUP1 INT2\S30:AIR-GAP-MON1 INT2\S28:AIR-GAP-SUP1 INT2\S30:AIR-GAP-MON1 INT2\S29:AIR-GAP-SUP2 INT2\S30:AIR-GAP-MON1 INT2\S29:AIR-GAP-SUP2 INT2\S30:AIR-GAP-MON1 INT2\S29:AIR-GAP-SUP2 INT2\S30:AIR-GAP-MON1 INT2\S29:AIR-GAP-SUP2 INT2\S30:AIR-GAP-MON1 ? INT2\S30:AIR-GAP-MON1 ? INT2\S30:AIR-GAP-MON1 ? INT2\S30:AIR-GAP-MON1 ? INT2\S30:AIR-GAP-MON1 ? INT2\S30:AIR-GAP-MON1 ? INT2\S30:AIR-GAP-MON1 ? INT2\S30:AIR-GAP-MON1 ? INT2\S30:AIR-GAP-MON1 ? INT2\S30:AIR-GAP-MON1 ? INT2\S30:AIR-GAP-MON1

INT2\S28:AIR-GAP-SUP1 INT2\S29:AIR-GAP-SUP2 INT2\S29:AIR-GAP-SUP2 INT2\S28:AIR-GAP-SUP1 INT2\S28:AIR-GAP-SUP1 INT2\S28:AIR-GAP-SUP1 INT2\S28:AIR-GAP-SUP1 INT2\S29:AIR-GAP-SUP2 INT2\S29:AIR-GAP-SUP2 INT2\S29:AIR-GAP-SUP2 INT2\S29:AIR-GAP-SUP2

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source:

INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 PANEL-AFC094\S02:PANL-DISPLAY INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-02-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S030 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S30:AIR-GAP-MON1 Air gap monitoring


released:

A4 E

111

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_s>AGP6 INTERN_s>AGP7 INTERN_s>AGP8 INTERN_s>AGP9

Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY

LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-02-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S030 F01/K01


doc. type format language sht. nr.

3
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S30:AIR-GAP-MON1 Air gap monitoring


released:

A4 E

112

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_F/AGP3 INTERN_F/AGP4 INTERN_F/AGP5 INTERN_F/AGP6 INTERN_F/AGP7 INTERN_F/AGP8 INTERN_F/AGP9 INTERN_F/AGP10 INTERN_F/AGP11 B INTERN_RESET R Q INTERN_F/AIR-GAPS 2 RSFF S

INPUT CROSSREFERENCE: INTERN_F/AGP1 INTERN_F/AGP10 INTERN_F/AGP11 INTERN_F/AGP2 INTERN_F/AGP3 INTERN_F/AGP4 INTERN_F/AGP5 INTERN_F/AGP6 INTERN_F/AGP7 INTERN_F/AGP8 INTERN_F/AGP9 INTERN_RESET

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT2\S28:AIR-GAP-SUP1 INT2\S31:AIR-GAP-MON2 INT2\S29:AIR-GAP-SUP2 INT2\S31:AIR-GAP-MON2 INT2\S29:AIR-GAP-SUP2 INT2\S31:AIR-GAP-MON2 INT2\S28:AIR-GAP-SUP1 INT2\S31:AIR-GAP-MON2 INT2\S28:AIR-GAP-SUP1 INT2\S31:AIR-GAP-MON2 INT2\S28:AIR-GAP-SUP1 INT2\S31:AIR-GAP-MON2 INT2\S28:AIR-GAP-SUP1 INT2\S31:AIR-GAP-MON2 INT2\S29:AIR-GAP-SUP2 INT2\S31:AIR-GAP-MON2 INT2\S29:AIR-GAP-SUP2 INT2\S31:AIR-GAP-MON2 INT2\S29:AIR-GAP-SUP2 INT2\S31:AIR-GAP-MON2 INT2\S29:AIR-GAP-SUP2 INT2\S31:AIR-GAP-MON2 INT3\S21:RESET/LT INT1\S10:FAULT-EVENT3 INT1\S02:TRANSF>20/40 INT2\S33:FROZENCHARGE

INT2\S03:FAULT-EVENT5 INT3\S05:FAULT-EVENT6 INT3\S05:FAULT-EVENT6 INT2\S03:FAULT-EVENT5 INT2\S03:FAULT-EVENT5 INT2\S03:FAULT-EVENT5 INT2\S03:FAULT-EVENT5 INT2\S03:FAULT-EVENT5 INT2\S03:FAULT-EVENT5 INT2\S03:FAULT-EVENT5 INT2\S03:FAULT-EVENT5

INT1\S25:TRANSFER/70 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:W INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5

OUTPUT CROSSREFERENCE: INTERN_F/AIR-GAPS

Source: INT2\S31:AIR-GAP-MON2 Sink : INT3\S18:BRAKE-HORN

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-02-17

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S031 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S31:AIR-GAP-MON2 Air gap monitoring


released:

A4 E

113

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

84.99756% ParamGrp_Pulse-Signal 50MS

% T 3 MIN /T\ MS 4 MS / T /T\ MS 6 MS / T /T\ MS 8 & o B B 0H 0B 0B 7 >=1

UAC326-2_s>AGP2

X1 X2 % 5 MIN

<<1 <<2 MIN

UAC326-2_s>AGP3

X1 X2 %

<<1 <<2 MIN

INTERN_Airgap-Pulse B 9 >=1 10 PBCNT CLK/ CNT CARRY SIC IC HOLD DOWN 12 TRAN I 11 TRAN I 13 COMPW X X=Y X>Y 14 MS /

INTERN_-WRc-CONTROL INTERN_INCHING

INTERN_ActPassPolCou

ParamGrp_N-pole-per-revol 229I ParamGrp_NB-POLE-REACHED 100MS

Y < T /T\ MS INTERN_76-poles-rea

INPUT CROSSREFERENCE: INTERN_-WRc-CONTROL

Source: INT3\S17:MILL-ON,WR Sink : INT1\S11:FAULT-EVENT4 INT1\S07:SUMMARY-F/W INT1\S04:DETECT-I> INT3\S19:INCH-ANGLE INT3\S18:BRAKE-HORN INT2\S15:NX-LIMI INT2\S33:FROZENCHARGE INT2\S32:ANGLECAPTUR INT2\S29:AIR-GAP-SUP2 INT2\S28:AIR-GAP-SUP1 INTERN_INCHING Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S19:INCH-ANGLE INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT2\S14:START-PARS INT2\S32:ANGLECAPTUR ParamGrp_AIRGAP-MIN4 Source: ? Sink : INT2\S32:ANGLECAPTUR ParamGrp_N-pole-per-revol Source: ? Sink : INT2\S32:ANGLECAPTUR ParamGrp_NB-POLE-REACHED Source: ? Sink : INT2\S32:ANGLECAPTUR ParamGrp_Pulse-Signal Source: ? Sink : INT2\S32:ANGLECAPTUR UAC326-2_s>AGP1 Source: ? Sink : INT3\S25:STANDSTILL-L INT2\S32:ANGLECAPTUR INT2\S28:AIR-GAP-SUP1 UAC326-2_s>AGP2 Source: ? Sink : INT3\S25:STANDSTILL-L INT2\S32:ANGLECAPTUR INT2\S28:AIR-GAP-SUP1 UAC326-2_s>AGP3 Source: ? Sink : INT3\S25:STANDSTILL-L INT2\S32:ANGLECAPTUR INT2\S28:AIR-GAP-SUP1 OUTPUT CROSSREFERENCE: INTERN_76-poles-reached INTERN_ActPassPolCount INTERN_Airgap-Pulse-Sig

Source: Sink : Source: Sink : Source: Sink :

INT2\S32:ANGLECAPTUR INT3\S19:INCH-ANGLE INT2\S32:ANGLECAPTUR INT3\S19:INCH-ANGLE INT2\S32:ANGLECAPTUR INT2\S32:ANGLECAPTUR INT2\S33:FROZENCHARGE INT2\S32:ANGLECAPTUR

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S032 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S32:ANGLECAPTUR Angle Calculation


released:

A4 E

114

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

ParamGrp_Pole-No-Reset1 90I 3 TRAN I 5 ABS % 104.0% 0.5% 4 CNT CLK/ o R N# >=N 6 THRUL X UPLIM HYS >=LIM % 11 9 TOGFF CLK/ R Q <

1 TRAN I

N# >=N

48I

7 &

INTERN_+iw

8 OND / B T COMPW X X=Y T/ S 12 OFD \ T T\ MS o B

ParamGrp_Iw-Time-Delay 2S 10 S&H SAMPL X1 Y1 % X>Y 80ms Y

INTERN_X>Y 13 & 14 RSFF S R Q INTERN_DCP-Frozen-F

INTERN_RESET 15 TRAN % < Rotor Pole : 76 Poles. 1 Pole : 4.736 degrees. 3 pulse signal per a rotor pole. 1 signal pulse : 1.578 degrees. 75 degrees : 75/1.578 = 47.5 pulses signal. Block 3 : Angle of protection Block 6 : Torque of protection

INPUT CROSSREFERENCE: INTERN_+iw INTERN_-WRc-CONTROL

Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_Airgap-Pulse-Sig INTERN_RESET

ParamGrp_Iw-Time-Delay ParamGrp_Pole-No-Reset1

Source: Sink : Source: Sink :

INT2\S19:ROCK-STOP INT2\S15:NX-LIMITS INT1\S26:RECORDING INT2\S33:FROZENCHARGE INT2\S22:COSPHI2 INT3\S17:MILL-ON,WR INT1\S11:FAULT-EVENT4 INT1\S07:SUMMARY-F/W INT1\S04:DETECT-I> INT3\S19:INCH-ANGLE INT3\S18:BRAKE-HORN INT2\S15:NX-LIMI INT2\S33:FROZENCHARGE INT2\S32:ANGLECAPTUR INT2\S29:AIR-GAP-SUP2 INT2\S28:AIR-GAP-SUP1 INT2\S32:ANGLECAPTUR INT2\S33:FROZENCHARGE INT2\S32:ANGLECAPTUR INT3\S21:RESET/LT INT1\S10:FAULT-EVENT3 INT1\S25:TRANSFER/70 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:W INT2\S33:FROZENCHARGE INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 ? INT2\S33:FROZENCHARGE ? INT2\S33:FROZENCHARGE

OUTPUT CROSSREFERENCE: INTERN_DCP-Frozen-Fail INTERN_X>Y

Source: Sink : Source: Sink :

INT2\S33:FROZENCHARGE INT2\S03:FAULT-EVENT5 INT2\S33:FROZENCHARGE INT2\S33:FROZENCHARGE

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S033 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S33:FROZENCHARGE Frozen Charge Protection


released:

A4 E

115

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

UDA327:2_C>CC-SI:nx UDA327:2_C>CC-SI:psi-w UDA327:2_C>CC-SI:psi-x UDA327:2_C>CC-SI:dPSIT 0B 0B 0B 0B 0B 0B 0B 0B 0B

.2 .3 .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15 Y 5 BIBS .0 UDA327-2_/30

ParamGrp_Test-Out-Relay 0B INTERN_SW-Change-over-1 ParamGrp_ChangeStateRelay 0B UDA327:3_C/MVD1-ON 2s

1 SWI SELX1 X0 X1 B 3 MS / T /T\ S 4 MS / T /T\ S

UDA327:3_C/MVD1-OFF 2s UDA327:3_C/MVD2-ON UDA327:3_C/MVD2-OFF

.1 .2 0B 0B 0B 0B 0B 0B 0B 0B 0B 0B 0B 0B .3 .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15 Y UDA327-3_/50

INPUT CROSSREFERENCE: INTERN_SW-Change-over-1

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

Source: INT3\S12:PRIOSEL-4 Sink : INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 INT2\S34:TRANSFER/30 INT2\S23:EXCITAT-1 INT2\S13:NX INT2\S09:INTEG6 INT2\S08:INTEG5 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S05:INTEG2 INT2\S04:INTEG1 ParamGrp_ChangeStateRelay Source: ? Sink : INT2\S34:TRANSFER/30 ParamGrp_Test-Out-Relay Source: ? Sink : INT2\S34:TRANSFER/30 UDA327:2_C>CC-SI:dPSIT Source: BACKGND\S06:SELECT-IND Sink : INT2\S34:TRANSFER/30 UDA327:2_C>CC-SI:iw Source: BACKGND\S06:SELECT-IND Sink : INT2\S34:TRANSFER/30 UDA327:2_C>CC-SI:nw Source: BACKGND\S06:SELECT-IND Sink : INT2\S34:TRANSFER/30 UDA327:2_C>CC-SI:nx Source: BACKGND\S06:SELECT-IND Sink : INT2\S34:TRANSFER/30 UDA327:2_C>CC-SI:psi-w Source: BACKGND\S06:SELECT-IND Sink : INT2\S34:TRANSFER/30 UDA327:2_C>CC-SI:psi-x Source: BACKGND\S06:SELECT-IND Sink : INT2\S34:TRANSFER/30 UDA327:3_C/MVD1-OFF Source: INT1\S07:SUMMARY-F/W Sink : INT1\S07:SUMMARY-F/W INT2\S34:TRANSFER/30 UDA327:3_C/MVD1-ON Source: INT1\S07:SUMMARY-F/W Sink : INT1\S07:SUMMARY-F/W INT2\S34:TRANSFER/30 UDA327:3_C/MVD2-OFF Source: INT1\S07:SUMMARY-F/W Sink : INT2\S34:TRANSFER/30 UDA327:3_C/MVD2-ON Source: INT1\S07:SUMMARY-F/W Sink : INT2\S34:TRANSFER/30 INT0\S09:TRANSF/10 OUTPUT CROSSREFERENCE: UDA327-2_/30 UDA327-3_/50

Source: Sink : Source: Sink :

INT2\S34:TRANSFER/30 ? INT2\S34:TRANSFER/30 ?

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S034 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S34:TRANSFER/30 TRANSFER TO UDA327-2 BIN.OUTPUT


released:

A4 E

116

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

% 3 TRAN % 4 TRAN % 5 TRAN % 6 TRAN % 7 TRAN % 8 TRAN % 9 TRAN % 10 TRAN % 11 TRAN % 12 TRAN % 13 TRAN % 14 TRAN % 15 TRAN % 16 TRAN % 17 TRAN % 18 TRAN % GDB-S1_commut-react GDB-S2_commut-react GDB-T1_commut-react GDB-T2_commut-react GDB-R1_scal-unx GDB-R2_scal-unx GDB-S1_scal-unx GDB-S2_scal-unx GDB-T1_scal-unx GDB-T2_scal-unx GDB-R1_scal-idx GDB-R2_scal-idx GDB-S1_scal-idx GDB-S2_scal-idx GDB-T1_scal-idx GDB-T2_scal-idx

ParamGrp_GDB021-scal-unx 100.00610%

ParamGrp_GDB021-scal-idx 0.00000%

INPUT CROSSREFERENCE: ParamGrp_GDB021-com-react Source: Sink : ParamGrp_GDB021-scal-idx Source: Sink : ParamGrp_GDB021-scal-unx Source: Sink : OUTPUT CROSSREFERENCE: GDB-R1_commut-react GDB-R1_scal-idx GDB-R1_scal-unx GDB-R2_commut-react GDB-R2_scal-idx GDB-R2_scal-unx GDB-S1_commut-react GDB-S1_scal-idx

? INT2\S35:SLOWOUT-B448 ? INT2\S35:SLOWOUT-B448 ? INT2\S35:SLOWOUT-B448

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

GDB-S1_scal-unx GDB-S2_commut-react GDB-S2_scal-idx GDB-S2_scal-unx GDB-T1_commut-react GDB-T1_scal-idx GDB-T1_scal-unx GDB-T2_commut-react GDB-T2_scal-idx GDB-T2_scal-unx

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT2\S35:SLOWOUT-B448 ? INT2\S35:SLOWOUT-B448 ? INT2\S35:SLOWOUT-B448 ? INT2\S35:SLOWOUT-B448 ? INT2\S35:SLOWOUT-B448 ? INT2\S35:SLOWOUT-B448 ? INT2\S35:SLOWOUT-B448 ? INT2\S35:SLOWOUT-B448 ? INT2\S35:SLOWOUT-B448 ? INT2\S35:SLOWOUT-B448 ? INT2\S35:SLOWOUT-B448 ? INT2\S35:SLOWOUT-B448 ? INT2\S35:SLOWOUT-B448 ? INT2\S35:SLOWOUT-B448 ? INT2\S35:SLOWOUT-B448 ? INT2\S35:SLOWOUT-B448 ? INT2\S35:SLOWOUT-B448 ? INT2\S35:SLOWOUT-B448 ?

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-12-06

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S035 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S35:SLOWOUT-B448 TRANSFER SIGNALS TO B448


released:

A4 E

117

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_/ixT1/ ParamGrp_Unbalance-Limit 4.99878% ParamGrp_Unbalance-Delay 60MS

+3 %

2 ABS % 0.5%

THRUL X UPLIM HYS >=LIM % 4 OND / T T/ MS INTERN_F>Unbalance-

INPUT CROSSREFERENCE: INTERN_/ixR1/ INTERN_/ixS1/ INTERN_/ixT1/ ParamGrp_Unbalance-Delay ParamGrp_Unbalance-Limit

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT0\S08:IX-COMMUTAT INT1\S14:PHASE-SHIFT3 INT2\S36:UNBALANCE-IX INT2\S05:INTEG2 INT0\S08:IX-COMMUTAT INT1\S14:PHASE-SHIFT3 INT2\S36:UNBALANCE-IX INT2\S05:INTEG2 INT0\S08:IX-COMMUTAT INT1\S14:PHASE-SHIFT3 INT2\S36:UNBALANCE-IX INT2\S05:INTEG2 ? INT2\S36:UNBALANCE-IX ? INT2\S36:UNBALANCE-IX

OUTPUT CROSSREFERENCE: INTERN_F>Unbalance-ix

Source: INT2\S36:UNBALANCE-IX Sink : INT3\S05:FAULT-EVENT6

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T2/C001/S036 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT2 S36:UNBALANCE-IX


released:

A4 E

118

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

PSR_Nodes-113H KOMBI-1L_Status KOMBI-2L_Status GDB-R1LA_Status GDB-R2LA_Status GDB-S1LA_Status GDB-S2LA_Status GDB-T1LA_Status GDB-T2LA_Status PMA-MB_DEVICESTATUS

5 RDLA 7 RDLA 9 RDLA 11 RDLA 13 RDLA 15 RDLA 17 RDLA 19 RDLA 21 RDLA 23 RDLA

BS 6 TRAN BS 8 TRAN BS 10 TRAN BS 12 TRAN BS 14 TRAN BS 16 TRAN BS 18 TRAN BS 20 TRAN BS 22 TRAN BS 24 TRAN BS

INTERN_StatusNodesINTERN_Status-Kombi INTERN_Status-Kombi INTERN_Status-GDB-R INTERN_Status-GDB-R INTERN_Status-GDB-S INTERN_Status-GDB-S INTERN_Status-GDB-T INTERN_Status-GDB-T INTERN_Status-PMA32

INPUT CROSSREFERENCE: GDB-R1LA_Status GDB-R2LA_Status GDB-S1LA_Status GDB-S2LA_Status GDB-T1LA_Status GDB-T2LA_Status KOMBI-1L_Status KOMBI-2L_Status PMA-MB_DEVICESTATUS PSR_Nodes-110H PSR_Nodes-113H PSR_Status

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

? INT3\S01:B448-INPUT ? INT3\S01:B448-INPUT ? INT3\S01:B448-INPUT ? INT3\S01:B448-INPUT ? INT3\S01:B448-INPUT ? INT3\S01:B448-INPUT ? INT3\S01:B448-INPUT ? INT3\S01:B448-INPUT ? INT3\S01:B448-INPUT ? INT3\S01:B448-INPUT ? INT3\S01:B448-INPUT ? INT3\S01:B448-INPUT

OUTPUT CROSSREFERENCE: INTERN_Status-GDB-R1 INTERN_Status-GDB-R2 INTERN_Status-GDB-S1 INTERN_Status-GDB-S2 INTERN_Status-GDB-T1 INTERN_Status-GDB-T2

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_Status-Kombi-1 INTERN_Status-Kombi-2 INTERN_Status-PMA324 INTERN_Status-PSR INTERN_StatusNodes-110H INTERN_StatusNodes-113H

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT1\S09:FAULT-EVENT2 INT3\S01:B448-INPUT INT1\S09:FAULT-EVENT2 INT3\S01:B448-INPUT INT1\S09:FAULT-EVENT2 INT3\S01:B448-INPUT INT1\S09:FAULT-EVENT2

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S001 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S01:B448-INPUT


released:

A4 E

119

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

.1 .2 .3 .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15 3 PANEL-I_RESET 2 OFD PANEL-O_RESET 100ms \ T T\ MS HW: =.AC22 o B &

PANEL_C>LOCAL-MVD-ON PANEL_S>F3 PANEL_S>F4 PANEL_S>F5 PANEL_S>F6 PANEL_C>LAMPTEST PANEL_C>CENTRAL PANEL_C>LOCAL-AUX-O PANEL_C>LOCAL-MVD-O PANEL_S>F11 PANEL_S>F12 PANEL_S>F13 PANEL_S>F14 Select Testprog. PANEL_C>LCB PANEL_C>LOCAL

PANEL_C>RESET

INPUT CROSSREFERENCE: PANEL-I_KEYS:F1-F16 PANEL-I_RESET PANEL-O_RESET

Source: Sink : Source: Sink : Source: Sink :

? INT3\S02:PANEL-INPUT1 ? INT3\S02:PANEL-INPUT1 PANEL-AFC094\S03:PANEL-OUT INT3\S02:PANEL-INPUT1

OUTPUT CROSSREFERENCE: PANEL_C>CENTRAL PANEL_C>LAMPTEST PANEL_C>LCB PANEL_C>LOCAL PANEL_C>LOCAL-AUX-OFF PANEL_C>LOCAL-AUX-ON PANEL_C>LOCAL-MVD-OFF PANEL_C>LOCAL-MVD-ON PANEL_C>RESET PANEL_S>F11

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PANEL_S>F12 PANEL_S>F13 PANEL_S>F14 PANEL_S>F3 PANEL_S>F4 PANEL_S>F5 PANEL_S>F6

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S02:PANEL-INPUT1 BACKGND\S04:MODE-SELECT INT3\S03:PANEL-INPUT2 INT3\S02:PANEL-INPUT1 INT3\S21:RESET/LT INT3\S02:PANEL-INPUT1 BACKGND\S04:MODE-SELECT INT3\S02:PANEL-INPUT1 BACKGND\S04:MODE-SELECT INT3\S03:PANEL-INPUT2 INT3\S02:PANEL-INPUT1 INT3\S10:PRIOSEL-2 INT3\S02:PANEL-INPUT1 INT3\S10:PRIOSEL-2 INT3\S02:PANEL-INPUT1 INT3\S10:PRIOSEL-2 INT3\S02:PANEL-INPUT1 INT3\S10:PRIOSEL-2 INT3\S02:PANEL-INPUT1 LCB-AFC094\S03:AFC094-LED INT3\S21:RESET/LT INT3\S02:PANEL-INPUT1 INT3\S03:PANEL-INPUT2 INT3\S02:PANEL-INPUT1 INT3\S03:PANEL-INPUT2 INT3\S02:PANEL-INPUT1 INT3\S03:PANEL-INPUT2 INT3\S02:PANEL-INPUT1 PANEL-AFC094\S05:LED-CONTROL1 INT3\S03:PANEL-INPUT2 INT3\S02:PANEL-INPUT1 INT3\S03:PANEL-INPUT2 INT3\S02:PANEL-INPUT1 INT3\S03:PANEL-INPUT2 INT3\S02:PANEL-INPUT1 INT3\S03:PANEL-INPUT2 INT3\S02:PANEL-INPUT1 INT3\S03:PANEL-INPUT2

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S002 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S02:PANEL-INPUT1 PANEL KEYBOARD INPUTS


released:

A4 E

120

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

MODBUS-O_C>Local-Release PANEL_S>F3 PANEL_S>F4 PANEL_S>F5 PANEL_S>F6 PANEL_S>F11 PANEL_S>F12 PANEL_S>F13 PANEL_S>F14 Select Testprog. INPUT CROSSREFERENCE: MODBUS-O_C>Local-Release PANEL_C>CENTRAL PANEL_C>LOCAL PANEL_S>F11 PANEL_S>F12 PANEL_S>F13 PANEL_S>F14 PANEL_S>F3 PANEL_S>F4 PANEL_S>F5 PANEL_S>F6

REL I04 I05 I06 I07 I08 I09 I10 I11

F3 F4 F4 F5 F5 F6 F6 F11 F11 F12 F12 F13 F13 F14 F14

PANEL_C>LOCAL-FASTER

PANEL_C>LOCAL-FORWAR PANEL_C>LOCAL-F6 Selective Indic. PANEL_C>LOCAL-STOP

PANEL_C>LOCAL-SLOWER PANEL_C>LOCAL-REVER PANEL_C>LOCAL-F14

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3-MODBUS\S01:MODBUS-OUT1 INT3\S03:PANEL-INPUT2 INT3\S12:PRIOSEL-4 INT3\S02:PANEL-INPUT1 BACKGND\S04:MODE-SELECT INT3\S03:PANEL-INPUT2 INT3\S02:PANEL-INPUT1 BACKGND\S04:MODE-SELECT INT3\S03:PANEL-INPUT2 INT3\S02:PANEL-INPUT1 INT3\S03:PANEL-INPUT2 INT3\S02:PANEL-INPUT1 INT3\S03:PANEL-INPUT2 INT3\S02:PANEL-INPUT1 INT3\S03:PANEL-INPUT2 INT3\S02:PANEL-INPUT1 PANEL-AFC094\S05:LED-CONTROL1 INT3\S03:PANEL-INPUT2 INT3\S02:PANEL-INPUT1 INT3\S03:PANEL-INPUT2 INT3\S02:PANEL-INPUT1 INT3\S03:PANEL-INPUT2 INT3\S02:PANEL-INPUT1 INT3\S03:PANEL-INPUT2 INT3\S02:PANEL-INPUT1 INT3\S03:PANEL-INPUT2

OUTPUT CROSSREFERENCE: INTERN_C>SERVICE PANEL_C>LOCAL-F14 PANEL_C>LOCAL-F6 PANEL_C>LOCAL-FASTER PANEL_C>LOCAL-FORWARD PANEL_C>LOCAL-REVERSE PANEL_C>LOCAL-SLOWER PANEL_C>LOCAL-START PANEL_C>LOCAL-STOP

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S03:PANEL-INPUT2 BACKGND\S04:MODE-SELECT PANEL-AFC094\S06:LED-CONTROL2 INT3\S14:START-UP-AUX INT3\S03:PANEL-INPUT2 ? INT3\S03:PANEL-INPUT2 BACKGND\S01:SELECT-DECO PANEL-AFC094\S05:LED-CONTROL1 INT3\S03:PANEL-INPUT2 INT3\S12:PRIOSEL-4 INT3\S03:PANEL-INPUT2 INT3\S10:PRIOSEL-2 INT3\S03:PANEL-INPUT2 INT3\S10:PRIOSEL-2 INT3\S03:PANEL-INPUT2 INT3\S12:PRIOSEL-4 INT3\S03:PANEL-INPUT2 INT3\S10:PRIOSEL-2 INT3\S03:PANEL-INPUT2 INT3\S10:PRIOSEL-2

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S003 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S03:PANEL-INPUT2 SELECTION PANEL / SERVICE OPERATION


released:

A4 E

121

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

.1 .2 .3 .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15 LCB-I_BI-1 LCB-I_BI-2 LCB-I_BI-3 2 TRAN B 3 TRAN B 4 TRAN B

LCB_C>LCB-MVD-ON LCB_C>LCB-START LCB_C>LCB-FASTER LCB_C>LCB-FORWARD LCB_C>LCB-MAN-LOWER LCB_C>LCB-LAMPTEST LCB_C>LCB-INCHING LCB_C>LCB-AUX-OFF LCB_C>LCB-MVD-OFF LCB_C>LCB-STOP LCB_C>LCB-SLOWER LCB_C>LCB-REVERSE

LCB_C>LCB-RE-ROCKING LCB_C>LCB-CREEPING LCB_C>LCB-NORMAL LCB_C>LCB-START-EXT LCB_C>LCB-STOP-EXT LCB_LCB-MANLOW-EXT

INPUT CROSSREFERENCE: LCB-I_BI-1 LCB-I_BI-2 LCB-I_BI-3 LCB-I_KEYS:F1-F16

Source: Sink : Source: Sink : Source: Sink : Source: Sink :

? INT3\S04:LCB-IN1 ? INT3\S04:LCB-IN1 ? INT3\S04:LCB-IN1 ? INT3\S04:LCB-IN1

OUTPUT CROSSREFERENCE: LCB_C>LCB-AUX-OFF LCB_C>LCB-AUX-ON LCB_C>LCB-CREEPING LCB_C>LCB-FASTER LCB_C>LCB-FORWARD LCB_C>LCB-INCHING LCB_C>LCB-LAMPTEST LCB_C>LCB-MAN-LOWER LCB_C>LCB-MVD-OFF LCB_C>LCB-MVD-ON LCB_C>LCB-NORMAL

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

LCB_C>LCB-RE-ROCKING LCB_C>LCB-REVERSE LCB_C>LCB-SLOWER LCB_C>LCB-START LCB_C>LCB-START-EXT LCB_C>LCB-STOP LCB_C>LCB-STOP-EXT LCB_LCB-MANLOW-EXT

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 LCB-AFC094\S02:TRANS-DO INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S004 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S04:LCB-IN1 LCB KEYBOARD INPUT SIGNALS


released:

A4 E

122

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_RESET TRIP_SFF-5-SLOW TRIP_SFF-1-FAST B INTERN_F/Mill-Moving INTERN_F/COOL-SENS-FAIL INTERN_F/COOL-TEMP-CONV INTERN_F/COOL-FLOW-CONV INTERN_F/COOL-LEVEL INTERN_F/COOL-PRESS INTERN_F/COOL-TMP-CVOUT INTERN_F/COOL-COND UDA327:3_F>COOL-WAT-LEAK 2 INTERN_Critical-Stop INTERN_-WRe-CONTROL B INTERN_F/AGP10 INTERN_F/AGP11 3 UDA327:3_F>Safety-CSA-465 UDA327:2_F>CSsum-SME MODBUS-O_S>EXCITAT-FAN-FB UDA327:3_F>LCB-Exci-Trip INTERN_F>Unbalance-ix o o B o .13 o .14 .15 Y & .12 .10 .11 & .9 4 BIBS .0 .1 .2 .3 .4 .5 .6 .7 o .8 1 >=1

AF AFF SFFI

SFF SF FFO FLO FMO

TRIP_SFF-6-SLOW INTERN_SUMF-INT3-6 TRIP_FFO-6-SLOW INTERN_FMO-INT3-6

FM

Fault Handling: Bit:0 Code:81 Bit:1 Code:82 Bit:2 Code:83 Bit:3 Code:84 Bit:4 Code:85 Bit:5 Code:86 Bit:6 Code:87 Bit:7 Code:88 Bit:8 Code:89 Bit:9 Code:90 Bit:10 Code:91 Bit:11 Code:92 Bit:12 Code:93 Bit:13 Code:94 Bit:14 Code:95 Bit:15 Code:96

"F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F: "F:

Mill oscillating during start" Cooling unit sensor disturbance" Cooling unit water over temp. conv. inlet" Cooling unit water low flow" Cooling unit water low level" Cooling unit water low pressure" Cooling unit water over temp. conv. outlet" Cooling unit water high conductivity" Cooling unit water leakage (+F15)" Critical Stop" Airgap too small probe no.10" Airgap too small probe no.11" PSR Print board failure, CSA465" Excitation Fan Fault" Low voltage circuit breaker excitation trip" Motor Unbalance Current"

INPUT CROSSREFERENCE: INIT_*INIT

INTERN_-WRe-CONTROL

INTERN_Critical-Stop

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_F/AGP10 INTERN_F/AGP11 INTERN_F/COOL-COND INTERN_F/COOL-FLOW-CONV INTERN_F/COOL-LEVEL INTERN_F/COOL-PRESS INTERN_F/COOL-SENS-FAIL INTERN_F/COOL-TEMP-CONV INTERN_F/COOL-TMP-CVOUT INTERN_F/Mill-Moving

Source: INT3\S21:RESET/LT Sink : INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:WARN-EVENT7 INT2\S03:FAULT-EVENT5 Source: INT3\S17:MILL-ON,WR Sink : INT1\S07:SUMMARY-F/W INT3\S08:WARN-EVENT9 INT3\S11:PRIOSEL-3 INT3\S05:FAULT-EVENT6 INT3\S16:START/STOP INT3\S17:MILL-O INT3\S12:PRIOSEL-4 Source: INT2\S02:TRANSF>60 Sink : PANEL-AFC094\S03:PANEL-OUT INT3\S05:FAULT-EVENT6 Source: INT2\S29:AIR-GAP-SUP2 Sink : INT2\S31:AIR-GAP-MON2 INT3\S05:FAULT-EVENT6 Source: INT2\S29:AIR-GAP-SUP2 Sink : INT2\S31:AIR-GAP-MON2 INT3\S05:FAULT-EVENT6 Source: BACKGND\S03:COOL-MONITOR Sink : INT3\S05:FAULT-EVENT6 Source: BACKGND\S03:COOL-MONITOR Sink : INT3\S14:START-UP-AUX INT3\S05:FAULT-EVENT6 Source: BACKGND\S03:COOL-MONITOR Sink : INT3\S14:START-UP-AUX INT3\S05:FAULT-EVENT6 Source: BACKGND\S03:COOL-MONITOR Sink : INT3\S05:FAULT-EVENT6 Source: BACKGND\S02:COOL-INPUT Sink : INT3\S05:FAULT-EVENT6 Source: BACKGND\S03:COOL-MONITOR Sink : INT3\S05:FAULT-EVENT6 Source: BACKGND\S03:COOL-MONITOR Sink : INT3\S05:FAULT-EVENT6 Source: INT3\S16:START/STOP

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-06-01

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S005 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S05:FAULT-EVENT6 FAULT HANDLING


released:

A4 E

123

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_RESET

Source: INT3\S21:RESET/LT Sink : INT1\S10:FAULT-EVENT3 INT1\S25:TRANSFER/70 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:W INT2\S33:FROZENCHARGE INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 MODBUS-O_S>EXCITAT-FAN-FB Source: INT3-MODBUS\S01:MODBUS-OUT1 Sink : INT1\S25:TRANSFER/70 INT3\S05:FAULT-EVENT6 TRIP_SFF-1-FAST Source: INT1\S08:FAULT-EVENT1 Sink : INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:WARN-EVENT7 INT2\S03:FAULT-EVENT5 TRIP_SFF-5-SLOW Source: INT2\S03:FAULT-EVENT5 Sink : INT1\S08:FAULT-EVENT1 INT3\S05:FAULT-EVENT6 UDA327:2_F>CSsum-SME Source: INT1\S02:TRANSF>20/40 Sink : INT1\S11:FAULT-EVENT4 INT3\S05:FAULT-EVENT6 INT0\S09:TRANSF/10 UDA327:3_F>COOL-WAT-LEAK Source: INT1\S02:TRANSF>20/40 Sink : INT3\S05:FAULT-EVENT6 UDA327:3_F>LCB-Exci-Trip Source: INT1\S02:TRANSF>20/40 Sink : INT3\S05:FAULT-EVENT6 UDA327:3_F>Safety-CSA-465 Source: INT1\S02:TRANSF>20/40 Sink : INT1\S11:FAULT-EVENT4 INT3\S05:FAULT-EVENT6 OUTPUT CROSSREFERENCE: INTERN_FMO-INT3-6 INTERN_SUMF-INT3-6 TRIP_FF-6-SLOW TRIP_FFO-6-SLOW TRIP_SFF-6-SLOW

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S05:FAULT-EVENT6 INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT3\S05:FAULT-EVENT6 INT1\S07:SUMMARY-F/W INT3\S05:FAULT-EVENT6 INT3\S23:FIRST-T/W INT3\S05:FAULT-EVENT6 INT3\S23:FIRST-T/W INT3\S05:FAULT-EVENT6 INT1\S08:FAULT-EVENT1 INT3\S06:WARN-EVENT7

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-06-01

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S005 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S05:FAULT-EVENT6 FAULT HANDLING


released:

A4 E

124

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_RESET TRIP_SFF-6-SLOW TRIP_SFF-1-FAST B INTERN_W/AGP1 INTERN_W/AGP2 INTERN_W/AGP3 INTERN_W/AGP4 INTERN_W/AGP5 INTERN_W/AGP6 INTERN_W/AGP7 INTERN_W/AGP8 INTERN_W/AGP9 INTERN_W/AGP10 INTERN_W/AGP11 INTERN_W/Unet<95% UDA327:3_S>CC:THYSU-READY 2 BIBS .0 .1 .2 .3 .4 .5 .6 .7 .8 .9 .10 .11 o .12 0B .13 0B .14 0B .15 Y 1 >=1

AF AFF SFFI

SFF SF FFO FLO FMO

ALARM_SFF-7-SLOW INTERN_SUMW-INT3-7 ALARM_FFO-7-SLOW INTERN_FMO-INT3-7

FM

Warning Bit:0 Bit:1 Bit:2 Bit:3 Bit:4 Bit:5 Bit:6 Bit:7 Bit:8 Bit:9 Bit:10 Bit:11 Bit:12 Bit:13 Bit:14 Bit:15

Handling: Code:97 "W: Airgap low probe no.1" Code:98 "W: Airgap low probe no.2" Code:99 "W: Airgap low probe no.3" Code:100 "W: Airgap low probe no.4" Code:101 "W: Airgap low probe no.5" Code:102 "W: Airgap low probe no.6" Code:103 "W: Airgap low probe no.7" Code:104 "W: Airgap low probe no.8" Code:105 "W: Airgap low probe no.9" Code:106 "W: Airgap low probe no.10" Code:107 "W: Airgap low probe no.11" Code:108 "W: Network Voltage <95% <Nw Limit>" Code:109 "W: Thyristor supervision not ready" Code:110 "no message stored" Code:111 "Stator knife switch open" < Only indication > Code:112 "Rotor knife switch open" < Only indication >

INPUT CROSSREFERENCE: INIT_*INIT

INTERN_RESET

INTERN_W/AGP1 INTERN_W/AGP10 INTERN_W/AGP11

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_W/AGP2 INTERN_W/AGP3 INTERN_W/AGP4 INTERN_W/AGP5 INTERN_W/AGP6 INTERN_W/AGP7 INTERN_W/AGP8 INTERN_W/AGP9 INTERN_W/Unet<95% TRIP_SFF-1-FAST

Source: INT3\S21:RESET/LT Sink : INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:WARN-EVENT7 INT2\S03:FAULT-EVENT5 Source: INT3\S21:RESET/LT Sink : INT1\S10:FAULT-EVENT3 INT1\S25:TRANSFER/70 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:W INT2\S33:FROZENCHARGE INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 Source: INT2\S28:AIR-GAP-SUP1 Sink : INT3\S06:WARN-EVENT7 Source: INT2\S29:AIR-GAP-SUP2 Sink : INT3\S06:WARN-EVENT7 Source: INT2\S29:AIR-GAP-SUP2 Sink : INT3\S06:WARN-EVENT7 Source: INT2\S28:AIR-GAP-SUP1 Sink : INT3\S06:WARN-EVENT7 Source: INT2\S28:AIR-GAP-SUP1 Sink : INT3\S06:WARN-EVENT7 Source: INT2\S28:AIR-GAP-SUP1 Sink : INT3\S06:WARN-EVENT7 Source: INT2\S28:AIR-GAP-SUP1 Sink : INT3\S06:WARN-EVENT7 Source: INT2\S29:AIR-GAP-SUP2 Sink : INT3\S06:WARN-EVENT7 Source: INT2\S29:AIR-GAP-SUP2 Sink : INT3\S06:WARN-EVENT7 Source: INT2\S29:AIR-GAP-SUP2 Sink : INT3\S06:WARN-EVENT7 Source: INT2\S29:AIR-GAP-SUP2 Sink : INT3\S06:WARN-EVENT7 Source: INT0\S07:FILTER5 Sink : INT3\S06:WARN-EVENT7 INT2\S15:NX-LIMITS Source: INT1\S08:FAULT-EVENT1 Sink : INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-02-16

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S006 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S06:WARN-EVENT7 WARNING HANDLING


released:

A4 E

125

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

UDA327:3_S>CC:THYSU-READY Source: INT1\S02:TRANSF>20/40 Sink : INT3\S06:WARN-EVENT7 OUTPUT CROSSREFERENCE: ALARM_FF-7-SLOW ALARM_FFO-7-SLOW ALARM_SFF-7-SLOW INTERN_FMO-INT3-7 INTERN_SUMW-INT3-7

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S06:WARN-EVENT7 INT3\S23:FIRST-T/W INT3\S06:WARN-EVENT7 INT3\S23:FIRST-T/W INT3\S06:WARN-EVENT7 INT1\S08:FAULT-EVENT1 INT3\S07:WARN-EVENT8 INT3\S06:WARN-EVENT7 INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT3\S06:WARN-EVENT7 INT1\S07:SUMMARY-F/W

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-02-16

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S006 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S06:WARN-EVENT7 WARNING HANDLING


released:

A4 E

126

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_RESET ALARM_SFF-7-SLOW TRIP_SFF-1-FAST B INTERN_W/COOL-CT001 INTERN_W/COOL-CF001 INTERN_W/COOL-CL001 INTERN_W/COOL-CP001 INTERN_W/COOL-CT002 INTERN_W/COOL-CD001 INTERN_W/COOL-POWR-FAIL INTERN_W/COOL-SENS-FAIL INTERN_W/COOL-TEMP-CONV INTERN_W/COOL-LEVEL INTERN_W/COOL-PRESS INTERN_W/COOL-TMP-CVOUT INTERN_W/COOL-COND INTERN_W/COOL-CT004 INTERN_W/COOL-CT005 0B 2 BIBS .0 .1 .2 .3 .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15 Y 1 >=1

AF AFF SFFI

SFF SF FFO FLO FMO

ALARM_SFF-8-SLOW INTERN_SUMW-INT3-8 ALARM_FFO-8-SLOW INTERN_FMO-INT3-8

FM

Warning Bit:0 Bit:1 Bit:2 Bit:3 Bit:4 Bit:5 Bit:6 Bit:7 Bit:8 Bit:9 Bit:10 Bit:11 Bit:12 Bit:13 Bit:14 Bit:15

Handling: Code:113 "W: Code:114 "W: Code:115 "W: Code:116 "W: Code:117 "W: Code:118 "W: Code:119 "W: Code:120 "W: Code:121 "W: Code:122 "W: Code:123 "W: Code:124 "W: Code:125 "W: Code:126 "W: Code:127 "W: Code:128 "no

Cooling Cooling Cooling Cooling Cooling Cooling Cooling Cooling Cooling Cooling Cooling Cooling Cooling Cooling Cooling message

unit sensor CT001 defect" unit sensor CF001 defect" unit sensor CL001 defect" unit sensor CP001 defect" unit sensor CT002 defect" unit sensor CD001 defect" unit power supply fail UAC096" unit sensor disturbance" unit water over temp. conv. inlet" unit water level low" unit water pressure low" unit water over temp. conv. outlet" unit water conductivity high" unit sensor CT004 defect" unit sensor CT005 defect" stored"

INPUT CROSSREFERENCE: ALARM_SFF-7-SLOW INIT_*INIT

Source: Sink : Source: Sink : Source: Sink :

INTERN_RESET

INTERN_W/COOL-CD001

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_W/COOL-CF001 INTERN_W/COOL-CL001 INTERN_W/COOL-COND INTERN_W/COOL-CP001 INTERN_W/COOL-CT001 INTERN_W/COOL-CT002 INTERN_W/COOL-CT004 INTERN_W/COOL-CT005 INTERN_W/COOL-LEVEL INTERN_W/COOL-POWR-FAIL

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S06:WARN-EVENT7 INT1\S08:FAULT-EVENT1 INT3\S07:WARN-EVENT8 INT3\S21:RESET/LT INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:WARN-EVENT7 INT2\S03:FAULT-EVENT5 INT3\S21:RESET/LT INT1\S10:FAULT-EVENT3 INT1\S25:TRANSFER/70 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:W INT2\S33:FROZENCHARGE INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S03:COOL-MONITOR INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S03:COOL-MONITOR INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT INT3\S07:WARN-EVENT8

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S007 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S07:WARN-EVENT8 WARNING HANDLING


released:

A4 E

127

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_W/COOL-TEMP-CONV INTERN_W/COOL-TMP-CVOUT TRIP_SFF-1-FAST

Sink : Source: Sink : Source: Sink : Source: Sink :

BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT INT3\S07:WARN-EVENT8 BACKGND\S03:COOL-MONITOR INT3\S07:WARN-EVENT8 BACKGND\S03:COOL-MONITOR INT3\S07:WARN-EVENT8 INT1\S08:FAULT-EVENT1 INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:WARN-EVENT7 INT2\S03:FAULT-EVENT5

OUTPUT CROSSREFERENCE: ALARM_FF-8-SLOW ALARM_FFO-8-SLOW ALARM_SFF-8-SLOW INTERN_FMO-INT3-8 INTERN_SUMW-INT3-8

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S07:WARN-EVENT8 INT3\S23:FIRST-T/W INT3\S07:WARN-EVENT8 INT3\S23:FIRST-T/W INT3\S07:WARN-EVENT8 INT1\S08:FAULT-EVENT1 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT3\S07:WARN-EVENT8 INT1\S07:SUMMARY-F/W

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S007 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S07:WARN-EVENT8 WARNING HANDLING


released:

A4 E

128

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

SFF MODBUS-O_C>VMS-RESET B ALARM_SFF-8-SLOW TRIP_SFF-1-FAST B 5 BIBS 0B .0 o .1 o .2 o .3 o .4 o .5 o .6 .7 .8 3 INTERN_-WRe-CONTROL MODBUS-O_NonCritricalStop B 4 & MODBUS-O_ProcessInterlock B 0B 0B 0B .12 .13 .14 .15 Y FM 0B 0B & .9 .10 .11 2 >=1 SFFI AF AFF SF FFO FLO FMO

ALARM_SFF-9-SLOW INTERN_SUMW-INT3-9 ALARM_FFO-9-SLOW INTERN_FMO-INT3-9

MODBUS-O_FB>AUX-AVAILABLE KOMBI-1_W>EARTH-F-ROTOR UDA327:1_F>DCF:RFO MODBUS-O_W>Excitation-LCB UDA327:3_S>MVD1-AVAILABLE UDA327:3_S>MVD2-AVAILABLE MODBUS-O_W>Stator-Transf MODBUS-O_W>Rotor-Transf

Warning Bit:0 Bit:1 Bit:2 Bit:3 Bit:4 Bit:5 Bit:6 Bit:7 Bit:8 Bit:9 Bit:10 Bit:11 Bit:12 Bit:13 Bit:14 Bit:15

Handling: Code:129 "no message stored" Code:130 "W: Auxiliaries are not ready" Code:131 "W: Earth fault rotor" Code:132 "W: Excitation converter not ready" Code:133 "W: Excitation LCB Opened" Code:134 "W: 23kV circuit breaker not available (Stator)" Code:135 "W: 3.3kV circuit breaker not available (Rotor)" Code:136 "W: Stator transformer alarm" Code:137 "W: Excitation transformer alarm" Code:138 "W: NonCritical Interlock Stop" Code:139 "Speed lowering delta psi-T >" < Only indication Code:140 "Speed lowering delta psi-T <" < Only indication Code:141 "W: Process Interlock Stop" Code:142 "Torque limit 110% of rated" < Only indication Code:143 "Speed lowering Unet<95%" < Only indication Code:144 "Speed limit delta psi-T" ( Only Indication

> > > > )

INPUT CROSSREFERENCE: ALARM_SFF-8-SLOW INIT_*INIT

Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_-WRe-CONTROL

INTERN_RESET

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

KOMBI-1_W>EARTH-F-ROTOR MODBUS-O_C>VMS-RESET MODBUS-O_FB>AUX-AVAILABLE MODBUS-O_NonCritricalStop MODBUS-O_ProcessInterlock MODBUS-O_W>Excitation-LCB MODBUS-O_W>Rotor-Transf MODBUS-O_W>Stator-Transf TRIP_SFF-1-FAST

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

UDA327:1_F>DCF:RFO

INT3\S07:WARN-EVENT8 INT1\S08:FAULT-EVENT1 INT3\S08:WARN-EVENT9 INT3\S21:RESET/LT INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:WARN-EVENT7 INT2\S03:FAULT-EVENT5 INT3\S17:MILL-ON,WR INT1\S07:SUMMARY-F/W INT3\S08:WARN-EVENT9 INT3\S11:PRIOSEL-3 INT3\S05:FAULT-EVENT6 INT3\S16:START/STOP INT3\S17:MILL-O INT3\S12:PRIOSEL-4 INT3\S21:RESET/LT INT1\S10:FAULT-EVENT3 INT1\S25:TRANSFER/70 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:W INT2\S33:FROZENCHARGE INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 INT2\S02:TRANSF>60 INT3\S08:WARN-EVENT9 INT3-MODBUS\S01:MODBUS-OUT1 INT3\S08:WARN-EVENT9 INT3\S21:RESET/LT INT3-MODBUS\S01:MODBUS-OUT1 INT3\S08:WARN-EVENT9 INT3\S13:START-UP-AUX INT3-MODBUS\S01:MODBUS-OUT1 PANEL-AFC094\S03:PANEL-OUT INT3\S08:WARN-EVENT9 INT3\S16:START/STOP INT3-MODBUS\S08:MODBUS-OUT2 PANEL-AFC094\S03:PANEL-OUT INT3\S08:WARN-EVENT9 INT3\S16:START/STOP INT3-MODBUS\S08:MODBUS-OUT2 INT3\S08:WARN-EVENT9 INT3-MODBUS\S08:MODBUS-OUT2 INT3\S08:WARN-EVENT9 INT3-MODBUS\S08:MODBUS-OUT2 INT3\S08:WARN-EVENT9 INT1\S08:FAULT-EVENT1 INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:WARN-EVENT7 INT2\S03:FAULT-EVENT5 INT0\S02:TRANSF>00 INT1\S11:FAULT-EVENT4 INT3\S08:WARN-EVENT9

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-11-29

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S008 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S08:WARN-EVENT9 WARNING HANDLING


released:

A4 E

129

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

Sink OUTPUT CROSSREFERENCE: ALARM_FF-9-SLOW ALARM_FFO-9-SLOW ALARM_SFF-9-SLOW INTERN_FMO-INT3-9 INTERN_SUMW-INT3-9

: INT3-MODBUS\S03:STATUS-1 INT3\S08:WARN-EVENT9

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S08:WARN-EVENT9 INT3\S23:FIRST-T/W INT3\S08:WARN-EVENT9 INT3\S23:FIRST-T/W INT3\S08:WARN-EVENT9 INT1\S08:FAULT-EVENT1 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT3\S08:WARN-EVENT9 INT1\S07:SUMMARY-F/W

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-11-29

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S008 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S08:WARN-EVENT9 WARNING HANDLING


released:

A4 E

130

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_RESET ALARM_SFF-9-SLOW TRIP_SFF-1-FAST INTERN_Status-Kombi-1.0 HW-Error INTERN_Status-Kombi-1.4 Shortcircuit out INTERN_Status-Kombi-2.0 HW-Error INTERN_Status-Kombi-2.4 Shortcircuit out INTERN_Status-GDB-R1.0 HW-Error INTERN_Status-GDB-R1.1 SW-Error INTERN_Status-GDB-R1.4 Shortcircuit out INTERN_Status-GDB-R2.0 INTERN_Status-GDB-R2.1 INTERN_Status-GDB-R2.4 B INTERN_Status-GDB-S1.0 INTERN_Status-GDB-S1.1 INTERN_Status-GDB-S1.4 B INTERN_Status-GDB-S2.0 INTERN_Status-GDB-S2.1 INTERN_Status-GDB-S2.4 B INTERN_Status-GDB-T1.0 INTERN_Status-GDB-T1.1 INTERN_Status-GDB-T1.4 B INTERN_Status-GDB-T2.0 INTERN_Status-GDB-T2.1 INTERN_Status-GDB-T2.4 B 0B 0B 0B 0B 0B 0B 0B 0B .7 .8 .9 .10 .11 .12 .13 .14 .15 Y 9 >=1 .6 8 >=1 .5 7 >=1 .4 6 >=1 .3 2 >=1 B 3 >=1 .1 B 4 >=1 B 10 BIBS .0 1 >=1

AF AFF SFFI

SFF SF FFO FLO FMO

ALARM_SFF-10-SLOW INTERN_SUMW-INT3-10 ALARM_FFO-10-SLOW INTERN_FMO-INT3-10

.2 B 5 >=1

FM

Warning Bit:0 Bit:1 Bit:2 Bit:3 Bit:4 Bit:5 Bit:6 Bit:7

Handling: Code:145 "W: Code:146 "W: Code:147 "W: Code:148 "W: Code:149 "W: Code:150 "W: Code:151 "W: Code:152 "W:

Hardware Hardware Hardware Hardware Hardware Hardware Hardware Hardware

error error error error error error error error

UAC326-1" UAC326-2" GDB021-R1" GDB021-R2" GDB021-S1" GDB021-S2" GDB021-T1" GDB021-T2"

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INPUT CROSSREFERENCE: ALARM_SFF-9-SLOW INIT_*INIT

Source: Sink : Source: Sink : Source: Sink :

INTERN_RESET

INTERN_Status-GDB-R1.0 INTERN_Status-GDB-R1.1 INTERN_Status-GDB-R1.4 INTERN_Status-GDB-R2.0 INTERN_Status-GDB-R2.1 INTERN_Status-GDB-R2.4

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source:

INT3\S08:WARN-EVENT9 INT1\S08:FAULT-EVENT1 INT3\S09:WARN-EVENT10 INT3\S21:RESET/LT INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:WARN-EVENT7 INT2\S03:FAULT-EVENT5 INT3\S21:RESET/LT INT1\S10:FAULT-EVENT3 INT1\S25:TRANSFER/70 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:W INT2\S33:FROZENCHARGE INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S009 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S09:WARN-EVENT10 WARNING HANDLING


released:

A4 E

131

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_Status-GDB-S1.1 INTERN_Status-GDB-S1.4 INTERN_Status-GDB-S2.0 INTERN_Status-GDB-S2.1 INTERN_Status-GDB-S2.4 INTERN_Status-GDB-T1.0 INTERN_Status-GDB-T1.1 INTERN_Status-GDB-T1.4 INTERN_Status-GDB-T2.0 INTERN_Status-GDB-T2.1 INTERN_Status-GDB-T2.4 INTERN_Status-Kombi-1.0 INTERN_Status-Kombi-1.4 INTERN_Status-Kombi-2.0 INTERN_Status-Kombi-2.4 TRIP_SFF-1-FAST

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT3\S01:B448-INPUT INT3\S09:WARN-EVENT10 INT1\S08:FAULT-EVENT1 INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:WARN-EVENT7 INT2\S03:FAULT-EVENT5

OUTPUT CROSSREFERENCE: ALARM_FF-10-SLOW ALARM_FFO-10-SLOW ALARM_SFF-10-SLOW INTERN_FMO-INT3-10 INTERN_SUMW-INT3-10

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S09:WARN-EVENT10 INT3\S23:FIRST-T/W INT3\S09:WARN-EVENT10 INT3\S23:FIRST-T/W INT3\S09:WARN-EVENT10 INT1\S08:FAULT-EVENT1 INT3\S09:WARN-EVENT10 INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT3\S09:WARN-EVENT10 INT1\S07:SUMMARY-F/W

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S009 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S09:WARN-EVENT10 WARNING HANDLING


released:

A4 E

132

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

2 & PANEL_C>LOCAL-AUX-OFF 3 >=1 INTERN_CENTRAL-SEL B PANEL_C>LOCAL-MVD-ON B 5 & PANEL_C>LOCAL-MVD-OFF B 6 & PANEL_C>LOCAL-START B 7 & PANEL_C>LOCAL-STOP B 8 & PANEL_C>LOCAL-FORWARD B 9 & PANEL_C>LOCAL-REVERSE B INPUT CROSSREFERENCE: INTERN_CENTRAL-SEL INTERN_LOCAL-REVERS INTERN_LOCAL-STOP INTERN_LOCAL-START INTERN_LOCAL-MVD-OF INTERN_LOCAL-MVD-ON B 4 & INTERN_LOCAL-AUX-OF

INTERN_LOCAL-FORWARD

INTERN_LOCAL-SEL PANEL_C>LOCAL-AUX-OFF PANEL_C>LOCAL-AUX-ON PANEL_C>LOCAL-FORWARD PANEL_C>LOCAL-MVD-OFF PANEL_C>LOCAL-MVD-ON PANEL_C>LOCAL-REVERSE PANEL_C>LOCAL-START PANEL_C>LOCAL-STOP

Source: BACKGND\S04:MODE-SELECT Sink : INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 INT3\S18:BRAKE-HORN INT3\S14:START-UP-AUX INT3\S11:PRIOSEL-3 INT3\S10:PRIOSEL-2 INT3\S15:MVD-ON-OFF INT3\S16:START/STOP INT3\S17:MILL-ON,WR INT3\S12:PRIOSEL-4 INT2\S17:NW2 INT2\S1 Source: BACKGND\S04:MODE-SELECT Sink : PANEL-AFC094\S06:LED-CONTROL2 INT3\S14:START-UP-AUX INT3\S10:PRIOSEL-2 INT3\S22:STATUS-INDIC INT3\S12:PRIOSEL-4 Source: INT3\S02:PANEL-INPUT1 Sink : INT3\S10:PRIOSEL-2 Source: INT3\S02:PANEL-INPUT1 Sink : INT3\S10:PRIOSEL-2 Source: INT3\S03:PANEL-INPUT2 Sink : INT3\S10:PRIOSEL-2 Source: INT3\S02:PANEL-INPUT1 Sink : INT3\S10:PRIOSEL-2 Source: INT3\S02:PANEL-INPUT1 Sink : INT3\S10:PRIOSEL-2 Source: INT3\S03:PANEL-INPUT2 Sink : INT3\S10:PRIOSEL-2 Source: INT3\S03:PANEL-INPUT2 Sink : INT3\S10:PRIOSEL-2 Source: INT3\S03:PANEL-INPUT2 Sink : INT3\S10:PRIOSEL-2

OUTPUT CROSSREFERENCE: INTERN_LOCAL-AUX-OFF INTERN_LOCAL-AUX-ON INTERN_LOCAL-FORWARD INTERN_LOCAL-MVD-OFF INTERN_LOCAL-MVD-ON INTERN_LOCAL-REVERSE INTERN_LOCAL-START INTERN_LOCAL-STOP

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S10:PRIOSEL-2 INT3\S13:START-UP-AUX INT3\S10:PRIOSEL-2 INT3\S13:START-UP-AUX INT3\S10:PRIOSEL-2 INT3\S12:PRIOSEL-4 INT3\S10:PRIOSEL-2 INT3\S15:MVD-ON-OFF INT3\S10:PRIOSEL-2 INT3\S15:MVD-ON-OFF INT3\S10:PRIOSEL-2 INT3\S12:PRIOSEL-4 INT3\S10:PRIOSEL-2 INT3\S12:PRIOSEL-4 INT3\S10:PRIOSEL-2 INT3\S12:PRIOSEL-4

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S010 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S10:PRIOSEL-2 PRIORITY MODE LOCAL


released:

A4 E

133

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

2 & LCB_C>LCB-AUX-OFF B 3 & LCB_C>LCB-MVD-ON B 4 & LCB_C>LCB-MVD-OFF 5 & LCB_C>LCB-START B 6 INTERN_CREEPING LCB_C>LCB-START-EXT B 8 & LCB_C>LCB-STOP B 9 & LCB_C>LCB-STOP-EXT B LCB_C>LCB-FASTER B 12 & LCB_C>LCB-SLOWER B 13 & LCB_C>LCB-FORWARD LCB_C>LCB-REVERSE o B 14 & o B 15 & LCB_C>LCB-CREEPING B 16 & LCB_C>LCB-INCHING B 17 & LCB_C>LCB-NORMAL B 18 INTERN_CENTRAL-SEL MODBUS-O_C>HV-BREAKERS-ON B 19 & MODBUS-O_C>MILLDR-ON 20 >=1 INTERN_INCHING LCB_C>LCB-MAN-LOWER LCB_LCB-MANLOW-EXT B INTERN_-WRe-CONTROL INTERN_MILL-RUNNING 23 >=1 o o B 24 o o & INTERN_NORMAL B LCB_C>LCB-RE-ROCKING B INPUT CROSSREFERENCE: INTERN_-WRe-CONTROL B 21 >=1 B 22 & INTERN_CENTRAL-MILL & INTERN_LCB-NORMAL INTERN_LCB-INCHING INTERN_LCB-CREEPING INTERN_LCB-REVERSE INTERN_LCB-FORWARD INTERN_LCB-SLOWER B 11 & INTERN_LCB-FASTER INTERN_LCB-STOP 10 >=1 B & INTERN_LCB-START B 7 >=1 INTERN_LCB-MVD-OFF INTERN_LCB-MVD-ON INTERN_LCB-AUX-OFF

INTERN_CENTRAL-MVD-O

INTERN_LCB-MAN-LOWER

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_LCB-RE-ROCKIN

INTERN_CENTRAL-SEL

INTERN_CREEPING

INTERN_INCHING

INTERN_LCB-SEL

INTERN_MILL-RUNNING

Source: INT3\S17:MILL-ON,WR Sink : INT1\S07:SUMMARY-F/W INT3\S08:WARN-EVENT9 INT3\S11:PRIOSEL-3 INT3\S05:FAULT-EVENT6 INT3\S16:START/STOP INT3\S17:MILL-O INT3\S12:PRIOSEL-4 Source: BACKGND\S04:MODE-SELECT Sink : INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 INT3\S18:BRAKE-HORN INT3\S14:START-UP-AUX INT3\S11:PRIOSEL-3 INT3\S10:PRIOSEL-2 INT3\S15:MVD-ON-OFF INT3\S16:START/STOP INT3\S17:MILL-ON,WR INT3\S12:PRIOSEL-4 INT2\S17:NW2 INT2\S1 Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT2\S14:START-PARS INT2\S23:EXCITAT-1 INT2\S17:NW2 Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S19:INCH-ANGLE INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT2\S14:START-PARS INT2\S32:ANGLECAPTUR Source: BACKGND\S04:MODE-SELECT Sink : INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 PANEL-AFC094\S04:LED:F1-F16 INT3\S14:START-UP-AUX INT3\S11:PRIO INT3\S22:STATUS-INDIC INT3\S16:START/STOP INT3\S21:RESET/LT INT3\S12:PRIOSEL-4 Source: INT3\S22:STATUS-INDIC

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S011 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S11:PRIOSEL-3 PRIORITY MODES LCB / REMOTE


released:

A4 E

134

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

LCB_C>LCB-AUX-OFF

Source: Sink : LCB_C>LCB-AUX-ON Source: Sink : LCB_C>LCB-CREEPING Source: Sink : LCB_C>LCB-FASTER Source: Sink : LCB_C>LCB-FORWARD Source: Sink : LCB_C>LCB-INCHING Source: Sink : LCB_C>LCB-MAN-LOWER Source: Sink : LCB_C>LCB-MVD-OFF Source: Sink : LCB_C>LCB-MVD-ON Source: Sink : LCB_C>LCB-NORMAL Source: Sink : LCB_C>LCB-RE-ROCKING Source: Sink : LCB_C>LCB-REVERSE Source: Sink : LCB_C>LCB-SLOWER Source: Sink : LCB_C>LCB-START Source: Sink : LCB_C>LCB-START-EXT Source: Sink : LCB_C>LCB-STOP Source: Sink : LCB_C>LCB-STOP-EXT Source: Sink : LCB_LCB-MANLOW-EXT Source: Sink : MODBUS-O_C>HV-BREAKERS-ON Source: Sink : MODBUS-O_C>MILLDR-ON Source: Sink : OUTPUT CROSSREFERENCE: INTERN_CENTRAL-MILL-ON INTERN_CENTRAL-MVD-ON INTERN_LCB-AUX-OFF INTERN_LCB-AUX-ON INTERN_LCB-CREEPING INTERN_LCB-FASTER INTERN_LCB-FORWARD INTERN_LCB-INCHING INTERN_LCB-MAN-LOWER INTERN_LCB-MVD-OFF INTERN_LCB-MVD-ON

INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3\S04:LCB-IN1 INT3\S11:PRIOSEL-3 INT3-MODBUS\S01:MODBUS-OUT1 INT3\S11:PRIOSEL-3 INT3-MODBUS\S01:MODBUS-OUT1 INT3\S11:PRIOSEL-3

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_LCB-NORMAL INTERN_LCB-RE-ROCKING INTERN_LCB-REVERSE INTERN_LCB-SLOWER INTERN_LCB-START INTERN_LCB-STOP

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S11:PRIOSEL-3 INT3\S16:START/STOP INT3\S11:PRIOSEL-3 INT3\S15:MVD-ON-OFF INT3\S11:PRIOSEL-3 INT3\S13:START-UP-AUX INT3\S11:PRIOSEL-3 INT3\S13:START-UP-AUX INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT3\S11:PRIOSEL-3 LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 INT3\S15:MVD-ON-OFF INT3\S11:PRIOSEL-3 INT3\S15:MVD-ON-OFF INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT3\S11:PRIOSEL-3 LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S011 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S11:PRIOSEL-3 PRIORITY MODES LCB / REMOTE


released:

A4 E

135

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to t is prohibited; it is civilly and criminally actionable.

INTERN_LOCAL-STOP INTERN_LCB-STOP 3 & B 4 & INTERN_INCHING-STOP-2 logic 1 = stop B

2 >=1 INTERN_CC:STOP 5 >=1

INTERN_INCHING-STOP B 6 & B 8 B 7 RSFF S R Q & 9 >=1 B INTERN_SLOWER 10 & B 12 >=1 INTERN_FASTER 11 B & 13 >=1 B 14 INTERN_CREEP-STOP

INTERN_LOCAL-SEL PANEL_C>LOCAL-SLOWER INTERN_LCB-SLOWER PANEL_C>LOCAL-FASTER B INTERN_LCB-FASTER INTERN_CENTRAL-SEL MODBUS-O_C>REVERSE INTERN_LOCAL-REVERSE INTERN_LCB-REVERSE B INTERN_-WRe 15 MS o / 1s T /T\ S 16 MS / T /T\ S 17 MS / T /T\ S 18 >=1 o B

&

20 RSFF S

1S

1B 1s INTERN_LOCAL-FORWARD

19 INTERN_LCB-FORWARD INTERN_LCB-INCHING INTERN_LCB-SEL 1S 21 MS / T /T\ S o 0B B INTERN_LCB-NORMAL 24 & MODBUS-O_C>Local-Release B o B 25 >=1 R Q < 27 & INTERN_LCB-CREEPING R B < 28 >=1 o B < < 31 >=1 INTERN_INCH-OR-CREE B ParamGrp_TestFor1 0B INTERN_[nx] 80% = 9.043 rpm ParamGrp_ChangeCont-Limit 35 THRUL X UPLIM 36 38 1B & 39 >=1 40 SWI SELX1 30 RSFF S R Q INTERN_CREEPING B Q INTERN_NORMAL 33 >=1 34 RSFF S INTERN_INCHING 26 RSFF S B B 29 >=1 22 >=1 B o B & R Q INTERN_REVERSE

INTERN_START-PI*TAST

B 23 >=1

32 &

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S012 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S12:PRIOSEL-4 PRIORITY MODE (SLOW/FAST;REVERSE;INCHING.)

A4 E

136

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

ParamGrp_Control-Delay 1S ParamGrp_Softw-low-speed 0B ParamGrp_TestFor2 0B INPUT CROSSREFERENCE: INTERN_-WRe INTERN_-WRe-CONTROL

T T/ S o B X0 B X1 B INTERN_SW-Change-ov

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_CENTRAL-SEL

INTERN_INCHING-STOP-2 INTERN_LCB-CREEPING INTERN_LCB-FASTER INTERN_LCB-FORWARD INTERN_LCB-INCHING INTERN_LCB-NORMAL INTERN_LCB-REVERSE INTERN_LCB-SEL

INTERN_LCB-SLOWER INTERN_LCB-START INTERN_LCB-STOP INTERN_LOCAL-FORWARD INTERN_LOCAL-REVERSE INTERN_LOCAL-SEL INTERN_LOCAL-START INTERN_LOCAL-STOP INTERN_START-PI*TAST INTERN_[nx]

MODBUS-O_C>Local-Release

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

Source: Sink : MODBUS-O_C>REVERSE Source: Sink : PANEL_C>LOCAL-FASTER Source: Sink : PANEL_C>LOCAL-SLOWER Source: Sink : ParamGrp_ChangeCont-Limit Source: Sink : ParamGrp_Control-Delay Source: Sink : ParamGrp_Softw-low-speed Source: Sink : ParamGrp_TestFor1 Source: Sink : ParamGrp_TestFor2 Source: Sink : OUTPUT CROSSREFERENCE: INTERN_CC:START INTERN_CC:STOP INTERN_CREEP-STOP INTERN_CREEPING

INT1\S07:SUMMARY-F/W INT1\S11:FAULT-EVENT4 INT1\S07:SUMMARY-F/W INT1\S06:DET-UE/IE,UN INT3\S19:INCH-ANGLE INT3\S12:PRIOSEL-4 INT2\S06:INTEG INT3\S17:MILL-ON,WR INT1\S07:SUMMARY-F/W INT3\S08:WARN-EVENT9 INT3\S11:PRIOSEL-3 INT3\S05:FAULT-EVENT6 INT3\S16:START/STOP INT3\S17:MILL-O INT3\S12:PRIOSEL-4 BACKGND\S04:MODE-SELECT INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 INT3\S18:BRAKE-HORN INT3\S14:START-UP-AUX INT3\S11:PRIOSEL-3 INT3\S10:PRIOSEL-2 INT3\S15:MVD-ON-OFF INT3\S16:START/STOP INT3\S17:MILL-ON,WR INT3\S12:PRIOSEL-4 INT2\S17:NW2 INT2\S1 INT3\S20:INCH-ANGLE INT3\S12:PRIOSEL-4 INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 BACKGND\S04:MODE-SELECT INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 PANEL-AFC094\S04:LED:F1-F16 INT3\S14:START-UP-AUX INT3\S11:PRIO INT3\S22:STATUS-INDIC INT3\S16:START/STOP INT3\S21:RESET/LT INT3\S12:PRIOSEL-4 INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT3\S10:PRIOSEL-2 INT3\S12:PRIOSEL-4 INT3\S10:PRIOSEL-2 INT3\S12:PRIOSEL-4 BACKGND\S04:MODE-SELECT PANEL-AFC094\S06:LED-CONTROL2 INT3\S14:START-UP-AUX INT3\S10:PRIOSEL-2 INT3\S22:STATUS-INDIC INT3\S12:PRIOSEL-4 INT3\S10:PRIOSEL-2 INT3\S12:PRIOSEL-4 INT3\S10:PRIOSEL-2 INT3\S12:PRIOSEL-4 INT3\S16:START/STOP INT3\S17:MILL-ON,WR BACKGND\S04:MODE-SELECT INT3\S22:STATUS-INDIC INT3\S12:PRIOSEL-4 INT2\S13:NX INT1\S11:FAULT-EVENT4 INT3\S22:STATUS-INDIC INT3\S12:PRIOSEL-4 INT2\S15:NX-LIMITS INT2\S26:EXCITAT-4 INT2\S13:NX INT2\ INT2\S04:INTEG1 INT3-MODBUS\S01:MODBUS-OUT1 INT3\S03:PANEL-INPUT2 INT3\S12:PRIOSEL-4 INT3-MODBUS\S01:MODBUS-OUT1 INT3\S12:PRIOSEL-4 INT3\S03:PANEL-INPUT2 INT3\S12:PRIOSEL-4 INT3\S03:PANEL-INPUT2 INT3\S12:PRIOSEL-4 ? INT3\S12:PRIOSEL-4 ? INT3\S12:PRIOSEL-4 ? INT3\S12:PRIOSEL-4 ? INT3\S12:PRIOSEL-4 ? INT3\S12:PRIOSEL-4

Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S12:PRIOSEL-4 INT3\S16:START/STOP INT3\S12:PRIOSEL-4 INT3\S16:START/STOP INT3\S12:PRIOSEL-4 INT3\S18:BRAKE-HORN INT3\S16:START/STOP INT3\S12:PRIOSEL-4 LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT2\S14:START-PARS INT2\S23:EXCITAT-1 INT2\S17:NW2

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S012 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S12:PRIOSEL-4 PRIORITY MODE (SLOW/FAST;REVERSE;INCHING.)

A4 E

137

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_INCHING

INTERN_INCHING-STOP INTERN_NORMAL INTERN_REVERSE

INTERN_SLOWER INTERN_SW-Change-over-1

Sink : INT3\S18:BRAKE-HORN INT3\S12:PRIOSEL-4 INT2\S14:START-PARS Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S19:INCH-ANGLE INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT2\S14:START-PARS INT2\S32:ANGLECAPTUR Source: INT3\S12:PRIOSEL-4 Sink : INT3\S16:START/STOP INT3\S17:MILL-ON,WR Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 Source: INT3\S12:PRIOSEL-4 Sink : INT1\S13:PHASE-SHIFT2 LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S03:STATUS-1 INT1\S12:PHASE-SHIFT1 PANEL-AFC094\S05:LED-CO INT2\S14:START-PARS INT2\S19:ROCK-STOP INT2\S18:CONTROL-N INT2\S13:NX INT2\S17:NW2 Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S05:LED-CONTROL1 INT3\S19:INCH-ANGLE INT2\S16:NW1 Source: INT3\S12:PRIOSEL-4 Sink : INT1\S14:PHASE-SHIFT3 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIFT1 INT2\S34:TRANSFER/30 INT2\S23:EXCITAT-1 INT2\S13:NX INT2\S09:INTEG6 INT2\S08:INTEG5 INT2\S07:INTEG4 INT2\S06:INTEG3 INT2\S05:INTEG2 INT2\S04:INTEG1

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S012 F01/K01


doc. type format language sht. nr.

3
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S12:PRIOSEL-4 PRIORITY MODE (SLOW/FAST;REVERSE;INCHING.)

A4 E

138

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

MODBUS-O_C>AUX-ON/OFF B MODBUS-O_FB>AUX-AVAILABLE 2 MS o / 500ms T /T\ MS 3 MS o / 500MS T /T\ MS INTERN_LOCAL-AUX-OFF INTERN_LCB-AUX-OFF 5 MS o / 20S T /T\ S B B

&

7 RSFF S

6 >=1

R Q < 8 TRAN B 9 TRAN B INTERN_AUX-ON MODBUS-I_C/AUX-ON/O INTERN_AUX-RUNNING

MODBUS-O_FB>AUX-RUNNING

INPUT CROSSREFERENCE: INTERN_LCB-AUX-OFF INTERN_LCB-AUX-ON

Source: Sink : Source: Sink : INTERN_LOCAL-AUX-OFF Source: Sink : INTERN_LOCAL-AUX-ON Source: Sink : MODBUS-O_C>AUX-ON/OFF Source: Sink : MODBUS-O_FB>AUX-AVAILABLE Source: Sink : MODBUS-O_FB>AUX-RUNNING Source: Sink : OUTPUT CROSSREFERENCE: INTERN_AUX-ON INTERN_AUX-RUNNING MODBUS-I_C/AUX-ON/OFF

INT3\S11:PRIOSEL-3 INT3\S13:START-UP-AUX INT3\S11:PRIOSEL-3 INT3\S13:START-UP-AUX INT3\S10:PRIOSEL-2 INT3\S13:START-UP-AUX INT3\S10:PRIOSEL-2 INT3\S13:START-UP-AUX INT3-MODBUS\S01:MODBUS-OUT1 INT3\S13:START-UP-AUX INT3-MODBUS\S01:MODBUS-OUT1 INT3\S08:WARN-EVENT9 INT3\S13:START-UP-AUX INT3-MODBUS\S01:MODBUS-OUT1 INT3\S13:START-UP-AUX

Source: Sink : Source: Sink : Source: Sink :

INT3\S13:START-UP-AUX PANEL-AFC094\S06:LED-CONTROL2 INT3\S14:START-UP-AUX INT3\S13:START-UP-AUX INT3\S13:START-UP-AUX INT3\S16:START/STOP BACKGND\S03:COOL-MONITOR PANEL-AFC094\S06:LED-CONTROL2 INT3\S15:MVD-ON-OFF INT3\S17:MILL-ON,WR INT3\S13:START-UP-AUX INT3-MODBUS\S04:COMMAND-1

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S013 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S13:START-UP-AUX AUXILIARIES ON/OFF


released:

A4 E

139

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_LOCAL-SEL INTERN_C>SERVICE MODBUS-O_C>CCcool-release INTERN_AUX-ON B INTERN_F/COOL-LEVEL INTERN_F/COOL-FLOW-CONV B MODBUS-O_F>COOL-PUMP1 logic 0 = FAULT INTERN_W/COOL-PRESS 2s / T T/ S MODBUS-O_F>COOL-PUMP2 o 4 OND 5 SWI SELX1 X0 o X1 B B 3 >=1 7 SWI SELX1 o 2 >=1

o o B

6 >=1 0B 9 >=1 X0 X1 B 11 SWI SELX1 8 OFD 2s \ T T\ S

MODBUS-I_C/CYCLO-PUM

o 14 OND o / 3600s T T/ S B 10 >=1 15 RSFF S o R Q < 16 MS / T /T\ MS o B 17 CNT CLK/ 0B

X0 X1 B

2s

12 OFD \ T T\ S

MODBUS-I_C/CYCLO-PUM 13 >=1 INTERN_COOL-PUMP1or B

100ms ParamGrp_TIME-PUMP-CHANGE 00A8H

R N# >=N < 18 RSFF S R Q 19 OND / < 1s T T/ S B < 20 &

INTERN_COOL-PUMP-CHA

INPUT CROSSREFERENCE: INTERN_AUX-ON INTERN_C>SERVICE INTERN_CENTRAL-SEL

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_F/COOL-FLOW-CONV INTERN_F/COOL-LEVEL INTERN_LCB-SEL

INTERN_LOCAL-SEL

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

Source: Sink : INTERN_W/COOL-PRESS Source: Sink : MODBUS-O_C>CCcool-release Source: Sink : MODBUS-O_F>COOL-PUMP1 Source: Sink : MODBUS-O_F>COOL-PUMP2 Source: Sink : ParamGrp_TIME-PUMP-CHANGE Source: Sink : OUTPUT CROSSREFERENCE: INTERN_COOL-PUMP-CHANGE

INT3\S13:START-UP-AUX PANEL-AFC094\S06:LED-CONTROL2 INT3\S14:START-UP-AUX INT3\S13:START-UP-AUX INT3\S03:PANEL-INPUT2 BACKGND\S04:MODE-SELECT PANEL-AFC094\S06:LED-CONTROL2 INT3\S14:START-UP-AUX BACKGND\S04:MODE-SELECT INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 INT3\S18:BRAKE-HORN INT3\S14:START-UP-AUX INT3\S11:PRIOSEL-3 INT3\S10:PRIOSEL-2 INT3\S15:MVD-ON-OFF INT3\S16:START/STOP INT3\S17:MILL-ON,WR INT3\S12:PRIOSEL-4 INT2\S17:NW2 INT2\S1 BACKGND\S03:COOL-MONITOR INT3\S14:START-UP-AUX INT3\S05:FAULT-EVENT6 BACKGND\S03:COOL-MONITOR INT3\S14:START-UP-AUX INT3\S05:FAULT-EVENT6 BACKGND\S04:MODE-SELECT INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 PANEL-AFC094\S04:LED:F1-F16 INT3\S14:START-UP-AUX INT3\S11:PRIO INT3\S22:STATUS-INDIC INT3\S16:START/STOP INT3\S21:RESET/LT INT3\S12:PRIOSEL-4 BACKGND\S04:MODE-SELECT PANEL-AFC094\S06:LED-CONTROL2 INT3\S14:START-UP-AUX INT3\S10:PRIOSEL-2 INT3\S22:STATUS-INDIC INT3\S12:PRIOSEL-4 BACKGND\S03:COOL-MONITOR INT3\S14:START-UP-AUX INT3\S07:WARN-EVENT8 INT3-MODBUS\S01:MODBUS-OUT1 INT3\S14:START-UP-AUX INT3-MODBUS\S08:MODBUS-OUT2 INT3\S14:START-UP-AUX INT3-MODBUS\S08:MODBUS-OUT2 INT3\S14:START-UP-AUX ? INT3\S14:START-UP-AUX

Source: Sink : INTERN_COOL-PUMP1or2-ON Source: Sink : MODBUS-I_C/CYCLO-PUMP1-ON Source: Sink : MODBUS-I_C/CYCLO-PUMP2-ON Source: Sink :

INT3\S14:START-UP-AUX INT3\S14:START-UP-AUX INT3\S14:START-UP-AUX BACKGND\S03:COOL-MONITOR INT3\S14:START-UP-AUX INT3-MODBUS\S04:COMMAND-1 INT3\S14:START-UP-AUX INT3\S14:START-UP-AUX INT3-MODBUS\S04:COMMAND-1 INT3\S14:START-UP-AUX

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S014 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S14:START-UP-AUX CYCLOCONVERTER COOLING PUMPS


released:

A4 E

140

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_LCB-MVD-ON INTERN_CENTRAL-MVD-ON B INTERN_MVD1-OFF INTERN_LOCAL-MVD-OFF INTERN_LCB-MVD-OFF 3 UDA327:3_S>MVD1-FEEDBACK o B 4 UDA327:3_S>MVD2-FEEDBACK o B 5 o INTERN_CENTRAL-SEL B UDA327:3_S>MVD1-FAULT UDA327:3_S>MVD2-FAULT o o & & & B 6 >=1

7 RSFF S

R B Q 8 OND 1500ms / T T/ MS < 9 OND 2S / T T/ S 4000MS 10 OND / T T/ MS < INTERN_MVD2-ON CB-Rotor INTERN_MVD1-ON CB-Stator

INTERN_MVD-ON

11 TRAN B 12 TRAN B INPUT CROSSREFERENCE: INTERN_AUX-RUNNING INTERN_CENTRAL-MVD-ON INTERN_CENTRAL-SEL

INTERN_F/MVD-FEEDBA

INTERN_F/MVD2-FEEDBA

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_LCB-MVD-OFF INTERN_LCB-MVD-ON INTERN_LOCAL-MVD-OFF INTERN_LOCAL-MVD-ON INTERN_MVD1-OFF UDA327:3_S>MVD1-FAULT UDA327:3_S>MVD1-FEEDBACK

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

UDA327:3_S>MVD2-FAULT UDA327:3_S>MVD2-FEEDBACK

INT3\S13:START-UP-AUX INT3\S16:START/STOP BACKGND\S03:COOL-MONITOR PANEL-AFC094\S06:LED-CONTROL2 INT3\S15:MVD-ON-OFF INT3\S17:MILL-ON,WR INT3\S11:PRIOSEL-3 INT3\S15:MVD-ON-OFF BACKGND\S04:MODE-SELECT INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 INT3\S18:BRAKE-HORN INT3\S14:START-UP-AUX INT3\S11:PRIOSEL-3 INT3\S10:PRIOSEL-2 INT3\S15:MVD-ON-OFF INT3\S16:START/STOP INT3\S17:MILL-ON,WR INT3\S12:PRIOSEL-4 INT2\S17:NW2 INT2\S1 INT3\S11:PRIOSEL-3 INT3\S15:MVD-ON-OFF INT3\S11:PRIOSEL-3 INT3\S15:MVD-ON-OFF INT3\S10:PRIOSEL-2 INT3\S15:MVD-ON-OFF INT3\S10:PRIOSEL-2 INT3\S15:MVD-ON-OFF INT1\S07:SUMMARY-F/W INT3\S15:MVD-ON-OFF INT1\S07:SUMMARY-F/W INT1\S02:TRANSF>20/40 INT3-MODBUS\S03:STATUS-1 INT1\S08:FAULT-EVENT1 INT3\S15:MVD-ON-OFF INT1\S02:TRANSF>20/40 INT3-MODBUS\S03:STATUS-1 INT1\S07:SUMMARY-F/W INT3\S15:MVD-ON-OFF INT1\S02:TRANSF>20/40 INT3-MODBUS\S03:STATUS-1 INT1\S08:FAULT-EVENT1 INT3\S15:MVD-ON-OFF INT1\S02:TRANSF>20/40 INT3-MODBUS\S03:STATUS-1 INT3\S15:MVD-ON-OFF

OUTPUT CROSSREFERENCE: INTERN_F/MVD-FEEDBACK INTERN_F/MVD2-FEEDBACK INTERN_MVD-ON INTERN_MVD1-ON INTERN_MVD2-ON

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S15:MVD-ON-OFF INT1\S08:FAULT-EVENT1 INT3\S15:MVD-ON-OFF INT1\S10:FAULT-EVENT3 INT3\S15:MVD-ON-OFF PANEL-AFC094\S06:LED-CONTROL2 INT3\S15:MVD-ON-OFF INT3\S16:START/STOP INT3\S17:MILL-ON,WR INT3\S15:MVD-ON-OFF INT1\S07:SUMMARY-F/W PANEL-AFC094\S06:LED-CONTROL2 INT3\S15:MVD-ON-OFF INT3\S15:MVD-ON-OFF INT1\S07:SUMMARY-F/W INT3\S15:MVD-ON-OFF

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-11-24

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S015 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S15:MVD-ON-OFF MEDIUM VOLTAGE DEVICE ON/OFF


released:

A4 E

141

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_StandStill-ON 1 = Stand Still ParamGrp_MoveFault-Delay1 4S ParamGrp_MoveFault-Delay2 500MS INTERN_MILL-RTS INTERN_MVD-ON INTERN_CENTRAL-MILL-ON INTERN_CC:START

o / B T

OND 3 OFD T/ S T T\ MS o 5 & \

INTERN_F/Mill-Moving

4 >=1 B

MODBUS-O_NonCritricalStop MODBUS-O_ProcessInterlock 6 MS o / 100ms T /T\ MS INTERN_AUX-RUNNING INTERN_Arcnet-Fault 7 o INTERN_CC:STOP B INTERN_INCHING-STOP 8 OND INTERN_CREEP-STOP ParamGrp_CreepStop-Mant 1700MS / T T/ MS 100ms / T /T\ MS 11 o 10 MS o / 100ms T /T\ MS o 12 MS / T /T\ MS & 9 MS &

o o B 14 >=1 o o

15 RSFF S

B 13 &

100ms

R B B < Q 15s

ParamGrp_time-HORN-sound 15S 20 & B 21 INTERN_CENTRAL-SEL o B 22 & INTERN_LCB-SEL B 23 & & 25 >=1

16 OND / T T/ S 17 MS& / T /T&\ S 18 TRAN B 19 TRAN B

INTERN_START

INTERN_HORN-start-up INTERN_START-PI*TAS MODBUS-I_Mill-start

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

B 24 & B 27 TRAN B INPUT CROSSREFERENCE: INTERN_-WRe-CONTROL B

26 RSFF S R Q INTERN_STOP INTERN_STOP-RESET

INTERN_AUX-RUNNING INTERN_Arcnet-Fault INTERN_CC:START INTERN_CC:STOP

Source: INT3\S17:MILL-ON,WR Sink : INT1\S07:SUMMARY-F/W INT3\S08:WARN-EVENT9 INT3\S11:PRIOSEL-3 INT3\S05:FAULT-EVENT6 INT3\S16:START/STOP INT3\S17:MILL-O INT3\S12:PRIOSEL-4 Source: INT3\S13:START-UP-AUX Sink : INT3\S16:START/STOP BACKGND\S03:COOL-MONITOR PANEL-AFC094\S06:LED-CONTROL2 INT3\S15:MVD-ON-OFF INT3\S17:MILL-ON,WR Source: INT1\S09:FAULT-EVENT2 Sink : INT1\S09:FAULT-EVENT2 INT3\S16:START/STOP Source: INT3\S12:PRIOSEL-4 Sink : INT3\S16:START/STOP Source: INT3\S12:PRIOSEL-4 Sink : INT3\S16:START/STOP

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-06-02

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S016 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S16:START/STOP INTERNAL: START /STOP/ INCH-START


released:

A4 E

142

3BHS135699

INTERN_CREEP-STOP INTERN_INCHING-STOP INTERN_LCB-SEL

INTERN_MILL-RTS INTERN_MVD-ON INTERN_StandStill-ON MODBUS-I_C/Brake-normal MODBUS-O_NonCritricalStop MODBUS-O_ProcessInterlock ParamGrp_CreepStop-Mant ParamGrp_MoveFault-Delay1 ParamGrp_MoveFault-Delay2 ParamGrp_time-HORN-sound

: INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 INT3\S18:BRAKE-HORN INT3\S14:START-UP-AUX INT3\S11:PRIOSEL-3 INT3\S10:PRIOSEL-2 INT3\S15:MVD-ON-OFF INT3\S16:START/STOP INT3\S17:MILL-ON,WR INT3\S12:PRIOSEL-4 INT2\S17:NW2 INT2\S1 Source: INT3\S12:PRIOSEL-4 Sink : INT3\S18:BRAKE-HORN INT3\S16:START/STOP Source: INT3\S12:PRIOSEL-4 Sink : INT3\S16:START/STOP INT3\S17:MILL-ON,WR Source: BACKGND\S04:MODE-SELECT Sink : INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 PANEL-AFC094\S04:LED:F1-F16 INT3\S14:START-UP-AUX INT3\S11:PRIO INT3\S22:STATUS-INDIC INT3\S16:START/STOP INT3\S21:RESET/LT INT3\S12:PRIOSEL-4 Source: INT3\S17:MILL-ON,WR Sink : INT3\S16:START/STOP INT3-MODBUS\S03:STATUS-1 Source: INT3\S15:MVD-ON-OFF Sink : PANEL-AFC094\S06:LED-CONTROL2 INT3\S15:MVD-ON-OFF INT3\S16:START/STOP INT3\S17:MILL-ON,WR Source: INT3\S25:STANDSTILL-L Sink : INT3\S16:START/STOP Source: INT3\S18:BRAKE-HORN Sink : INT3\S16:START/STOP INT3-MODBUS\S04:COMMAND-1 Source: INT3-MODBUS\S01:MODBUS-OUT1 Sink : PANEL-AFC094\S03:PANEL-OUT INT3\S08:WARN-EVENT9 INT3\S16:START/STOP Source: INT3-MODBUS\S08:MODBUS-OUT2 Sink : PANEL-AFC094\S03:PANEL-OUT INT3\S08:WARN-EVENT9 INT3\S16:START/STOP Source: ? Sink : INT3\S16:START/STOP Source: ? Sink : INT3\S16:START/STOP Source: ? Sink : INT3\S16:START/STOP Source: ? Sink : INT3\S16:START/STOP

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

Sink

OUTPUT CROSSREFERENCE: INTERN_F/Mill-Moving INTERN_HORN-start-up INTERN_START INTERN_START-PI*TAST INTERN_STOP INTERN_STOP-RESET MODBUS-I_Mill-start-up

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S16:START/STOP INT3\S05:FAULT-EVENT6 INT3\S16:START/STOP INT3\S16:START/STOP INT3\S18:BRAKE-HORN INT3\S16:START/STOP INT3\S17:MILL-ON,WR INT2\S14:START-PARS INT2\S16:NW1 INT3\S16:START/STOP INT3\S17:MILL-ON,WR BACKGND\S04:MODE-SELECT INT3\S22:STATUS-INDIC INT3\S12:PRIOSEL-4 INT3\S16:START/STOP INT1\S11:FAULT-EVENT4 INT3\S22:STATUS-INDIC INT3\S17:MILL-ON,WR INT2\S19:ROCK-STOP INT2\S16:NW1 INT3\S16:START/STOP INT3\S17:MILL-ON,WR INT3\S16:START/STOP INT3-MODBUS\S03:STATUS-1

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-06-02

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S016 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S16:START/STOP INTERNAL: START /STOP/ INCH-START


released:

A4 E

143

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

o INTERN_CENTRAL-SEL B ParamGrp_CC-start-delay 150S INTERN_&FAULT

>=1 / T

MS

/T\ S o o o B 6 &

INTERN_Block-Start

INTERN_CC:RTS 7 &

MODBUS-O_KNIF-STAT-CLOSED MODBUS-O_KNIF-ROT-CLOSED INTERN_AUX-RUNNING INTERN_MVD-ON 12 o o INTERN_START INTERN_INCHING-STOP 4 MODBUS-O_FB>Brake-release INTERN_BRIDGE INTERN_STOP INTERN_60%-n INTERN_STOP-RESET ParamGrp_RS:WR-DELAY-N<< 9S ParamGrp_RS:WR-DELAY-N>> 15S X1 S T T/ S R Q o B < ParamGrp_REL-WRc-CONTROL 5000MS INTERN_START-PI*TAST ParamGrp_brake-release 5000MS MS ParamGrp_brak-supervision 15000MS 16 o TRAN B PULSE RELEASE FOR ROTOR AND STATOR BLOCK2 : WAITING TIME ACC. TO CONTRACT (10 x 30s STARTS/h) T 14 OND / T T/ 15 OND / T T/ MS < INTERN_F/Brake-rele INTERN_brake-releas T/ MS INTERN_-WRc-CONTROL 13 OND / INTERN_-WRe-CONTROL 8 RSFF S R Q 9 SWI SELX1 X0 11 RSFF S 10 OND / B o B & o 5 >=1 o & B INTERN_MILL-RTS

INPUT CROSSREFERENCE: INTERN_&FAULT INTERN_&WARNING

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_60%-n INTERN_AUX-RUNNING INTERN_BRIDGE INTERN_CENTRAL-SEL

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_INCHING-STOP INTERN_MVD-ON INTERN_START INTERN_START-PI*TAST INTERN_STOP

INT1\S07:SUMMARY-F/W INT1\S07:SUMMARY-F/W INT3\S17:MILL-ON,WR INT1\S07:SUMMARY-F/W INT1\S07:SUMMARY-F/W INT3\S17:MILL-ON,WR INT2\S13:NX INT3\S17:MILL-ON,WR INT2\S15:NX-LIMITS INT2\S14:START-PARS INT3\S13:START-UP-AUX INT3\S16:START/STOP BACKGND\S03:COOL-MONITOR PANEL-AFC094\S06:LED-CONTROL2 INT3\S15:MVD-ON-OFF INT3\S17:MILL-ON,WR INT3\S18:BRAKE-HORN INT3\S18:BRAKE-HORN INT3\S17:MILL-ON,WR BACKGND\S04:MODE-SELECT INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 INT3\S18:BRAKE-HORN INT3\S14:START-UP-AUX INT3\S11:PRIOSEL-3 INT3\S10:PRIOSEL-2 INT3\S15:MVD-ON-OFF INT3\S16:START/STOP INT3\S17:MILL-ON,WR INT3\S12:PRIOSEL-4 INT2\S17:NW2 INT2\S1 INT3\S12:PRIOSEL-4 INT3\S16:START/STOP INT3\S17:MILL-ON,WR INT3\S15:MVD-ON-OFF PANEL-AFC094\S06:LED-CONTROL2 INT3\S15:MVD-ON-OFF INT3\S16:START/STOP INT3\S17:MILL-ON,WR INT3\S16:START/STOP INT3\S17:MILL-ON,WR INT2\S14:START-PARS INT2\S16:NW1 INT3\S16:START/STOP INT3\S17:MILL-ON,WR BACKGND\S04:MODE-SELECT INT3\S22:STATUS-INDIC INT3\S12:PRIOSEL-4 INT3\S16:START/STOP INT1\S11:FAULT-EVENT4 INT3\S22:STATUS-INDIC INT3\S17:MILL-ON,WR INT2\S19:ROCK-STOP INT2\S16:NW1

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-06-01

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S017 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S17:MILL-ON,WR CC-RTS/WR-RELEASE


released:

A4 E

144

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

Sink : Source: Sink : MODBUS-O_KNIF-STAT-CLOSED Source: Sink : ParamGrp_CC-start-delay Source: Sink : ParamGrp_REL-WRc-CONTROL Source: Sink : ParamGrp_RS:WR-DELAY-N<< Source: Sink : ParamGrp_RS:WR-DELAY-N>> Source: Sink : ParamGrp_brak-supervision Source: Sink : ParamGrp_brake-release Source: Sink : MODBUS-O_KNIF-ROT-CLOSED OUTPUT CROSSREFERENCE: INTERN_-WRc-CONTROL

INT3\S17:MILL-ON,WR INT3-MODBUS\S08:MODBUS-OUT2 PANEL-AFC094\S03:PANEL-OUT INT3\S17:MILL-ON,WR INT3-MODBUS\S08:MODBUS-OUT2 PANEL-AFC094\S03:PANEL-OUT INT3\S17:MILL-ON,WR ? INT3\S17:MILL-ON,WR ? INT3\S17:MILL-ON,WR ? INT3\S17:MILL-ON,WR ? INT3\S17:MILL-ON,WR ? INT3\S17:MILL-ON,WR ? INT3\S17:MILL-ON,WR

INTERN_-WRe-CONTROL

INTERN_Block-Start INTERN_CC:RTS INTERN_F/Brake-release INTERN_MILL-RTS INTERN_brake-release

Source: INT3\S17:MILL-ON,WR Sink : INT1\S11:FAULT-EVENT4 INT1\S07:SUMMARY-F/W INT1\S04:DETECT-I> INT3\S19:INCH-ANGLE INT3\S18:BRAKE-HORN INT2\S15:NX-LIMI INT2\S33:FROZENCHARGE INT2\S32:ANGLECAPTUR INT2\S29:AIR-GAP-SUP2 INT2\S28:AIR-GAP-SUP1 Source: INT3\S17:MILL-ON,WR Sink : INT1\S07:SUMMARY-F/W INT3\S08:WARN-EVENT9 INT3\S11:PRIOSEL-3 INT3\S05:FAULT-EVENT6 INT3\S16:START/STOP INT3\S17:MILL-O INT3\S12:PRIOSEL-4 Source: INT3\S17:MILL-ON,WR Sink : INT3\S22:STATUS-INDIC INT3\S17:MILL-ON,WR Source: INT3\S17:MILL-ON,WR Sink : INT3-MODBUS\S03:STATUS-1 INT3\S17:MILL-ON,WR Source: INT3\S17:MILL-ON,WR Sink : INT3\S18:BRAKE-HORN INT2\S03:FAULT-EVENT5 Source: INT3\S17:MILL-ON,WR Sink : INT3\S16:START/STOP INT3-MODBUS\S03:STATUS-1 Source: INT3\S17:MILL-ON,WR Sink : INT3\S18:BRAKE-HORN INT3\S17:MILL-ON,WR

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-06-01

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S017 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S17:MILL-ON,WR CC-RTS/WR-RELEASE


released:

A4 E

145

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

MS& INTERN_CREEPING ParamGrp_HORN-release 1S S 2 MS& INTERN_INCHING / T /T&\ S 3 MS& INTERN_LCB-MAN-LOWER 4 >=1 B T 7 OND / T T/ S INTERN_INCH-OR-CREEP INTERN_brake-release o B 9 OND 10s / T T/ S 10 MS o / 500ms T /T\ MS 11 MS / 500ms T /T\ MS 12 MS o / 500ms T /T\ MS 15 MS o / 500ms T /T\ 14 OND / T T/ S 17 >=1 B ParamGrp_brake-befor-roc 6S S o T /T\ 19 >=1 20 RSFF S INTERN_BRIDGE MS 16 o o o B 18 MS / & 13 >=1 MODBUS-I_C/Brake-qu logic1 = Applied o 8 & /T&\ S B INTERN_HORN MLCB (Relay-1) / T /T&\ S 5 MS& / INTERN_CENTRAL-SEL INTERN_NORMAL / T /T&\

INTERN_LCB-RE-ROCKING

UDA327:3_F>CC:EMERG-STOP

INTERN_F/AIR-GAPS

10s INTERN_-WRc-CONTROL INTERN_CREEP-STOP INTERN_release-brake

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_F/Brake-release R B Q MODBUS-I_C/Brake-no logic0 = Applied

INPUT CROSSREFERENCE: INTERN_-WRc-CONTROL

INTERN_CENTRAL-SEL

INTERN_CREEP-STOP INTERN_CREEPING

INTERN_F/AIR-GAPS INTERN_F/Brake-release

Source: INT3\S17:MILL-ON,WR Sink : INT1\S11:FAULT-EVENT4 INT1\S07:SUMMARY-F/W INT1\S04:DETECT-I> INT3\S19:INCH-ANGLE INT3\S18:BRAKE-HORN INT2\S15:NX-LIMI INT2\S33:FROZENCHARGE INT2\S32:ANGLECAPTUR INT2\S29:AIR-GAP-SUP2 INT2\S28:AIR-GAP-SUP1 Source: BACKGND\S04:MODE-SELECT Sink : INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 INT3\S18:BRAKE-HORN INT3\S14:START-UP-AUX INT3\S11:PRIOSEL-3 INT3\S10:PRIOSEL-2 INT3\S15:MVD-ON-OFF INT3\S16:START/STOP INT3\S17:MILL-ON,WR INT3\S12:PRIOSEL-4 INT2\S17:NW2 INT2\S1 Source: INT3\S12:PRIOSEL-4 Sink : INT3\S18:BRAKE-HORN INT3\S16:START/STOP Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT2\S14:START-PARS INT2\S23:EXCITAT-1 INT2\S17:NW2 Source: INT2\S31:AIR-GAP-MON2 Sink : INT3\S18:BRAKE-HORN Source: INT3\S17:MILL-ON,WR Sink : INT3\S18:BRAKE-HORN INT2\S03:FAULT-EVENT5

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

05-12-06

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S018 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S18:BRAKE-HORN MECHANICAL BRAKE CONTROL /HORN CONTROL

A4 E

146

3BHS135699

INTERN_INCHING

INTERN_LCB-MAN-LOWER INTERN_LCB-RE-ROCKING INTERN_NORMAL INTERN_brake-release INTERN_release-brake MODBUS-O_S>HORN-RELEASE ParamGrp_HORN-release ParamGrp_brake-befor-roc UDA327:3_F>CC:EMERG-STOP

Sink : INT3\S18:BRAKE-HORN INT3\S12:PRIOSEL-4 INT2\S14:START-PARS Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S19:INCH-ANGLE INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT2\S14:START-PARS INT2\S32:ANGLECAPTUR Source: INT3\S11:PRIOSEL-3 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S18:BRAKE-HORN Source: INT3\S11:PRIOSEL-3 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S18:BRAKE-HORN Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 Source: INT3\S17:MILL-ON,WR Sink : INT3\S18:BRAKE-HORN INT3\S17:MILL-ON,WR Source: INT3\S19:INCH-ANGLE Sink : INT3\S18:BRAKE-HORN Source: INT3-MODBUS\S08:MODBUS-OUT2 Sink : INT3\S18:BRAKE-HORN Source: ? Sink : INT3\S18:BRAKE-HORN Source: ? Sink : INT3\S18:BRAKE-HORN Source: INT1\S02:TRANSF>20/40 Sink : INT1\S10:FAULT-EVENT3 INT3\S18:BRAKE-HORN

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

OUTPUT CROSSREFERENCE: INTERN_BRIDGE INTERN_HORN

Source: Sink : Source: Sink : MODBUS-I_C/Brake-normal Source: Sink : MODBUS-I_C/Brake-quick-ap Source: Sink :

INT3\S18:BRAKE-HORN INT3\S18:BRAKE-HORN INT3\S17:MILL-ON,WR INT3\S18:BRAKE-HORN LCB-AFC094\S02:TRANS-DO INT3\S18:BRAKE-HORN INT3\S16:START/STOP INT3-MODBUS\S04:COMMAND-1 INT3\S18:BRAKE-HORN INT3-MODBUS\S04:COMMAND-1

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

05-12-06

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S018 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S18:BRAKE-HORN MECHANICAL BRAKE CONTROL /HORN CONTROL

A4 E

147

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

ParamGrp_Pole-count0I ParamGrp_Inching-angle 72I INTERN_INCHING INTERN_-WRe INTERN_SLOWER 0% -80% 2 SWI SELX1 X0 X1 % 3 SWI SELX1 X0 X1 % o B 4 ADD +1 0% 1 & 5 SWI SELX1 X0

X1 I

INTERN_pole-counter 7 MULT X Y X*Y I

INTERN_FASTER 0% 80%

+2 %

X1 %

ParamGrp_Inching-limit 100.00000% ParamGrp_Inching-MinAngle 16.66870%

8 INT-I + 0% IC o SIC 0.05% T0/TI UPLIM LOLIM + 9 COMPW X X=Y Y X>Y 10 ADD +1 o +2 % 11 X Y 12 0% 13 25% X Y COMPW X=Y X>Y 15 RSFF S 14 MS o / 100ms T /T\ MS R Q o B < 16 & X Y COMPW X=Y X>Y INTERN_INCHING-STOP COMPW X=Y X>Y INTERN_release-brak INTERN_INCHING-STOP

INTERN_i-inching-ang

ParamGrp_inch-3POLES-REA 0.87891%

INTERN_76-poles-reached INTERN_-WRc-CONTROL

ParamGrp_+360degr-disable 0B

INPUT CROSSREFERENCE: INTERN_-WRc-CONTROL

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

Source: INT3\S17:MILL-ON,WR Sink : INT1\S11:FAULT-EVENT4 INT1\S07:SUMMARY-F/W INT1\S04:DETECT-I> INT3\S19:INCH-ANGLE INT3\S18:BRAKE-HORN INT2\S15:NX-LIMI INT2\S33:FROZENCHARGE INT2\S32:ANGLECAPTUR INT2\S29:AIR-GAP-SUP2 INT2\S28:AIR-GAP-SUP1 INTERN_-WRe Source: INT1\S07:SUMMARY-F/W Sink : INT1\S11:FAULT-EVENT4 INT1\S07:SUMMARY-F/W INT1\S06:DET-UE/IE,UN INT3\S19:INCH-ANGLE INT3\S12:PRIOSEL-4 INT2\S06:INTEG INTERN_76-poles-reached Source: INT2\S32:ANGLECAPTUR Sink : INT3\S19:INCH-ANGLE INTERN_ActPassPolCount Source: INT2\S32:ANGLECAPTUR Sink : INT3\S19:INCH-ANGLE INT2\S32:ANGLECAPTUR INTERN_FASTER Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S05:LED-CONTROL1 INT3\S19:INCH-ANGLE INT2\S16:NW1 INTERN_INCHING Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S19:INCH-ANGLE INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT2\S14:START-PARS INT2\S32:ANGLECAPTUR INTERN_SLOWER Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S05:LED-CONTROL1 INT3\S19:INCH-ANGLE INT2\S16:NW1 ParamGrp_+360degr-disable Source: ? Sink : INT3\S19:INCH-ANGLE ParamGrp_Inching-MinAngle Source: ? Sink : INT3\S19:INCH-ANGLE ParamGrp_Inching-angle Source: ? Sink : INT3\S19:INCH-ANGLE ParamGrp_Inching-limit Source: ? Sink : INT3\S19:INCH-ANGLE ParamGrp_Pole-countSource: ? Sink : INT3\S19:INCH-ANGLE ParamGrp_inch-3POLES-REA Source: ? Sink : INT3\S19:INCH-ANGLE OUTPUT CROSSREFERENCE: INTERN_INCHING-STOP-0 INTERN_INCHING-STOP-1

Source: INT3\S19:INCH-ANGLE Sink : INT3\S20:INCH-ANGLE Source: INT3\S19:INCH-ANGLE

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S019 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S19:INCH-ANGLE INCHING CONTROL


released:

A4 E

148

3BHS135699

change

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.
INTERN_release-brake

INTERN_pole-counter

PSR FUPLA2 Release 4.B1

Collahuasi Project SAG Mill / Run Program

Source: Sink : Source: Sink :

replaces:

office resp.:

replaced by:

derived from:

INT3\S19:INCH-ANGLE INT3\S19:INCH-ANGLE INT3\S19:INCH-ANGLE INT3\S18:BRAKE-HORN

Johannes Gonser

issued:

checked:

ATBDE / J.Gonser INT3 S19:INCH-ANGLE INCHING CONTROL

released:

std. checked:

05-08-26

doc. type

format

A4 E

language

3BHS135699

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S019 F01/K01

149

sht. nr.

nr. of shts.

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INPUT CROSSREFERENCE: INTERN_INCHING-STOP-0 INTERN_INCHING-STOP-1

Source: Sink : Source: Sink :

INT3\S19:INCH-ANGLE INT3\S20:INCH-ANGLE INT3\S19:INCH-ANGLE INT3\S20:INCH-ANGLE

OUTPUT CROSSREFERENCE: INTERN_INCHING-STOP-2

Source: INT3\S20:INCH-ANGLE Sink : INT3\S12:PRIOSEL-4

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S020 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S20:INCH-ANGLE INCHING STOP COMMAND


released:

A4 E

150

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

LCB_C>RESET INTERN_LCB-SEL B

& B 3 >=1 B 3s / T T/ S 6 MS 200ms / T /T\ MS 7 MS / T /T\ MS 2s / T /T\ S 8 >=1 INTERN_RESET-TO-PLC 4 OND 5 MS

1B 9000ms

INTERN_RESET B 9 MS / T /T\ S 14 RSFF S R Q < 15 RSFF S INTERN_LampTEST

PANEL_C>LAMPTEST 10 OND / T T/ MS 5s 11 OFD \ T T\ MS

200ms

200ms

1B

INTERN_BLINK-F

500ms

12 OND / T T/ MS

500ms

13 OFD \ T T\ MS

1B

R Q < 1B 16 OND / T T/ S INTERN_BLINK-W

ParamGrp_init-delay 10S

INIT_*INIT

BLINK-FREQUENCY FAULT : BLINK-FREQUENCY WARNING:

INPUT CROSSREFERENCE: INTERN_LCB-SEL

LCB_C>RESET MODBUS-O_C>VMS-RESET PANEL_C>LAMPTEST PANEL_C>RESET ParamGrp_init-delay

Source: BACKGND\S04:MODE-SELECT Sink : INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 PANEL-AFC094\S04:LED:F1-F16 INT3\S14:START-UP-AUX INT3\S11:PRIO INT3\S22:STATUS-INDIC INT3\S16:START/STOP INT3\S21:RESET/LT INT3\S12:PRIOSEL-4 Source: LCB-AFC094\S02:TRANS-DO Sink : PANEL-AFC094\S03:PANEL-OUT INT3\S21:RESET/LT Source: INT3-MODBUS\S01:MODBUS-OUT1 Sink : INT3\S08:WARN-EVENT9 INT3\S21:RESET/LT Source: INT3\S02:PANEL-INPUT1 Sink : INT3\S21:RESET/LT Source: INT3\S02:PANEL-INPUT1 Sink : LCB-AFC094\S03:AFC094-LED INT3\S21:RESET/LT Source: ? Sink : INT3\S21:RESET/LT

OUTPUT CROSSREFERENCE: INIT_*INIT

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_BLINK-F INTERN_BLINK-W INTERN_LampTEST INTERN_RESET

INTERN_RESET-TO-PLC

Source: INT3\S21:RESET/LT Sink : INT1\S10:FAULT-EVENT3 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:WARN-EVENT7 INT2\S03:FAULT-EVENT5 Source: INT3\S21:RESET/LT Sink : INT3\S21:RESET/LT Source: INT3\S21:RESET/LT Sink : PANEL-AFC094\S01:COOL-DISPLAY PANEL-AFC094\S06:LED-CONTROL2 INT3\S21:RESET/LT Source: INT3\S21:RESET/LT Sink : LCB-AFC094\S03:AFC094-LED BACKGND\S06:SELECT-IND PANEL-AFC094\S04:LED:F1-F16 PANEL-AFC094\S03:PANEL-OUT INT3\S22:STATU Source: INT3\S21:RESET/LT Sink : INT1\S10:FAULT-EVENT3 INT1\S25:TRANSFER/70 INT1\S11:FAULT-EVENT4 INT1\S08:FAULT-EVENT1 INT1\S09:FAULT-EVENT2 INT1\S02:TRANSF>20/40 INT3\S09:WARN-EVENT10 INT3\S08:WARN-EVENT9 INT3\S07:WARN-EVENT8 INT3\S05:FAULT-EVENT6 INT3\S06:W INT2\S33:FROZENCHARGE INT2\S31:AIR-GAP-MON2 INT2\S03:FAULT-EVENT5 Source: INT3\S21:RESET/LT Sink : INT3-MODBUS\S04:COMMAND-1

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S021 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S21:RESET/LT RESET/LAMPTEST-HANDLING/BLINK-FREQUENCY

A4 E

151

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_LCB-SEL 2 INTERN_LOCAL-SEL B INTERN_START-PI*TAST INTERN_Block-Start 1B 5 >=1 INTERN_STOP 4 OND 100ms / T T/ MS 100ms \ T T\ MS < INTERN_[nx] 80% = 9.043 rpm ParamGrp_speed-more-than 61.92627% R Q B X1 B PANEL_PI*LED:MILL-S B 12 THRUL X 0.5% UPLIM HYS >=LIM % 13 THRUL X UPLIM HYS >=LIM % B 6 OFD 7 SWI SELX1 X0 X1 B 8 RSFF S B 10 SWI SELX1 X0 B 11 >=1 &

PANEL_PI*LED:MILL-ON

9 >=1

0B

INTERN_nx>7rpm

ParamGrp_mill-run-limit 0.15 rpm 1.32446%

0.5%

INTERN_MILL-RUNNING

INPUT CROSSREFERENCE: INTERN_Block-Start INTERN_LCB-SEL

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_LOCAL-SEL INTERN_LampTEST INTERN_START-PI*TAST INTERN_STOP INTERN_[nx]

ParamGrp_AFC094-LED-ON ParamGrp_mill-run-limit ParamGrp_speed-more-than

INT3\S17:MILL-ON,WR INT3\S22:STATUS-INDIC INT3\S17:MILL-ON,WR BACKGND\S04:MODE-SELECT INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 PANEL-AFC094\S04:LED:F1-F16 INT3\S14:START-UP-AUX INT3\S11:PRIO INT3\S22:STATUS-INDIC INT3\S16:START/STOP INT3\S21:RESET/LT INT3\S12:PRIOSEL-4 BACKGND\S04:MODE-SELECT PANEL-AFC094\S06:LED-CONTROL2 INT3\S14:START-UP-AUX INT3\S10:PRIOSEL-2 INT3\S22:STATUS-INDIC INT3\S12:PRIOSEL-4 INT3\S21:RESET/LT LCB-AFC094\S03:AFC094-LED BACKGND\S06:SELECT-IND PANEL-AFC094\S04:LED:F1-F16 PANEL-AFC094\S03:PANEL-OUT INT3\S22:STATU INT3\S16:START/STOP INT3\S17:MILL-ON,WR BACKGND\S04:MODE-SELECT INT3\S22:STATUS-INDIC INT3\S12:PRIOSEL-4 INT3\S16:START/STOP INT1\S11:FAULT-EVENT4 INT3\S22:STATUS-INDIC INT3\S17:MILL-ON,WR INT2\S19:ROCK-STOP INT2\S16:NW1 INT2\S13:NX INT1\S11:FAULT-EVENT4 INT3\S22:STATUS-INDIC INT3\S12:PRIOSEL-4 INT2\S15:NX-LIMITS INT2\S26:EXCITAT-4 INT2\S13:NX INT2\ INT2\S04:INTEG1 ? PANEL-AFC094\S06:LED-CONTROL2 INT3\S22:STATUS-INDIC ? INT3\S22:STATUS-INDIC ? INT3\S22:STATUS-INDIC

OUTPUT CROSSREFERENCE: INTERN_MILL-RUNNING INTERN_nx>7rpm PANEL_PI*LED:MILL-ON PANEL_PI*LED:MILL-STOP

Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S22:STATUS-INDIC INT3-MODBUS\S03:STATUS-1 INT3\S11:PRIOSEL-3 INT3\S22:STATUS-INDIC INT3-MODBUS\S04:COMMAND-1 INT3\S22:STATUS-INDIC LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S05:LED-CONTROL1 INT3\S22:STATUS-INDIC LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S05:LED-CONTROL1

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S022 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S22:STATUS-INDIC STATUS INDICATION


released:

A4 E

152

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

TRIP_FFO-3-FAST TRIP_FFO-4-FAST TRIP_FFO-4-SLOW BS TRIP_FFO-5-SLOW TRIP_FFO-6-SLOW ALARM_FFO-7-SLOW ALARM_FFO-8-SLOW ALARM_FFO-9-SLOW ALARM_FFO-10-SLOW TRIP_FF-1-FAST TRIP_FF-2-FAST TRIP_FF-3-FAST TRIP_FF-4-FAST TRIP_FF-4-SLOW B TRIP_FF-5-SLOW TRIP_FF-6-SLOW ALARM_FF-7-SLOW ALARM_FF-8-SLOW ALARM_FF-9-SLOW ALARM_FF-10-SLOW 0B 0B 0B 0B 0B 0B .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15 Y 1B 4 >=1 .3 5 BIBS .0 .1 USED .2 0I 1I BS 1B 3 ENCOD X EN Y 1 >=1

8 TRANW 9 SWI SELX1 X0 X1 I

11 ADD +1

+2

6 ENCOD X EN Y USED

4I 0B 0B

7 SHIFT X N RIGHT FILL Y

10 TRANW

+3 I

INTERN_First-Fault-N

Function: -------- Detection of the first Trip or Alarm Remarks: ------- Only one of the Inputs of Block 5 is 1B, because the SFF signals of the EVTBS blocks prevent more than 1 EVTBS-block to detect first faults. - One EVTBS block can detect more than one first fault (faults occure in the same cycle). In this case the most significant active fault bit is considered to be the first fault (Block Nr. 3 ENCOD)

INPUT CROSSREFERENCE: ALARM_FF-10-SLOW ALARM_FF-7-SLOW ALARM_FF-8-SLOW

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

ALARM_FF-9-SLOW ALARM_FFO-10-SLOW ALARM_FFO-7-SLOW ALARM_FFO-8-SLOW ALARM_FFO-9-SLOW TRIP_FF-1-FAST TRIP_FF-2-FAST TRIP_FF-3-FAST TRIP_FF-4-FAST TRIP_FF-4-SLOW

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S09:WARN-EVENT10 INT3\S23:FIRST-T/W INT3\S06:WARN-EVENT7 INT3\S23:FIRST-T/W INT3\S07:WARN-EVENT8 INT3\S23:FIRST-T/W INT3\S08:WARN-EVENT9 INT3\S23:FIRST-T/W INT3\S09:WARN-EVENT10 INT3\S23:FIRST-T/W INT3\S06:WARN-EVENT7 INT3\S23:FIRST-T/W INT3\S07:WARN-EVENT8 INT3\S23:FIRST-T/W INT3\S08:WARN-EVENT9 INT3\S23:FIRST-T/W INT1\S08:FAULT-EVENT1 INT3\S23:FIRST-T/W INT1\S09:FAULT-EVENT2 INT3\S23:FIRST-T/W INT1\S10:FAULT-EVENT3 INT3\S23:FIRST-T/W INT1\S11:FAULT-EVENT4 INT3\S23:FIRST-T/W ? INT3\S23:FIRST-T/W

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S023 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S23:FIRST-T/W FIRST FAULT NUMBER


released:

A4 E

153

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

TRIP_FFO-1-FAST TRIP_FFO-2-FAST TRIP_FFO-3-FAST TRIP_FFO-4-FAST TRIP_FFO-4-SLOW TRIP_FFO-5-SLOW TRIP_FFO-6-SLOW

Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S23:FIRST-T/W INT1\S08:FAULT-EVENT1 INT3\S23:FIRST-T/W INT1\S09:FAULT-EVENT2 INT3\S23:FIRST-T/W INT1\S10:FAULT-EVENT3 INT3\S23:FIRST-T/W INT1\S11:FAULT-EVENT4 INT3\S23:FIRST-T/W ? INT3\S23:FIRST-T/W INT2\S03:FAULT-EVENT5 INT3\S23:FIRST-T/W INT3\S05:FAULT-EVENT6 INT3\S23:FIRST-T/W

OUTPUT CROSSREFERENCE: INTERN_First-Fault-Nr

Source: INT3\S23:FIRST-T/W Sink : INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S023 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S23:FIRST-T/W FIRST FAULT NUMBER


released:

A4 E

154

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

ParamGrp_MAX-INT-Pm 0.50049% INTERN_Pm 1 ADD +1 o +2 % 2 INT 0% 0B 100% 0% + IC SIC T UPLIM LOLIM + MS <

HYS

MAX 4 MS >>1 /

ParamGrp_MAXPEEK-INT-Pm 50MS

X1 >>2 X2 % 5 S&H SAMPL X1 Y1 %

ParamGrp_MAXPEEK-MS-Pm 20MS

T /T\ MS

6 AVG + Y IK-1 IK-2 IK-3 IK-4 X1 %

8 MULT X

ParamGrp_Pm-Scaling 191.76025%

Y X*Y % PANEL_i/Pm

INPUT CROSSREFERENCE: INTERN_-WR

INTERN_Pm ParamGrp_MAX-INT-Pm ParamGrp_MAXPEEK-INT-Pm ParamGrp_MAXPEEK-MS-Pm ParamGrp_Pm-Scaling

Source: INT1\S07:SUMMARY-F/W Sink : INT1\S25:TRANSFER/70 INT1\S15:BRDGE-COMMUT INT1\S07:SUMMARY-F/W INT3\S24:NW-REM-AD,PM INT2\S18:CONTROL-N INT2\S17:NW2 INT2\S16:NW1 Source: INT2\S27:MOT-POWER Sink : INT1\S26:RECORDING INT3\S24:NW-REM-AD,PM Source: ? Sink : INT3\S24:NW-REM-AD,PM Source: ? Sink : INT3\S24:NW-REM-AD,PM Source: ? Sink : INT3\S24:NW-REM-AD,PM Source: ? Sink : INT3\S24:NW-REM-AD,PM

OUTPUT CROSSREFERENCE: PANEL_i/Pm

Source: INT3\S24:NW-REM-AD,PM Sink : LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 PANEL-AFC094\S02:PANL-DISPLAY

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S024 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S24:NW-REM-AD,PM


released:

A4 E

155

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

UAC326-2_s>AGP2 % UAC326-2_s>AGP3 % 6 OND ParamGrp_SS-Timer1 50MS MS ParamGrp_Sample-Interval 3000MS T / T T/ \

ABS 3 ABS 5 ADD +1 o +2 +3 % 8 RSFF 1B S R Q <

o +2 +3 % 10 ADD o +1

7 OFD

T\ MS

9 S&H SAMPL X1 Y1 %

+2 %

11 ABS %

12 THRLL X LOLIM HYS <=LIM % 13 OND / T T/ S

ParamGrp_SS-Low-Limit 3.00293% ParamGrp_SS-Hyst 1.00098% ParamGrp_SS-NoMovement-t> 1S

INTERN_StandStill-ON 1 = Stand Still

INPUT CROSSREFERENCE: ParamGrp_SS-Hyst ParamGrp_SS-Low-Limit

Source: Sink : Source: Sink : ParamGrp_SS-NoMovement-t> Source: Sink : ParamGrp_SS-Timer1 Source: Sink : ParamGrp_Sample-Interval Source: Sink : UAC326-2_s>AGP1 Source: Sink : UAC326-2_s>AGP2 Source: Sink : UAC326-2_s>AGP3 Source: Sink : OUTPUT CROSSREFERENCE: INTERN_StandStill-ON

? INT3\S25:STANDSTILL-L ? INT3\S25:STANDSTILL-L ? INT3\S25:STANDSTILL-L ? INT3\S25:STANDSTILL-L ? INT3\S25:STANDSTILL-L ? INT3\S25:STANDSTILL-L INT2\S32:ANGLECAPTUR INT2\S28:AIR-GAP-SUP1 ? INT3\S25:STANDSTILL-L INT2\S32:ANGLECAPTUR INT2\S28:AIR-GAP-SUP1 ? INT3\S25:STANDSTILL-L INT2\S32:ANGLECAPTUR INT2\S28:AIR-GAP-SUP1

Source: INT3\S25:STANDSTILL-L Sink : INT3\S16:START/STOP

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-06-01

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C001/S025 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3 S25:STANDSTILL-L


released:

A4 E

156

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

.1 .2 .3 .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15

MODBUS-O_LOCAL-SEL MODBUS-O_LCB-SEL MODBUS-O_C>AUX-ON/O

MODBUS-O_FB>AUX-RUNN MODBUS-O_FB>Brake-r MODBUS-O_C>CCcool-r MODBUS-O_FB>AUX-AVA MODBUS-O_C>VMS-RESE MODBUS-O_C>HV-BREAK MODBUS-O_Critical-S

MODBUS-O_C>MILLDR-ON MODBUS-O_S>EXCITATMODBUS-O_NonCritric MODBUS-O_C>REVERSE MODBUS-O_C>Local-Re

INPUT CROSSREFERENCE: MODBUS_ON/OFF-SIGNALS-1

Source: ? Sink : INT3-MODBUS\S01:MODBUS-OUT1

OUTPUT CROSSREFERENCE: MODBUS-O_C>AUX-ON/OFF MODBUS-O_C>CCcool-release MODBUS-O_C>HV-BREAKERS-ON MODBUS-O_C>Local-Release MODBUS-O_C>MILLDR-ON MODBUS-O_C>REVERSE MODBUS-O_C>VMS-RESET MODBUS-O_CENTRAL-SEL MODBUS-O_Critical-Stop MODBUS-O_FB>AUX-AVAILABLE MODBUS-O_FB>AUX-RUNNING MODBUS-O_FB>Brake-release MODBUS-O_LCB-SEL MODBUS-O_LOCAL-SEL MODBUS-O_NonCritricalStop MODBUS-O_S>EXCITAT-FAN-FB

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3-MODBUS\S01:MODBUS-OUT1 INT3\S13:START-UP-AUX INT3-MODBUS\S01:MODBUS-OUT1 INT3\S14:START-UP-AUX INT3-MODBUS\S01:MODBUS-OUT1 INT3\S11:PRIOSEL-3 INT3-MODBUS\S01:MODBUS-OUT1 INT3\S03:PANEL-INPUT2 INT3\S12:PRIOSEL-4 INT3-MODBUS\S01:MODBUS-OUT1 INT3\S11:PRIOSEL-3 INT3-MODBUS\S01:MODBUS-OUT1 INT3\S12:PRIOSEL-4 INT3-MODBUS\S01:MODBUS-OUT1 INT3\S08:WARN-EVENT9 INT3\S21:RESET/LT INT3-MODBUS\S01:MODBUS-OUT1 BACKGND\S04:MODE-SELECT INT3-MODBUS\S01:MODBUS-OUT1 INT2\S02:TRANSF>60 INT3-MODBUS\S01:MODBUS-OUT1 INT3\S08:WARN-EVENT9 INT3\S13:START-UP-AUX INT3-MODBUS\S01:MODBUS-OUT1 INT3\S13:START-UP-AUX INT3-MODBUS\S01:MODBUS-OUT1 INT3\S17:MILL-ON,WR INT3-MODBUS\S01:MODBUS-OUT1 BACKGND\S04:MODE-SELECT INT3-MODBUS\S01:MODBUS-OUT1 BACKGND\S04:MODE-SELECT INT3-MODBUS\S01:MODBUS-OUT1 PANEL-AFC094\S03:PANEL-OUT INT3\S08:WARN-EVENT9 INT3\S16:START/STOP INT3-MODBUS\S01:MODBUS-OUT1 INT1\S25:TRANSFER/70 INT3\S05:FAULT-EVENT6

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C002/S001 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3-MODBUS S01:MODBUS-OUT1


released:

A4 E

157

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_FMO-INT1-2 INTERN_FMO-INT1-3 INTERN_FMO-INT1-4 INTERN_FMO-INT2-5 INTERN_FMO-INT3-6 INTERN_FMO-INT3-7 INTERN_FMO-INT3-8 INTERN_FMO-INT3-9 INTERN_FMO-INT3-10

3 TRANW 4 TRANW 5 TRANW 6 TRANW 7 TRANW 8 TRANW 9 TRANW 10 TRANW 11 TRANW

MODBUS_FAULTS-2 MODBUS_FAULTS-3 MODBUS_FAULTS-4 MODBUS_FAULTS-5 MODBUS_FAULTS-6 MODBUS_WARNINGS-7 MODBUS_WARNINGS-8 MODBUS_WARNINGS-9 MODBUS_WARNINGS-10

INPUT CROSSREFERENCE: INTERN_FMO-INT1-1 INTERN_FMO-INT1-2 INTERN_FMO-INT1-3 INTERN_FMO-INT1-4 INTERN_FMO-INT2-5 INTERN_FMO-INT3-10 INTERN_FMO-INT3-6 INTERN_FMO-INT3-7 INTERN_FMO-INT3-8 INTERN_FMO-INT3-9 INTERN_First-Fault-Nr

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT1\S08:FAULT-EVENT1 INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT1\S09:FAULT-EVENT2 INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT1\S10:FAULT-EVENT3 INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT1\S11:FAULT-EVENT4 INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT2\S03:FAULT-EVENT5 INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT3\S09:WARN-EVENT10 INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT3\S05:FAULT-EVENT6 INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT3\S06:WARN-EVENT7 INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT3\S07:WARN-EVENT8 INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT3\S08:WARN-EVENT9 INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT3\S23:FIRST-T/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT

OUTPUT CROSSREFERENCE: MODBUS_FAULTS-1 MODBUS_FAULTS-2 MODBUS_FAULTS-3 MODBUS_FAULTS-4 MODBUS_FAULTS-5 MODBUS_FAULTS-6 MODBUS_First-Fault MODBUS_WARNINGS-10

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

MODBUS_WARNINGS-7 MODBUS_WARNINGS-8 MODBUS_WARNINGS-9

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3-MODBUS\S02:FAULTS ? INT3-MODBUS\S02:FAULTS ? INT3-MODBUS\S02:FAULTS ? INT3-MODBUS\S02:FAULTS ? INT3-MODBUS\S02:FAULTS ? INT3-MODBUS\S02:FAULTS ? INT3-MODBUS\S02:FAULTS ? INT3-MODBUS\S02:FAULTS ? INT3-MODBUS\S02:FAULTS ? INT3-MODBUS\S02:FAULTS ? INT3-MODBUS\S02:FAULTS ?

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C002/S002 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3-MODBUS S02:FAULTS


released:

A4 E

158

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_CC:RTS INTERN_MILL-RTS MODBUS-I_Mill-start-up INTERN_Nw-Limit-8-rpm UDA327:3_S>MVD1-FAULT UDA327:3_S>MVD1-AVAILABLE UDA327:3_S>MVD1-FEEDBACK INTERN_REVERSE UDA327:3_S>MVD2-AVAILABLE UDA327:3_S>MVD2-FEEDBACK INTERN_MILL-RUNNING UDA327:3_S>MVD1-OFF-FEDBK UDA327:3_S>MVD2-FAULT INTERN_AB-com-supervis 1S 1 o TRAN B

Bit3 Bit4 Bit5 Bit6 Bit7 Bit8 Bit9 Bit10 Bit11 Bit12 Bit13 Bit14 Bit15 Bit16 T CHSTA TRANSF

INTERN_Status-1-chan MODBUS_STATUS-1

In Antamina Project: There is no MVD2-FAULT signal from the Rotor HV-Breaker

INPUT CROSSREFERENCE: INTERN_AB-com-supervis INTERN_CC:RTS INTERN_CENTRAL-SEL

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_LCB-SEL

INTERN_MILL-RTS INTERN_MILL-RUNNING INTERN_Nw-Limit-8-rpm INTERN_REVERSE

MODBUS-I_Mill-start-up

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

Source: Sink : UDA327:3_S>MVD1-AVAILABLE Source: Sink : UDA327:3_S>MVD1-FAULT Source: Sink : UDA327:3_S>MVD1-FEEDBACK Source: Sink : UDA327:3_S>MVD1-OFF-FEDBK Source: Sink : UDA327:3_S>MVD2-AVAILABLE Source: Sink : UDA327:3_S>MVD2-FAULT Source: Sink : UDA327:3_S>MVD2-FEEDBACK Source: Sink : OUTPUT CROSSREFERENCE: INTERN_Status-1-change MODBUS_STATUS-1

INT3-MODBUS\S08:MODBUS-OUT2 INT3-MODBUS\S03:STATUS-1 INT3\S17:MILL-ON,WR INT3-MODBUS\S03:STATUS-1 INT3\S17:MILL-ON,WR BACKGND\S04:MODE-SELECT INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 INT3\S18:BRAKE-HORN INT3\S14:START-UP-AUX INT3\S11:PRIOSEL-3 INT3\S10:PRIOSEL-2 INT3\S15:MVD-ON-OFF INT3\S16:START/STOP INT3\S17:MILL-ON,WR INT3\S12:PRIOSEL-4 INT2\S17:NW2 INT2\S1 BACKGND\S04:MODE-SELECT INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 PANEL-AFC094\S04:LED:F1-F16 INT3\S14:START-UP-AUX INT3\S11:PRIO INT3\S22:STATUS-INDIC INT3\S16:START/STOP INT3\S21:RESET/LT INT3\S12:PRIOSEL-4 INT3\S17:MILL-ON,WR INT3\S16:START/STOP INT3-MODBUS\S03:STATUS-1 INT3\S22:STATUS-INDIC INT3-MODBUS\S03:STATUS-1 INT3\S11:PRIOSEL-3 INT2\S15:NX-LIMITS PANEL-AFC094\S03:PANEL-OUT INT3-MODBUS\S03:STATUS-1 INT2\S15:NX-LIMITS INT3\S12:PRIOSEL-4 INT1\S13:PHASE-SHIFT2 LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S03:STATUS-1 INT1\S12:PHASE-SHIFT1 PANEL-AFC094\S05:LED-CO INT2\S14:START-PARS INT2\S19:ROCK-STOP INT2\S18:CONTROL-N INT2\S13:NX INT2\S17:NW2 INT3\S16:START/STOP INT3-MODBUS\S03:STATUS-1 INT1\S02:TRANSF>20/40 INT3-MODBUS\S03:STATUS-1 INT3\S08:WARN-EVENT9 INT1\S02:TRANSF>20/40 INT3-MODBUS\S03:STATUS-1 INT1\S08:FAULT-EVENT1 INT3\S15:MVD-ON-OFF INT1\S02:TRANSF>20/40 INT3-MODBUS\S03:STATUS-1 INT1\S07:SUMMARY-F/W INT3\S15:MVD-ON-OFF INT1\S02:TRANSF>20/40 INT3-MODBUS\S03:STATUS-1 INT1\S07:SUMMARY-F/W INT1\S02:TRANSF>20/40 INT3-MODBUS\S03:STATUS-1 INT3\S08:WARN-EVENT9 INT1\S02:TRANSF>20/40 INT3-MODBUS\S03:STATUS-1 INT1\S08:FAULT-EVENT1 INT3\S15:MVD-ON-OFF INT1\S02:TRANSF>20/40 INT3-MODBUS\S03:STATUS-1 INT3\S15:MVD-ON-OFF

Source: Sink : Source: Sink :

INT3-MODBUS\S03:STATUS-1 ? INT3-MODBUS\S03:STATUS-1 ?

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C002/S003 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3-MODBUS S03:STATUS-1


released:

A4 E

159

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_nx>7rpm INTERN_LCB-MAN-LOWER INTERN_LCB-RE-ROCKING MODBUS-I_C/CYCLO-PUMP1-ON MODBUS-I_C/CYCLO-PUMP2-ON MODBUS-I_C/Brake-normal logic0 = Applied MODBUS-I_C/Brake-quick-ap logic1 = Applied INTERN_NORMAL INTERN_INCHING INTERN_CREEPING 0B INTERN_RESET-TO-PLC 0B 1S

Bit4 Bit5 Bit6 Bit7 Bit8 Bit9 Bit10 Bit11 Bit12 Bit13 Bit14 Bit15 Bit16 T CHSTA TRANSF

INTERN_ONOFF-1-Chang MODBUS_ON/OFF-1

INPUT CROSSREFERENCE: INTERN_CREEPING

Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT2\S14:START-PARS INT2\S23:EXCITAT-1 INT2\S17:NW2 INTERN_INCHING Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S19:INCH-ANGLE INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT2\S14:START-PARS INT2\S32:ANGLECAPTUR INTERN_LCB-MAN-LOWER Source: INT3\S11:PRIOSEL-3 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S18:BRAKE-HORN INTERN_LCB-RE-ROCKING Source: INT3\S11:PRIOSEL-3 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S18:BRAKE-HORN INTERN_NORMAL Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 INTERN_RESET-TO-PLC Source: INT3\S21:RESET/LT Sink : INT3-MODBUS\S04:COMMAND-1 INTERN_nx>7rpm Source: INT3\S22:STATUS-INDIC Sink : INT3-MODBUS\S04:COMMAND-1 MODBUS-I_C/AUX-ON/OFF Source: INT3\S13:START-UP-AUX Sink : INT3-MODBUS\S04:COMMAND-1 MODBUS-I_C/Brake-normal Source: INT3\S18:BRAKE-HORN Sink : INT3\S16:START/STOP INT3-MODBUS\S04:COMMAND-1 MODBUS-I_C/Brake-quick-ap Source: INT3\S18:BRAKE-HORN Sink : INT3-MODBUS\S04:COMMAND-1 MODBUS-I_C/CYCLO-PUMP1-ON Source: INT3\S14:START-UP-AUX Sink : INT3-MODBUS\S04:COMMAND-1 INT3\S14:START-UP-AUX MODBUS-I_C/CYCLO-PUMP2-ON Source: INT3\S14:START-UP-AUX Sink : INT3-MODBUS\S04:COMMAND-1 INT3\S14:START-UP-AUX OUTPUT CROSSREFERENCE: INTERN_ONOFF-1-Change MODBUS_ON/OFF-1

Source: Sink : Source: Sink :

INT3-MODBUS\S04:COMMAND-1 ? INT3-MODBUS\S04:COMMAND-1 ?

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C002/S004 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3-MODBUS S04:COMMAND-1


released:

A4 E

160

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

100.03052% % INTERN_nx 80% = 9.043 rpm ParamGrp_nx-adaptation 100.03052% INTERN_s>AGP1 INTERN_s>AGP2 INTERN_s>AGP3 INTERN_s>AGP4 INTERN_s>AGP5 INTERN_s>AGP6 INTERN_s>AGP7 INTERN_s>AGP8 INTERN_s>AGP9 INTERN_s>AGP10 INTERN_s>AGP11

X*Y 2 MULT X Y X*Y % 3 TRAN % 4 TRAN % 5 TRAN % 6 TRAN % 7 TRAN % 8 TRAN % 9 TRAN % 10 TRAN % 11 TRAN % 12 TRAN % 13 TRAN %

MODBUS_/nw/

MODBUS_nx MODBUS_AGP1 MODBUS_AGP2 MODBUS_AGP3 MODBUS_AGP4 MODBUS_AGP5 MODBUS_AGP6 MODBUS_AGP7 MODBUS_AGP8 MODBUS_AGP9 MODBUS_AGP10 MODBUS_AGP11

SCALING FOR PLC /nw/ nx AGP 1..9 in PLC in PLC in PLC 100% = 11.303 rpm 100% = 11.303 rpm 100% = 30 mm

INPUT CROSSREFERENCE: INTERN_/nw/ INTERN_nx

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_s>AGP1 INTERN_s>AGP10 INTERN_s>AGP11 INTERN_s>AGP2 INTERN_s>AGP3 INTERN_s>AGP4

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_s>AGP5 INTERN_s>AGP6 INTERN_s>AGP7 INTERN_s>AGP8 INTERN_s>AGP9 ParamGrp_nw-adaptation ParamGrp_nx-adaptation

INT2\S17:NW2 BACKGND\S06:SELECT-IND BACKGND\S05:I-ANALOG-ADP INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S21:PSIW INT2\S18:CONTROL-N INT2\S13:NX BACKGND\S06:SELECT-IND BACKGND\S05:I-ANALOG-ADP INT3-MODBUS\S05:ANALOG-OUT-1 INT1\S13:PHASE-SHIFT2 INT1\S12:PHASE-SHIF INT2\S20:ANTIVOLT INT2\S18:CONTROL-N INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 PANEL-AFC094\S02:PANL-DISPLAY INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 ? INT3-MODBUS\S09:SETPOINTS INT3-MODBUS\S05:ANALOG-OUT-1 ? INT3-MODBUS\S05:ANALOG-OUT-1

OUTPUT CROSSREFERENCE: MODBUS_/nw/ MODBUS_AGP1

Source: Sink : Source: Sink :

INT3-MODBUS\S05:ANALOG-OUT-1 ? INT3-MODBUS\S05:ANALOG-OUT-1 ?

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-02-16

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C002/S005 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3-MODBUS S05:ANALOG-OUT-1


released:

A4 E

161

3BHS135699

MODBUS_AGP2 MODBUS_AGP3 MODBUS_AGP4 MODBUS_AGP5 MODBUS_AGP6 MODBUS_AGP7 MODBUS_AGP8 MODBUS_AGP9 MODBUS_nx

Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

? INT3-MODBUS\S05:ANALOG-OUT-1 ? INT3-MODBUS\S05:ANALOG-OUT-1 ? INT3-MODBUS\S05:ANALOG-OUT-1 ? INT3-MODBUS\S05:ANALOG-OUT-1 ? INT3-MODBUS\S05:ANALOG-OUT-1 ? INT3-MODBUS\S05:ANALOG-OUT-1 ? INT3-MODBUS\S05:ANALOG-OUT-1 ? INT3-MODBUS\S05:ANALOG-OUT-1 ? INT3-MODBUS\S05:ANALOG-OUT-1 ?

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-02-16

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C002/S005 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3-MODBUS S05:ANALOG-OUT-1


released:

A4 E

162

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

79.99878% % INTERN_ixS-eff

X*Y 2 MULT X Y X*Y % 3 MULT X Y X*Y % 4 MULT X Y X*Y % 5 MULT X Y X*Y % 6 MULT X Y X*Y % 7 MULT X Y X*Y %

MODBUS_ixR-eff

MODBUS_ixS-eff

INTERN_ixT-eff

MODBUS_ixT-eff

UAC326-1_i-pi/ixe ParamGrp_scale-ixe-PLC 100.00000%

MODBUS_ixe

PANEL_i-pi/uxMA ParamGrp_scale-uxMA-PLC 79.99878%

MODBUS_uxMA

PANEL_i/Pm ParamGrp_scale-Pm-PLC 79.99878%

MODBUS_Pm

PANEL_i-pi/UN ParamGrp_scale-UN-PLC 79.99878%

MODBUS_/UN/

SCALING FOR PLC ixR-eff 100% = 2450 A ; PLC 100% = 3063 A =>CALIBRATION 80% (80% x ((2450x100)/(3063x100))) 100% = 800 A ; PLC 100% = 800A =>CALIBRATION 100% (100% x ((800x100)/(800x100))) 80% = 5200 V ; PLC 100% = 6500 V

i-pi/ixe

i-pi/uxMA Pm /UN/

100% = 21000 kW ; PLC 100% = 26250 kW 100% = 23kV ; PLC 100% = 28.75kV =>CALIBRATION 80% (100% x((23x80)/(28.75x100))

INPUT CROSSREFERENCE: INTERN_ixR-eff INTERN_ixS-eff INTERN_ixT-eff PANEL_i-pi/UN PANEL_i-pi/uxMA

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PANEL_i/Pm ParamGrp_ixR-eff-ADAPT ParamGrp_scale-Pm-PLC ParamGrp_scale-UN-PLC ParamGrp_scale-ixe-PLC ParamGrp_scale-uxMA-PLC UAC326-1_i-pi/ixe

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT2\S27:MOT-POWER LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 INT2\S27:MOT-POWER LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 INT2\S27:MOT-POWER LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 BACKGND\S05:I-ANALOG-ADP LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 BACKGND\S05:I-ANALOG-ADP LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 INT3\S24:NW-REM-AD,PM LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 ? INT3-MODBUS\S06:ANALOG-OUT-2 ? INT3-MODBUS\S06:ANALOG-OUT-2 ? INT3-MODBUS\S06:ANALOG-OUT-2 ? INT3-MODBUS\S06:ANALOG-OUT-2 ? INT3-MODBUS\S06:ANALOG-OUT-2 BACKGND\S05:I-ANALOG-ADP INT3-MODBUS\S06:ANALOG-OUT-2

PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S02:PANL-DISPLAY

OUTPUT CROSSREFERENCE: MODBUS_/UN/ MODBUS_Pm MODBUS_ixR-eff

Source: Sink : Source: Sink : Source:

INT3-MODBUS\S06:ANALOG-OUT-2 ? INT3-MODBUS\S06:ANALOG-OUT-2 ? INT3-MODBUS\S06:ANALOG-OUT-2

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-02-16

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C002/S006 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3-MODBUS S06:ANALOG-OUT-2


released:

A4 E

163

3BHS135699

change

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.
MODBUS_uxMA

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.
MODBUS_ixe

MODBUS_ixT-eff

PSR FUPLA2 Release 4.B1

Collahuasi Project SAG Mill / Run Program

Source: Sink : Source: Sink : Source: Sink :

replaces:

office resp.:

replaced by:

derived from:

INT3-MODBUS\S06:ANALOG-OUT-2 ? INT3-MODBUS\S06:ANALOG-OUT-2 ? INT3-MODBUS\S06:ANALOG-OUT-2 ?

Johannes Gonser

issued:

checked:

ATBDE / J.Gonser INT3-MODBUS S06:ANALOG-OUT-2

released:

std. checked:

07-02-16

doc. type

format

A4 E

language

3BHS135699

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C002/S006 F01/K01

164

sht. nr.

nr. of shts.

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

% INTERN_cool-CF001-displ INTERN_cool-CL001-displ INTERN_cool-CP001-displ INTERN_cool-CD001-displ INTERN_cool-CT004-displ INTERN_cool-CT005-displ 3 TRAN % 4 TRAN % 5 TRAN % 6 TRAN % 7 TRAN % 8 TRAN % MODBUS_COOL-CF001 MODBUS_COOL-CL001 MODBUS_COOL-CP001 MODBUS_COOL-CD001 MODBUS_COOL-CT004 MODBUS_COOL-CT005

SCALING FOR PLC CT001 CT002 CF001 CL001 CP001 CD001 CT003 CT004 100% = 100 degC 100% = 100 degC ; PLC 100% = 100 degC ; PLC 100% = 100 degC

100% = 380 l/min ; PLC 100% = 380 l/min 100% = 100 % 100% = 6 bar 100% = 4 uS/cm 100% = 100 degC 100% = 100 degC ; PLC 100% = 100 % ; PLC 100% = 6 bar ; PLC 100% = 4 uS/cm ; PLC 100% = 100 degC ; PLC 100% = 100 degC

INPUT CROSSREFERENCE: INTERN_cool-CD001-displ INTERN_cool-CF001-displ INTERN_cool-CL001-displ INTERN_cool-CP001-displ INTERN_cool-CT001-displ INTERN_cool-CT002-displ INTERN_cool-CT004-displ INTERN_cool-CT005-displ

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3

PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S02:PANL-DISPLAY

OUTPUT CROSSREFERENCE: MODBUS_COOL-CD001 MODBUS_COOL-CF001 MODBUS_COOL-CL001

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

MODBUS_COOL-CP001 MODBUS_COOL-CT001 MODBUS_COOL-CT002 MODBUS_COOL-CT004 MODBUS_COOL-CT005

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3-MODBUS\S07:ANALOG-OUT-3 ? INT3-MODBUS\S07:ANALOG-OUT-3 ? INT3-MODBUS\S07:ANALOG-OUT-3 ? INT3-MODBUS\S07:ANALOG-OUT-3 ? INT3-MODBUS\S07:ANALOG-OUT-3 ? INT3-MODBUS\S07:ANALOG-OUT-3 ? INT3-MODBUS\S07:ANALOG-OUT-3 ? INT3-MODBUS\S07:ANALOG-OUT-3 ?

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C002/S007 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3-MODBUS S07:ANALOG-OUT-3


released:

A4 E

165

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

.1 .2 .3 .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15

MODBUS-O_F>COOL-PUM MODBUS-O_F>Stator-T MODBUS-O_F>Rotor-Tr MODBUS-O_W>Stator-T MODBUS-O_W>Rotor-Tr MODBUS-O_KNIF-STATMODBUS-O_KNIF-ROT-C MODBUS-O_W>Excitati MODBUS-O_S>HORN-REL MODBUS-O_ProcessInt

INTERN_AB-com-superv

INPUT CROSSREFERENCE: MODBUS_ON/OFF-SIGNALS-2

Source: ? Sink : INT3-MODBUS\S08:MODBUS-OUT2

OUTPUT CROSSREFERENCE: INTERN_AB-com-supervis MODBUS-O_F>COOL-PUMP1

Source: Sink : Source: Sink : MODBUS-O_F>COOL-PUMP2 Source: Sink : MODBUS-O_F>Rotor-Transf Source: Sink : MODBUS-O_F>Stator-Transf Source: Sink : MODBUS-O_KNIF-ROT-CLOSED Source: Sink : MODBUS-O_KNIF-STAT-CLOSED Source: Sink : MODBUS-O_ProcessInterlock Source: Sink : MODBUS-O_S>HORN-RELEASE Source: Sink : MODBUS-O_W>Excitation-LCB Source: Sink : MODBUS-O_W>Rotor-Transf Source: Sink : MODBUS-O_W>Stator-Transf Source: Sink :

INT3-MODBUS\S08:MODBUS-OUT2 INT3-MODBUS\S03:STATUS-1 INT3-MODBUS\S08:MODBUS-OUT2 INT3\S14:START-UP-AUX INT3-MODBUS\S08:MODBUS-OUT2 INT3\S14:START-UP-AUX INT3-MODBUS\S08:MODBUS-OUT2 INT1\S11:FAULT-EVENT4 INT3-MODBUS\S08:MODBUS-OUT2 INT1\S11:FAULT-EVENT4 INT3-MODBUS\S08:MODBUS-OUT2 PANEL-AFC094\S03:PANEL-OUT INT3\S17:MILL-ON,WR INT3-MODBUS\S08:MODBUS-OUT2 PANEL-AFC094\S03:PANEL-OUT INT3\S17:MILL-ON,WR INT3-MODBUS\S08:MODBUS-OUT2 PANEL-AFC094\S03:PANEL-OUT INT3\S08:WARN-EVENT9 INT3\S16:START/STOP INT3-MODBUS\S08:MODBUS-OUT2 INT3\S18:BRAKE-HORN INT3-MODBUS\S08:MODBUS-OUT2 INT3\S08:WARN-EVENT9 INT3-MODBUS\S08:MODBUS-OUT2 INT3\S08:WARN-EVENT9 INT3-MODBUS\S08:MODBUS-OUT2 INT3\S08:WARN-EVENT9

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C002/S008 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3-MODBUS S08:MODBUS-OUT2


released:

A4 E

166

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

100.03052% % ParamGrp_nw-max-lim-PLC 86.48682% ParamGrp_nw-min-lim-PLC -50.00000% MODBUS_LoadCell ParamGrp_LoadCell-Scaling 100.00000%

X*Y

XLIM >UL UPLIM <LL LOLIM %

INTERN_REM-nw-adapt 3 TRAN % 4 MULT X Y X*Y % INTERN_LoadCell UAC326-1_/nw

in PLC 16767 (100%) = 11.303 rpm in PSR 80% = 11.303 rpm =>CALIBRATION

INPUT CROSSREFERENCE: MODBUS_LoadCell

Source: Sink : MODBUS_nw Source: Sink : ParamGrp_LoadCell-Scaling Source: Sink : ParamGrp_nw-adaptation Source: Sink : ParamGrp_nw-max-lim-PLC Source: Sink : ParamGrp_nw-min-lim-PLC Source: Sink : OUTPUT CROSSREFERENCE: INTERN_LoadCell INTERN_REM-nw-adapt UAC326-1_/nw

? INT3-MODBUS\S09:SETPOINTS ? INT3-MODBUS\S09:SETPOINTS ? INT3-MODBUS\S09:SETPOINTS ? INT3-MODBUS\S09:SETPOINTS INT3-MODBUS\S05:ANALOG-OUT-1 ? INT3-MODBUS\S09:SETPOINTS ? INT3-MODBUS\S09:SETPOINTS

Source: Sink : Source: Sink : Source: Sink :

INT3-MODBUS\S09:SETPOINTS LCB-AFC094\S01:TRANS-ANALOG PANEL-AFC094\S02:PANL-DISPLAY INT3-MODBUS\S09:SETPOINTS INT3-MODBUS\S09:SETPOINTS INT2\S15:NX-LIMITS INT2\S17:NW2 INT3-MODBUS\S09:SETPOINTS ?

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-11-25

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/T3/C002/S009 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser INT3-MODBUS S09:SETPOINTS


released:

A4 E

167

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

PANEL_i-pi/nx PANEL_i-pi/UN PANEL_i-pi/ixe PANEL_i-pi/uxMA PANEL_i/Pm INTERN_LoadCell INTERN_i-inching-angle INTERN_cool-CT001-displ INTERN_cool-CT002-displ INTERN_cool-CF001-displ INTERN_cool-CL001-displ INTERN_cool-CP001-displ INTERN_cool-CD001-displ INTERN_cool-CT004-displ INTERN_cool-CT005-displ 0% 0% INTERN_ixR-eff INTERN_ixS-eff INTERN_ixT-eff INTERN_s>AGP1 INTERN_s>AGP2 INTERN_s>AGP3 INTERN_s>AGP4 INTERN_s>AGP5 INTERN_s>AGP6 INTERN_s>AGP7 INTERN_s>AGP8 INTERN_s>AGP9 INTERN_s>AGP10 INTERN_s>AGP11 LCB-I_CHNr2 LCB-I_CHNr3 LCB-I_CHNr4 LCB-I_CHNr5 LCB-I_CHNr6 LCB-I_CHNr7 LCB-I_CHNr8

I02 I03 I04 I05 I06 I07 I08 I09 I10 I11 I12 I13 I14 I15 I16 I17 I18 I19 I20 I21 I22 I23 I24 I25 I26 I27 I28 I29 I30 I31 I32 SEL2 SEL3 SEL4 SEL5 SEL6 SEL7 SEL8

Y3 Y4 Y5 Y6 Y7 Y8

LCB-O_analog-value3 LCB-O_analog-value4 LCB-O_analog-value5 LCB-O_analog-value6 LCB-O_analog-value7 LCB-O_analog-value8

INPUT CROSSREFERENCE: INTERN_LoadCell INTERN_cool-CD001-displ INTERN_cool-CF001-displ

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_cool-CL001-displ INTERN_cool-CP001-displ INTERN_cool-CT001-displ INTERN_cool-CT002-displ INTERN_cool-CT004-displ INTERN_cool-CT005-displ INTERN_i-inching-angle INTERN_ixR-eff INTERN_ixS-eff INTERN_ixT-eff

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3-MODBUS\S09:SETPOINTS LCB-AFC094\S01:TRANS-ANALOG PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S02:PANL-DISPLAY INT3\S19:INCH-ANGLE LCB-AFC094\S01:TRANS-ANALOG PANEL-AFC094\S02:PANL-DISPLAY INT3\S19:INCH-ANGLE INT2\S27:MOT-POWER LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 PANEL-AFC094\S02:PANL-DISPLAY INT2\S27:MOT-POWER LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 PANEL-AFC094\S02:PANL-DISPLAY INT2\S27:MOT-POWER LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 PANEL-AFC094\S02:PANL-DISPLAY

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

07-02-16

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C003/S001 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser LCB-AFC094 S01:TRANS-ANALOG TRANSFER OF ANALOG SIGNALS TO LCB-DISPLAY

A4 E

168

3BHS135699

INTERN_s>AGP11 INTERN_s>AGP2 INTERN_s>AGP3 INTERN_s>AGP4 INTERN_s>AGP5 INTERN_s>AGP6 INTERN_s>AGP7 INTERN_s>AGP8 INTERN_s>AGP9 LCB-I_CHNr1 LCB-I_CHNr2 LCB-I_CHNr3 LCB-I_CHNr4 LCB-I_CHNr5 LCB-I_CHNr6 LCB-I_CHNr7 LCB-I_CHNr8 PANEL_i-pi/UN PANEL_i-pi/ixe PANEL_i-pi/nref PANEL_i-pi/nx PANEL_i-pi/uxMA PANEL_i/Pm

Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 PANEL-AFC094\S02:PANL-DISPLAY INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 ? LCB-AFC094\S01:TRANS-ANALOG ? LCB-AFC094\S01:TRANS-ANALOG ? LCB-AFC094\S01:TRANS-ANALOG ? LCB-AFC094\S01:TRANS-ANALOG ? LCB-AFC094\S01:TRANS-ANALOG ? LCB-AFC094\S01:TRANS-ANALOG ? LCB-AFC094\S01:TRANS-ANALOG ? LCB-AFC094\S01:TRANS-ANALOG BACKGND\S05:I-ANALOG-ADP LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 PANEL-AFC094\S02:PANL-DISPLAY BACKGND\S05:I-ANALOG-ADP LCB-AFC094\S01:TRANS-ANALOG PANEL-AFC094\S02:PANL-DISPLAY BACKGND\S05:I-ANALOG-ADP LCB-AFC094\S01:TRANS-ANALOG PANEL-AFC094\S02:PANL-DISPLAY BACKGND\S05:I-ANALOG-ADP LCB-AFC094\S01:TRANS-ANALOG PANEL-AFC094\S02:PANL-DISPLAY BACKGND\S05:I-ANALOG-ADP LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 PANEL-AFC094\S02:PANL-DISPLAY INT3\S24:NW-REM-AD,PM LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 PANEL-AFC094\S02:PANL-DISPLAY

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

OUTPUT CROSSREFERENCE: LCB-O_analog-value1 LCB-O_analog-value2 LCB-O_analog-value3 LCB-O_analog-value4 LCB-O_analog-value5 LCB-O_analog-value6 LCB-O_analog-value7

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

LCB-O_analog-value8

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

LCB-AFC094\S01:TRANS-ANALOG ? LCB-AFC094\S01:TRANS-ANALOG ? LCB-AFC094\S01:TRANS-ANALOG ? LCB-AFC094\S01:TRANS-ANALOG ? LCB-AFC094\S01:TRANS-ANALOG ? LCB-AFC094\S01:TRANS-ANALOG ? LCB-AFC094\S01:TRANS-ANALOG ? LCB-AFC094\S01:TRANS-ANALOG ?

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

07-02-16

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C003/S001 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser LCB-AFC094 S01:TRANS-ANALOG TRANSFER OF ANALOG SIGNALS TO LCB-DISPLAY

A4 E

169

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

100ms

T T\ MS o B 3 BIBS .0 .1 .2 .3 .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15 Y LCB-O_DIVERS LCB_C>RESET

LCB_C>LCB-LAMPTEST 1B 0B 0B 0B 0B 0B 0B INTERN_HORN MLCB (Relay-1) 0B 0B 0B 0B 0B 0B 0B

INPUT CROSSREFERENCE: INTERN_HORN LCB-I_RESET LCB-O_RESET LCB_C>LCB-LAMPTEST

Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S18:BRAKE-HORN LCB-AFC094\S02:TRANS-DO ? LCB-AFC094\S02:TRANS-DO LCB-AFC094\S03:AFC094-LED LCB-AFC094\S02:TRANS-DO INT3\S04:LCB-IN1 LCB-AFC094\S02:TRANS-DO

OUTPUT CROSSREFERENCE: LCB-O_DIVERS LCB_C>RESET

Source: Sink : Source: Sink :

LCB-AFC094\S02:TRANS-DO ? LCB-AFC094\S02:TRANS-DO PANEL-AFC094\S03:PANEL-OUT INT3\S21:RESET/LT

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C003/S002 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser LCB-AFC094 S02:TRANS-DO TRANSFER OF DIGITAL SIGNALS TO LCB-DISPLAY

A4 E

170

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

PANEL_PI*LED:MILL-ON INTERN_FASTER INTERN_REVERSE INTERN_LCB-MAN-LOWER INTERN_LampTEST INTERN_INCHING PANEL_PI*LED-AUX-OFF PANEL_PI*LED-MVD-OFF PANEL_PI*LED:MILL-STOP INTERN_SLOWER INTERN_LCB-RE-ROCKING INTERN_CREEPING INTERN_NORMAL

.2 .3 o .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15 Y LCB-O_LED:F1-F16 LCB-O_RESET 2 TRAN B

PANEL_C>RESET

INPUT CROSSREFERENCE: INTERN_CREEPING

INTERN_FASTER INTERN_INCHING

INTERN_LCB-MAN-LOWER INTERN_LCB-RE-ROCKING INTERN_LampTEST INTERN_NORMAL INTERN_REVERSE

INTERN_SLOWER PANEL_C>RESET PANEL_PI*LED-AUX-OFF PANEL_PI*LED-AUX-ON PANEL_PI*LED-MVD-OFF PANEL_PI*LED-MVD-ON PANEL_PI*LED:MILL-ON PANEL_PI*LED:MILL-STOP

Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT2\S14:START-PARS INT2\S23:EXCITAT-1 INT2\S17:NW2 Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S05:LED-CONTROL1 INT3\S19:INCH-ANGLE INT2\S16:NW1 Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S19:INCH-ANGLE INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 INT3\S12:PRIOSEL-4 INT2\S14:START-PARS INT2\S32:ANGLECAPTUR Source: INT3\S11:PRIOSEL-3 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S18:BRAKE-HORN Source: INT3\S11:PRIOSEL-3 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S18:BRAKE-HORN Source: INT3\S21:RESET/LT Sink : LCB-AFC094\S03:AFC094-LED BACKGND\S06:SELECT-IND PANEL-AFC094\S04:LED:F1-F16 PANEL-AFC094\S03:PANEL-OUT INT3\S22:STATU Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S04:COMMAND-1 INT3\S18:BRAKE-HORN INT3\S11:PRIOSEL-3 Source: INT3\S12:PRIOSEL-4 Sink : INT1\S13:PHASE-SHIFT2 LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S03:STATUS-1 INT1\S12:PHASE-SHIFT1 PANEL-AFC094\S05:LED-CO INT2\S14:START-PARS INT2\S19:ROCK-STOP INT2\S18:CONTROL-N INT2\S13:NX INT2\S17:NW2 Source: INT3\S12:PRIOSEL-4 Sink : LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S05:LED-CONTROL1 INT3\S19:INCH-ANGLE INT2\S16:NW1 Source: INT3\S02:PANEL-INPUT1 Sink : LCB-AFC094\S03:AFC094-LED INT3\S21:RESET/LT Source: PANEL-AFC094\S06:LED-CONTROL2 Sink : LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S04:LED:F1-F16 Source: PANEL-AFC094\S06:LED-CONTROL2 Sink : LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S04:LED:F1-F16 Source: PANEL-AFC094\S06:LED-CONTROL2 Sink : LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S04:LED:F1-F16 Source: PANEL-AFC094\S06:LED-CONTROL2 Sink : LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S04:LED:F1-F16 Source: INT3\S22:STATUS-INDIC Sink : LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S05:LED-CONTROL1 Source: INT3\S22:STATUS-INDIC Sink : LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S05:LED-CONTROL1

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

OUTPUT CROSSREFERENCE: LCB-O_LED:F1-F16 LCB-O_RESET

Source: Sink : Source: Sink :

LCB-AFC094\S03:AFC094-LED ? LCB-AFC094\S03:AFC094-LED LCB-AFC094\S02:TRANS-DO

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C003/S003 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser LCB-AFC094 S03:AFC094-LED TRANSFER OF DIGITAL SIGNALS TO LCB-LEDS

A4 E

171

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

W PANEL-O_ERROR-BLOCK2 PANEL-O_ERROR-BLOCK3 PANEL-O_ERROR-BLOCK4 PANEL-O_ERROR-BLOCK5 PANEL-O_ERROR-BLOCK6 PANEL-O_ERROR-BLOCK7 PANEL-O_ERROR-BLOCK8 PANEL-O_ERROR-BLOCK9 PANEL-O_ERROR-BLOCK10 3 TRAN W 4 TRAN W 5 TRAN W 6 TRAN W 7 TRAN W 8 TRAN W 9 TRAN W 10 TRAN W 11 TRAN W LCB-O_ERROR-BLOCK2 LCB-O_ERROR-BLOCK3 LCB-O_ERROR-BLOCK4 LCB-O_ERROR-BLOCK5 LCB-O_ERROR-BLOCK6 LCB-O_ERROR-BLOCK7 LCB-O_ERROR-BLOCK8 LCB-O_ERROR-BLOCK9 LCB-O_ERROR-BLOCK10

INPUT CROSSREFERENCE: PANEL-O_ERROR-BLOCK1 PANEL-O_ERROR-BLOCK10 PANEL-O_ERROR-BLOCK2 PANEL-O_ERROR-BLOCK3 PANEL-O_ERROR-BLOCK4 PANEL-O_ERROR-BLOCK5 PANEL-O_ERROR-BLOCK6 PANEL-O_ERROR-BLOCK7 PANEL-O_ERROR-BLOCK8 PANEL-O_ERROR-BLOCK9 PANEL-O_FIRST-FAULT-NR

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT

OUTPUT CROSSREFERENCE: LCB-O_ERROR-BLOCK1 LCB-O_ERROR-BLOCK10 LCB-O_ERROR-BLOCK2 LCB-O_ERROR-BLOCK3 LCB-O_ERROR-BLOCK4 LCB-O_ERROR-BLOCK5 LCB-O_ERROR-BLOCK6 LCB-O_ERROR-BLOCK7

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

LCB-O_ERROR-BLOCK8 LCB-O_ERROR-BLOCK9 LCB-O_FIRST-FAULT-NR

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

LCB-AFC094\S04:TRANS-DEFAUT ? LCB-AFC094\S04:TRANS-DEFAUT ? LCB-AFC094\S04:TRANS-DEFAUT ? LCB-AFC094\S04:TRANS-DEFAUT ? LCB-AFC094\S04:TRANS-DEFAUT ? LCB-AFC094\S04:TRANS-DEFAUT ? LCB-AFC094\S04:TRANS-DEFAUT ? LCB-AFC094\S04:TRANS-DEFAUT ? LCB-AFC094\S04:TRANS-DEFAUT ? LCB-AFC094\S04:TRANS-DEFAUT ? LCB-AFC094\S04:TRANS-DEFAUT ?

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked: released:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C003/S004 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser LCB-AFC094 S04:TRANS-DEFAUT TRANSFER OF ANALOG SIGNALS TO LCB-DISPLAY

A4 E

172

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_BLINK-W B INTERN_cool-temp-CT001 T Conv In 0-100G INTERN_W/COOL-CF001 B B INTERN_cool-flow-CF001 Flow 0-380l/min INTERN_W/COOL-CL001 B B INTERN_cool-level-CL001 Wat Level 0-100% INTERN_W/COOL-CP001 10 >=1 B B INTERN_cool-press-CP001 Wat Press 0-6bar INTERN_W/COOL-CT002 13 >=1 B B INTERN_cool-temp-CT002 T Cv Out 0-100G INTERN_W/COOL-CD001 16 >=1 B B INTERN_cool-cond-CD001 Conduct 0-4uS INTERN_W/COOL-CT004 19 >=1 B B INTERN_cool-temp-CT004 0% INTERN_W/COOL-CT005 22 >=1 B B INTERN_cool-temp-CT005 0% 23 & 20 & 0% 17 & 0% 14 & 0% 11 & 0% 7 >=1 8 & 0% 4 >=1 5 & 0%

SELX1 X0 X1 % 6 SWI SELX1 X0 X1 % 9 SWI SELX1 X0 X1 % 12 SWI SELX1 X0 X1 % 15 SWI SELX1 X0 X1 % 18 SWI SELX1 X0 X1 % 21 SWI SELX1 X0 X1 % 24 SWI SELX1 X0 X1 % INTERN_cool-CT001-d

INTERN_cool-CF001-d

INTERN_cool-CL001-d

INTERN_cool-CP001-d

INTERN_cool-CT002-d

INTERN_cool-CD001-d

INTERN_cool-CT004-d

INTERN_cool-CT005-d

INPUT CROSSREFERENCE: INTERN_BLINK-W INTERN_F/COOL-POWR-FAIL INTERN_W/COOL-CD001 INTERN_W/COOL-CF001 INTERN_W/COOL-CL001 INTERN_W/COOL-CP001 INTERN_W/COOL-CT001 INTERN_W/COOL-CT002 INTERN_W/COOL-CT004 INTERN_W/COOL-CT005

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

INTERN_cool-cond-CD001 INTERN_cool-flow-CF001 INTERN_cool-level-CL001 INTERN_cool-press-CP001 INTERN_cool-temp-CT001 INTERN_cool-temp-CT002 INTERN_cool-temp-CT004 INTERN_cool-temp-CT005

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3\S21:RESET/LT PANEL-AFC094\S01:COOL-DISPLAY PANEL-AFC094\S06:LED-CONTROL2 INT3\S21:RESET/LT BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY INT3\S07:WARN-EVENT8 BACKGND\S02:COOL-INPUT BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY BACKGND\S02:COOL-INPUT BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY BACKGND\S02:COOL-INPUT BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY BACKGND\S02:COOL-INPUT BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY BACKGND\S02:COOL-INPUT BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY BACKGND\S02:COOL-INPUT BACKGND\S03:COOL-MONITOR BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY BACKGND\S02:COOL-INPUT BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY BACKGND\S02:COOL-INPUT BACKGND\S02:COOL-INPUT PANEL-AFC094\S01:COOL-DISPLAY

OUTPUT CROSSREFERENCE: INTERN_cool-CD001-displ INTERN_cool-CF001-displ

Source: PANEL-AFC094\S01:COOL-DISPLAY Sink : LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S02:PANL-DISPLAY Source: PANEL-AFC094\S01:COOL-DISPLAY

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C002/S001 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser PANEL-AFC094 S01:COOL-DISPLAY


released:

A4 E

173

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_cool-CP001-displ INTERN_cool-CT001-displ INTERN_cool-CT002-displ INTERN_cool-CT004-displ INTERN_cool-CT005-displ

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3

PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S02:PANL-DISPLAY

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C002/S001 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser PANEL-AFC094 S01:COOL-DISPLAY


released:

A4 E

174

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

PANEL-I_CHNr1 PANEL_i-pi/nref PANEL_i-pi/nx PANEL_i-pi/UN PANEL_i-pi/ixe PANEL_i-pi/uxMA PANEL_i/Pm INTERN_LoadCell INTERN_i-inching-angle INTERN_cool-CT001-displ INTERN_cool-CT002-displ INTERN_cool-CF001-displ INTERN_cool-CL001-displ INTERN_cool-CP001-displ INTERN_cool-CD001-displ INTERN_cool-CT004-displ INTERN_cool-CT005-displ 0% 0% INTERN_ixR-eff INTERN_ixS-eff INTERN_ixT-eff INTERN_s>AGP1 INTERN_s>AGP2 INTERN_s>AGP3 INTERN_s>AGP4 INTERN_s>AGP5 INTERN_s>AGP6 INTERN_s>AGP7 INTERN_s>AGP8 INTERN_s>AGP9 INTERN_s>AGP10 INTERN_s>AGP11 PANEL-I_CHNr2 PANEL-I_CHNr3 PANEL-I_CHNr4 PANEL-I_CHNr5 PANEL-I_CHNr6 PANEL-I_CHNr7 PANEL-I_CHNr8

SEL1 I01

Y1 100% Y2

X0 X1 %

PANEL-O_analog-valu PANEL-O_analog-valu PANEL-O_analog-valu PANEL-O_analog-valu PANEL-O_analog-valu PANEL-O_analog-valu PANEL-O_analog-valu PANEL-O_analog-valu

I02 Y3 I03 Y4 I04 Y5 I05 Y6 I06 Y7 I07 Y8 I08 I09 I10 I11 I12 I13 I14 I15 I16 I17 I18 I19 I20 I21 I22 I23 I24 I25 I26 I27 I28 I29 I30 I31 I32 SEL2 SEL3 SEL4 SEL5 SEL6 SEL7 SEL8

Function: -------- Analog Outputs to Control Panel

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

Remarks: ------- For checking the setting of the "Panel down load file" it is useful to set ParamGrp_SCAL-PANEL-VALUE to 1B. All analog signals may be displayed at the first line of the panel and checked for the correct display at rated value (100%).

INPUT CROSSREFERENCE: INTERN_LoadCell INTERN_cool-CD001-displ INTERN_cool-CF001-displ INTERN_cool-CL001-displ INTERN_cool-CP001-displ INTERN_cool-CT001-displ

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INT3-MODBUS\S09:SETPOINTS LCB-AFC094\S01:TRANS-ANALOG PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S02:PANL-DISPLAY

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-02-16

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C002/S002 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser PANEL-AFC094 S02:PANL-DISPLAY


released:

A4 E

175

3BHS135699

Sink : Source: Sink : INTERN_i-inching-angle Source: Sink : INTERN_ixR-eff Source: Sink : INTERN_ixS-eff Source: Sink : INTERN_ixT-eff Source: Sink : INTERN_s>AGP1 Source: Sink : INTERN_s>AGP10 Source: Sink : INTERN_s>AGP11 Source: Sink : INTERN_s>AGP2 Source: Sink : INTERN_s>AGP3 Source: Sink : INTERN_s>AGP4 Source: Sink : INTERN_s>AGP5 Source: Sink : INTERN_s>AGP6 Source: Sink : INTERN_s>AGP7 Source: Sink : INTERN_s>AGP8 Source: Sink : INTERN_s>AGP9 Source: Sink : PANEL-I_CHNr1 Source: Sink : PANEL-I_CHNr2 Source: Sink : PANEL-I_CHNr3 Source: Sink : PANEL-I_CHNr4 Source: Sink : PANEL-I_CHNr5 Source: Sink : PANEL-I_CHNr6 Source: Sink : PANEL-I_CHNr7 Source: Sink : PANEL-I_CHNr8 Source: Sink : PANEL_i-pi/UN Source: Sink : PANEL_i-pi/ixe Source: Sink : PANEL_i-pi/nref Source: Sink : PANEL_i-pi/nx Source: Sink : PANEL_i-pi/uxMA Source: Sink : PANEL_i/Pm Source: Sink : ParamGrp_SCAL-PANEL-VALUE Source: Sink : INTERN_cool-CT005-displ OUTPUT CROSSREFERENCE: PANEL-O_analog-value1 PANEL-O_analog-value2 PANEL-O_analog-value3 PANEL-O_analog-value4 PANEL-O_analog-value5 PANEL-O_analog-value6 PANEL-O_analog-value7 PANEL-O_analog-value8

LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S02:PANL-DISPLAY PANEL-AFC094\S01:COOL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S07:ANALOG-OUT-3 PANEL-AFC094\S02:PANL-DISPLAY INT3\S19:INCH-ANGLE LCB-AFC094\S01:TRANS-ANALOG PANEL-AFC094\S02:PANL-DISPLAY INT3\S19:INCH-ANGLE INT2\S27:MOT-POWER LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 PANEL-AFC094\S02:PANL-DISPLAY INT2\S27:MOT-POWER LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 PANEL-AFC094\S02:PANL-DISPLAY INT2\S27:MOT-POWER LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 PANEL-AFC094\S02:PANL-DISPLAY INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 PANEL-AFC094\S02:PANL-DISPLAY INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 INT2\S30:AIR-GAP-MON1 PANEL-AFC094\S02:PANL-DISPLAY LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S05:ANALOG-OUT-1 ? PANEL-AFC094\S02:PANL-DISPLAY ? PANEL-AFC094\S02:PANL-DISPLAY ? PANEL-AFC094\S02:PANL-DISPLAY ? PANEL-AFC094\S02:PANL-DISPLAY ? PANEL-AFC094\S02:PANL-DISPLAY ? PANEL-AFC094\S02:PANL-DISPLAY ? PANEL-AFC094\S02:PANL-DISPLAY ? PANEL-AFC094\S02:PANL-DISPLAY BACKGND\S05:I-ANALOG-ADP LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 PANEL-AFC094\S02:PANL-DISPLAY BACKGND\S05:I-ANALOG-ADP LCB-AFC094\S01:TRANS-ANALOG PANEL-AFC094\S02:PANL-DISPLAY BACKGND\S05:I-ANALOG-ADP LCB-AFC094\S01:TRANS-ANALOG PANEL-AFC094\S02:PANL-DISPLAY BACKGND\S05:I-ANALOG-ADP LCB-AFC094\S01:TRANS-ANALOG PANEL-AFC094\S02:PANL-DISPLAY BACKGND\S05:I-ANALOG-ADP LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 PANEL-AFC094\S02:PANL-DISPLAY INT3\S24:NW-REM-AD,PM LCB-AFC094\S01:TRANS-ANALOG INT3-MODBUS\S06:ANALOG-OUT-2 PANEL-AFC094\S02:PANL-DISPLAY ? PANEL-AFC094\S02:PANL-DISPLAY

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

PANEL-AFC094\S02:PANL-DISPLAY ? PANEL-AFC094\S02:PANL-DISPLAY ? PANEL-AFC094\S02:PANL-DISPLAY ? PANEL-AFC094\S02:PANL-DISPLAY ? PANEL-AFC094\S02:PANL-DISPLAY ? PANEL-AFC094\S02:PANL-DISPLAY ? PANEL-AFC094\S02:PANL-DISPLAY ? PANEL-AFC094\S02:PANL-DISPLAY ?

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

07-02-16

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C002/S002 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser PANEL-AFC094 S02:PANL-DISPLAY


released:

A4 E

176

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

B INTERN_First-Fault-Nr INTERN_FMO-INT1-1 INTERN_FMO-INT1-2 INTERN_FMO-INT1-3 INTERN_FMO-INT1-4 INTERN_FMO-INT2-5 INTERN_FMO-INT3-6 9 TRANW 10 BIBS .0 .1 .2 .3 .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15 Y INTERN_FMO-INT3-7 12 TRANW 13 BIBS .0 .1 .2 .3 .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 o .14 o .15 Y INTERN_FMO-INT3-8 INTERN_FMO-INT3-9 16 TRANW 17 BIBS .0 .1 .2 .3 .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15 Y INTERN_FMO-INT3-10 BS 19 TRANW PANEL-O_ERROR-BLOCK PANEL-O_ERROR-BLOCK BS 15 TRANW 18 >=1 PANEL-O_ERROR-BLOCK PANEL-O_ERROR-BLOCK BS 14 >=1 PANEL-O_ERROR-BLOCK 3 TRANW 4 TRANW 5 TRANW 6 TRANW 7 TRANW 8 TRANW 11 >=1 PANEL-O_FIRST-FAULT PANEL-O_ERROR-BLOCK PANEL-O_ERROR-BLOCK PANEL-O_ERROR-BLOCK PANEL-O_ERROR-BLOCK PANEL-O_ERROR-BLOCK

0B 0B 0B 0B 0B 0B 0B 0B 0B INTERN_Critical-Stop 0B 0B 0B 0B 0B 0B

0B 0B 0B 0B 0B 0B 0B 0B 0B 0B 0B 0B 0B 0B MODBUS-O_KNIF-STAT-CLOSED MODBUS-O_KNIF-ROT-CLOSED

0B 0B 0B 0B 0B 0B 0B 0B 0B

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

MODBUS-O_NonCritricalStop INTERN_W/Delta-psi-T-> INTERN_W/Delta-psi-T-< MODBUS-O_ProcessInterlock INTERN_Torque-Limit INTERN_SpeedLim-Unet<95 INTERN_Nw-Limit-8-rpm

INPUT CROSSREFERENCE: INTERN_Critical-Stop INTERN_FMO-INT1-1 INTERN_FMO-INT1-2

Source: Sink : Source: Sink : Source:

INT2\S02:TRANSF>60 PANEL-AFC094\S03:PANEL-OUT INT3\S05:FAULT-EVENT6 INT1\S08:FAULT-EVENT1 INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT1\S09:FAULT-EVENT2

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-11-29

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C002/S003 F01/K01


doc. type format language sht. nr.

1
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser PANEL-AFC094 S03:PANEL-OUT


released:

A4 E

177

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_FMO-INT1-4

Source: Sink : INTERN_FMO-INT2-5 Source: Sink : INTERN_FMO-INT3-10 Source: Sink : INTERN_FMO-INT3-6 Source: Sink : INTERN_FMO-INT3-7 Source: Sink : INTERN_FMO-INT3-8 Source: Sink : INTERN_FMO-INT3-9 Source: Sink : INTERN_First-Fault-Nr Source: Sink : INTERN_LampTEST Source: Sink : INTERN_Nw-Limit-8-rpm Source: Sink : INTERN_SpeedLim-Unet<95 Source: Sink : INTERN_Torque-Limit Source: Sink : INTERN_W/Delta-psi-T-< Source: Sink : INTERN_W/Delta-psi-T-> Source: Sink : LCB_C>RESET Source: Sink : MODBUS-O_KNIF-ROT-CLOSED Source: Sink : MODBUS-O_KNIF-STAT-CLOSED Source: Sink : MODBUS-O_NonCritricalStop Source: Sink : MODBUS-O_ProcessInterlock Source: Sink : OUTPUT CROSSREFERENCE: PANEL-O_ERROR-BLOCK1 PANEL-O_ERROR-BLOCK10 PANEL-O_ERROR-BLOCK2 PANEL-O_ERROR-BLOCK3 PANEL-O_ERROR-BLOCK4 PANEL-O_ERROR-BLOCK5 PANEL-O_ERROR-BLOCK6 PANEL-O_ERROR-BLOCK7 PANEL-O_ERROR-BLOCK8 PANEL-O_ERROR-BLOCK9 PANEL-O_FIRST-FAULT-NR PANEL-O_LAMPTEST

INT1\S11:FAULT-EVENT4 INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT2\S03:FAULT-EVENT5 INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT3\S09:WARN-EVENT10 INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT3\S05:FAULT-EVENT6 INT1\S07:SUMMARY-F/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT3\S06:WARN-EVENT7 INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT3\S07:WARN-EVENT8 INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT3\S08:WARN-EVENT9 INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT3\S23:FIRST-T/W INT3-MODBUS\S02:FAULTS PANEL-AFC094\S03:PANEL-OUT INT3\S21:RESET/LT LCB-AFC094\S03:AFC094-LED BACKGND\S06:SELECT-IND PANEL-AFC094\S04:LED:F1-F16 PANEL-AFC094\S03:PANEL-OUT INT3\S22:STATU INT2\S15:NX-LIMITS PANEL-AFC094\S03:PANEL-OUT INT3-MODBUS\S03:STATUS-1 INT2\S15:NX-LIMITS INT2\S15:NX-LIMITS PANEL-AFC094\S03:PANEL-OUT INT2\S15:NX-LIMITS PANEL-AFC094\S03:PANEL-OUT INT1\S24:TRAPEZ PANEL-AFC094\S03:PANEL-OUT INT1\S24:TRAPEZ PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S02:TRANS-DO PANEL-AFC094\S03:PANEL-OUT INT3\S21:RESET/LT INT3-MODBUS\S08:MODBUS-OUT2 PANEL-AFC094\S03:PANEL-OUT INT3\S17:MILL-ON,WR INT3-MODBUS\S08:MODBUS-OUT2 PANEL-AFC094\S03:PANEL-OUT INT3\S17:MILL-ON,WR INT3-MODBUS\S01:MODBUS-OUT1 PANEL-AFC094\S03:PANEL-OUT INT3\S08:WARN-EVENT9 INT3\S16:START/STOP INT3-MODBUS\S08:MODBUS-OUT2 PANEL-AFC094\S03:PANEL-OUT INT3\S08:WARN-EVENT9 INT3\S16:START/STOP

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PANEL-O_RESET

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT PANEL-AFC094\S03:PANEL-OUT LCB-AFC094\S04:TRANS-DEFAUT PANEL-AFC094\S03:PANEL-OUT ? PANEL-AFC094\S03:PANEL-OUT INT3\S02:PANEL-INPUT1

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-11-29

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C002/S003 F01/K01


doc. type format language sht. nr.

2
nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser PANEL-AFC094 S03:PANEL-OUT


released:

A4 E

178

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

PANEL_LED-F3 PANEL_LED-F4 PANEL_LED-F5 PANEL_LED-F6 INTERN_LampTEST PANEL_PI*LED-CENTRAL PANEL_PI*LED-AUX-OFF PANEL_PI*LED-MVD-OFF PANEL_LED-F11 PANEL_LED-F12 PANEL_LED-F13 PANEL_LED-F14 INTERN_LCB-SEL PANEL_PI*LED-LOCAL

.2 .3 .4 .5 .6 .7 .8 .9 .10 .11 .12 .13 .14 .15 Y PANEL-O_LED:F1-F16

INPUT CROSSREFERENCE: INTERN_LCB-SEL

INTERN_LampTEST PANEL_LED-F11 PANEL_LED-F12 PANEL_LED-F13 PANEL_LED-F14 PANEL_LED-F3 PANEL_LED-F4 PANEL_LED-F5 PANEL_LED-F6 PANEL_PI*LED-AUX-OFF PANEL_PI*LED-AUX-ON PANEL_PI*LED-CENTRAL PANEL_PI*LED-LOCAL PANEL_PI*LED-MVD-OFF PANEL_PI*LED-MVD-ON

Source: BACKGND\S04:MODE-SELECT Sink : INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 PANEL-AFC094\S04:LED:F1-F16 INT3\S14:START-UP-AUX INT3\S11:PRIO INT3\S22:STATUS-INDIC INT3\S16:START/STOP INT3\S21:RESET/LT INT3\S12:PRIOSEL-4 Source: INT3\S21:RESET/LT Sink : LCB-AFC094\S03:AFC094-LED BACKGND\S06:SELECT-IND PANEL-AFC094\S04:LED:F1-F16 PANEL-AFC094\S03:PANEL-OUT INT3\S22:STATU Source: PANEL-AFC094\S05:LED-CONTROL1 Sink : PANEL-AFC094\S04:LED:F1-F16 Source: PANEL-AFC094\S05:LED-CONTROL1 Sink : PANEL-AFC094\S04:LED:F1-F16 Source: PANEL-AFC094\S05:LED-CONTROL1 Sink : PANEL-AFC094\S04:LED:F1-F16 Source: PANEL-AFC094\S05:LED-CONTROL1 Sink : PANEL-AFC094\S04:LED:F1-F16 Source: PANEL-AFC094\S05:LED-CONTROL1 Sink : PANEL-AFC094\S04:LED:F1-F16 Source: PANEL-AFC094\S05:LED-CONTROL1 Sink : PANEL-AFC094\S04:LED:F1-F16 Source: PANEL-AFC094\S05:LED-CONTROL1 Sink : PANEL-AFC094\S04:LED:F1-F16 Source: PANEL-AFC094\S05:LED-CONTROL1 Sink : PANEL-AFC094\S04:LED:F1-F16 Source: PANEL-AFC094\S06:LED-CONTROL2 Sink : LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S04:LED:F1-F16 Source: PANEL-AFC094\S06:LED-CONTROL2 Sink : LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S04:LED:F1-F16 Source: PANEL-AFC094\S06:LED-CONTROL2 Sink : PANEL-AFC094\S04:LED:F1-F16 Source: PANEL-AFC094\S06:LED-CONTROL2 Sink : PANEL-AFC094\S04:LED:F1-F16 Source: PANEL-AFC094\S06:LED-CONTROL2 Sink : LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S04:LED:F1-F16 Source: PANEL-AFC094\S06:LED-CONTROL2 Sink : LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S04:LED:F1-F16

OUTPUT CROSSREFERENCE: PANEL-O_LED:F1-F16

Source: PANEL-AFC094\S04:LED:F1-F16 Sink : ?

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C002/S004 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser PANEL-AFC094 S04:LED:F1-F16


released:

A4 E

179

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_REVERSE PANEL_C>LOCAL-F6 Selective Indic. PANEL_PI*LED:MILL-STOP INTERN_SLOWER

PANEL_S>F14 Select Testprog. INPUT CROSSREFERENCE: INTERN_FASTER INTERN_REVERSE

B 3 o TRAN B 4 TRAN B 5 TRAN B 6 TRAN B 7 TRAN B 8 TRAN B

PANEL_LED-F5 PANEL_LED-F6 PANEL_LED-F11 PANEL_LED-F12 PANEL_LED-F13 PANEL_LED-F14

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_SLOWER PANEL_C>LOCAL-F6 PANEL_PI*LED:MILL-ON PANEL_PI*LED:MILL-STOP PANEL_S>F14

INT3\S12:PRIOSEL-4 LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S05:LED-CONTROL1 INT3\S19:INCH-ANGLE INT2\S16:NW1 INT3\S12:PRIOSEL-4 INT1\S13:PHASE-SHIFT2 LCB-AFC094\S03:AFC094-LED INT3-MODBUS\S03:STATUS-1 INT1\S12:PHASE-SHIFT1 PANEL-AFC094\S05:LED-CO INT2\S14:START-PARS INT2\S19:ROCK-STOP INT2\S18:CONTROL-N INT2\S13:NX INT2\S17:NW2 INT3\S12:PRIOSEL-4 LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S05:LED-CONTROL1 INT3\S19:INCH-ANGLE INT2\S16:NW1 INT3\S03:PANEL-INPUT2 BACKGND\S01:SELECT-DECO PANEL-AFC094\S05:LED-CONTROL1 INT3\S22:STATUS-INDIC LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S05:LED-CONTROL1 INT3\S22:STATUS-INDIC LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S05:LED-CONTROL1 INT3\S02:PANEL-INPUT1 PANEL-AFC094\S05:LED-CONTROL1 INT3\S03:PANEL-INPUT2

OUTPUT CROSSREFERENCE: PANEL_LED-F11 PANEL_LED-F12 PANEL_LED-F13 PANEL_LED-F14 PANEL_LED-F3 PANEL_LED-F4 PANEL_LED-F5 PANEL_LED-F6

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

PANEL-AFC094\S05:LED-CONTROL1 PANEL-AFC094\S04:LED:F1-F16 PANEL-AFC094\S05:LED-CONTROL1 PANEL-AFC094\S04:LED:F1-F16 PANEL-AFC094\S05:LED-CONTROL1 PANEL-AFC094\S04:LED:F1-F16 PANEL-AFC094\S05:LED-CONTROL1 PANEL-AFC094\S04:LED:F1-F16 PANEL-AFC094\S05:LED-CONTROL1 PANEL-AFC094\S04:LED:F1-F16 PANEL-AFC094\S05:LED-CONTROL1 PANEL-AFC094\S04:LED:F1-F16 PANEL-AFC094\S05:LED-CONTROL1 PANEL-AFC094\S04:LED:F1-F16 PANEL-AFC094\S05:LED-CONTROL1 PANEL-AFC094\S04:LED:F1-F16

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C002/S005 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser PANEL-AFC094 S05:LED-CONTROL1


released:

A4 E

180

3BHS135699

All rights are reserved for this drawing, even in case o of a patent and registration of another industrial right. cation, in particular reproduction or handling over to th is prohibited; it is civilly and criminally actionable.

INTERN_LOCAL-SEL B 2 INTERN_AUX-RUNNING INTERN_AUX-ON INTERN_BLINK-W B B 5 & o B 6 & o 8 INTERN_MVD-ON INTERN_MVD1-ON CB-Stator B o & 9 >=1 B B 10 7 3 >=1 o &

&

PANEL_PI*LED-AUX-ON B &

PANEL_PI*LED-AUX-OF &

PANEL_PI*LED-MVD-ON B 11 & o B 12 & INTERN_C>SERVICE B 13 & o B 15 o INTERN_CENTRAL-SEL B INPUT CROSSREFERENCE: INTERN_AUX-ON INTERN_AUX-RUNNING INTERN_BLINK-W INTERN_C>SERVICE INTERN_CENTRAL-SEL B & B 16 >=1 PANEL_PI*LED-CENTRA PANEL_PI*LED-LOCAL 14 >=1 PANEL_PI*LED-MVD-OF B

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

INTERN_LCB-SEL

INTERN_LOCAL-SEL INTERN_MVD-ON INTERN_MVD1-ON ParamGrp_AFC094-LED-ON

INT3\S13:START-UP-AUX PANEL-AFC094\S06:LED-CONTROL2 INT3\S14:START-UP-AUX INT3\S13:START-UP-AUX INT3\S13:START-UP-AUX INT3\S16:START/STOP BACKGND\S03:COOL-MONITOR PANEL-AFC094\S06:LED-CONTROL2 INT3\S15:MVD-ON-OFF INT3\S17:MILL-ON,WR INT3\S21:RESET/LT PANEL-AFC094\S01:COOL-DISPLAY PANEL-AFC094\S06:LED-CONTROL2 INT3\S21:RESET/LT INT3\S03:PANEL-INPUT2 BACKGND\S04:MODE-SELECT PANEL-AFC094\S06:LED-CONTROL2 INT3\S14:START-UP-AUX BACKGND\S04:MODE-SELECT INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 INT3\S18:BRAKE-HORN INT3\S14:START-UP-AUX INT3\S11:PRIOSEL-3 INT3\S10:PRIOSEL-2 INT3\S15:MVD-ON-OFF INT3\S16:START/STOP INT3\S17:MILL-ON,WR INT3\S12:PRIOSEL-4 INT2\S17:NW2 INT2\S1 BACKGND\S04:MODE-SELECT INT3-MODBUS\S03:STATUS-1 PANEL-AFC094\S06:LED-CONTROL2 PANEL-AFC094\S04:LED:F1-F16 INT3\S14:START-UP-AUX INT3\S11:PRIO INT3\S22:STATUS-INDIC INT3\S16:START/STOP INT3\S21:RESET/LT INT3\S12:PRIOSEL-4 BACKGND\S04:MODE-SELECT PANEL-AFC094\S06:LED-CONTROL2 INT3\S14:START-UP-AUX INT3\S10:PRIOSEL-2 INT3\S22:STATUS-INDIC INT3\S12:PRIOSEL-4 INT3\S15:MVD-ON-OFF PANEL-AFC094\S06:LED-CONTROL2 INT3\S15:MVD-ON-OFF INT3\S16:START/STOP INT3\S17:MILL-ON,WR INT3\S15:MVD-ON-OFF INT1\S07:SUMMARY-F/W PANEL-AFC094\S06:LED-CONTROL2 INT3\S15:MVD-ON-OFF ? PANEL-AFC094\S06:LED-CONTROL2 INT3\S22:STATUS-INDIC

OUTPUT CROSSREFERENCE: PANEL_PI*LED-AUX-OFF PANEL_PI*LED-AUX-ON PANEL_PI*LED-CENTRAL

Fr diese Zeichnung behalten wir uns alle Rechte, auch fr den Fall der Patenterteilung und der Eintragung eines anderen gewerblichen Schutzrechtes, vor. Missbruchliche Verwendung, wie insbesondere Vervielfltigung und Weitergabe an Dritte ist nicht gestattet; sie kann zivil- und strafrechtlich geahndet werden.

PANEL_PI*LED-LOCAL PANEL_PI*LED-MVD-OFF PANEL_PI*LED-MVD-ON

Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink : Source: Sink :

PANEL-AFC094\S06:LED-CONTROL2 LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S04:LED:F1-F16 PANEL-AFC094\S06:LED-CONTROL2 LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S04:LED:F1-F16 PANEL-AFC094\S06:LED-CONTROL2 PANEL-AFC094\S04:LED:F1-F16 PANEL-AFC094\S06:LED-CONTROL2 PANEL-AFC094\S04:LED:F1-F16 PANEL-AFC094\S06:LED-CONTROL2 LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S04:LED:F1-F16 PANEL-AFC094\S06:LED-CONTROL2 LCB-AFC094\S03:AFC094-LED PANEL-AFC094\S04:LED:F1-F16

PSR FUPLA2 Release 4.B1


derived from:

Johannes Gonser

issued: checked: std. checked:

05-08-26

change

replaces: replaced by: office resp.:

Updated 01-06-07 / Rev_2.3 CP016/B0/P0/TB/C002/S006 F01/K01


doc. type format language sht. nr. nr. of shts.

Collahuasi Project SAG Mill / Run Program

ATBDE / J.Gonser PANEL-AFC094 S06:LED-CONTROL2


released:

A4 E

181

3BHS135699