5 4 3 2 1

Revision History Index

D D

Revision Date Comments 01:Revision History and Index 1

1.0 2011-9-1 02:Function Block Diagram 2
1.0 2011-11-25
CON3 CON46PIN4pin 03:S5PV210 (SYS)/Boot Option 3

04:S5PV210(Memory) 4

05:S5PV210 (Media) 5

06:S5PV210 (Power) 6
C
07:NAND Flash 7 C

08:Memory(DDR2) 8

09:Reset/JTAG/AD/EEPROM/UARTS/SD/Clock 9

10:LCD Interface/MIPI 10

11:Audio 11

12:Ethnet 12

13:System Power 13

B 14: Board connector 14 B

15:ID Mark/Fixed Hold 15

A A

Title
Mini210s,Designed by FriendlyARM in Guangzhou

Size Document Number Rev

A3 Revision History and Index

Date: Saturday, May 19, 2012 Sheet 1 of 15

5 4 3 2 1
 5 4 3 2 1

Memory 4 x16
NAND Flash
(DDR2) 256/512M byte

D
XOM3 SD/NAND D

40PIN LCD

Reset/
2x5 2.0mm JTAG
41PIN LCD

C 2 X TF(CH0
CH1) C

4x uart
UART0

UART0~36pin
S5PV210
TV OUT

EEPROM

SD WIFI
2X10

B B
Camera A/B
2X10

IRDA

WM8960 USB HOST 4 key MINI HDMI

10/100M
USB OTG 4 Led
A
Ethnet A

CODEC

Title
Mini210s,Designed by FriendlyARM in Guangzhou

Size Document Number Rev

A3 Function Block Diagram

Date: Saturday, May 19, 2012 Sheet 2 of 15

5 4 3 2 1
 5 4 3 2 1

BootingMode Option
U1A

[9] XuRXD0 C8 XuRXD0/GPA0_0 XjTRSTn P5 XjTRSTn [9] VDD_SYS_3.3V S2

[9] XuTXD0 D8 XuTXD0/GPA0_1 [JTAG] XjTMS R5 XjTMS [9]
D9 U4 S300
[9] XuCTSn0 XuCTSn0/GPA0_2 XjTCK XjTCK [9]
D
[9] XuRTSn0 A7 XuRTSn0/GPA0_3 UART/IrDA XjTDI T5 XjTDI [9] D
1 2 3 4 5
XjTDO W3 XjTDO 100K
[9]
G10 P3 R1 DGND
[9] XuRXD1 XuRXD1/GPA0_4 XjDBGSEL 1 2 3 4 5
F10 R2 R3 R4 R5 R6 R7
[9] XuTXD1 XuTXD1/GPA0_5 XOM0
[9] XuCTSn1 B8 XuCTSn1/GPA0_6 XOM0 T23
E10 T22 XOM1 10K/NC 10K 10K/NC XOM3 R23 0R/NC
[9] XuRTSn1 XuRTSn1/GPA0_7 XOM1 XOM2 XM1 , XM2, XM3 10K 10K/NC 10K/NC XOM1 R16 0R
[SYSTEM XOM2 V23
SD
AC20 U21 XOM3
[9] XuRXD2 XuRXD2/UART_AUDIO_RXD/GPA1_0 OPTION] XOM3 XOM4 XOM0 R8 10K
[9] XuTXD2 AC14 XuTXD2/UART_AUDIO_TXD/GPA1_1 XOM4 V25
V24 XOM5 XOM1 R9 10K/NC R17
XOM5 VDD_SYS_3.3V VDD_5V VDD_SYS_3.3V XOM2 R10 10K/NC
[9] XuRXD3 AC13 XuRXD3/CTSn2/UART_AUDIO_CTSn/GPA1_2
AB13 U24 XOM3 R11 10K 200R
[9] XuTXD3 XuTXD3/RTSn2/UART_AUDIO_RTSn/GPA1_3 XXTI XXTI [9]
[CLOCK] U25 XOM4 R12 10K
XXTO XXTO [9] XOM5 R13 10K
[15] XspiCLK0 B7 XspiCLK0/GPB0 XusbXTI AD20 XusbXTI [9]
E9 AE20 R211R208 R209R212
[15] XspiCS0 XspiCSn0/GPB1 SYSTEM XusbXTO XusbXTO [9]

XOM5
XOM4
XOM3
XOM2
XOM1
XOM0
[15] XspiMISO0 J9 XspiMISO0/GPB2 XCLKOUT AE24 XCLKOUT XOM[5:0]
J11 Y2 10K 10K 10K 10K/NC DGND DGND
[15] XspiMOSI0 XspiMOSI0/GPB3 XhdmiXTI XhdmiXTI [9]
HS-SPI XhdmiXTO Y1 XhdmiXTO [9]
[15] XspiCLK1 G12 XspiCLK1/GPB4
[15] XspiCS1 B11 XspiCSn1/GPB5 XnWRESET T21 XnW RESET
[15] XspiMISO1 G13 XspiMISO1/GPB6 [RESET] XnRESET U23 XnRESET [9] U51 VDD_SYS_3.3V
[15] XspiMOSI1 A11 XspiMOSI1/GPB7 XnRSTOUT T20 XnRSTOUT [10,13,15]
1 nc
AE19 U22 R18 0R/NC XPW RRGTON [14,15] 5
[15] XuhDP XuhDP XPWRRGTON XOM1 VCC
[15] XuhDN AD19 XuhDM 2 A
AC17 T24 R20 4 R14 0R XOM2
DGND
R19 44.2K,1% AD23
XuhREXT USB HOST2.0 XrtcXTI
T25
XrtcXTI [9] TP4
3
Y R15 0R XOM3
XuhPWREN XrtcXTO XrtcXTO [9] XPW RRGTON GND
AC22 XuhOVERCUR
R22 XRTCCLKO 10K/NC 74LVC1G04
C XRTCCLKO DGND C
[15] Base_XuoDP AD21 XuoDP
AE21 AD4 R21 0R DGND
[15] Base_XuoDM XuoDM XefFSOURCE DGND
DGND AE18 XuoREXT USB OTG 2.0
R22 44.2K,1% AD18 E8
[15] XuoID XuoID XpwmTOUT0/GPD0_0 XpwmTOUT0 [15]
[15] XuoVBUS AC18 XuoVBUS XpwmTOUT1/GPD0_1 B9 XpwmTOUT1 [10]
[15] XuoDRVVBUS AC19 XuoDRVVBUS XpwmTOUT2/GPD0_2 A8 XpwmTOUT2 [15]
XpwmTOUT3/PWM_MIE/GPD20_3 F12 XpwmTOUT3 [15]
AD2 XOM0
[11] Audio_Xi2sSCLK0 Xi2sSCLK0/PCM_SCLK2 OM0
AC4 XOM1
[11] Audio_Xi2sCDCLK0 Xi2sCDCLK0/PCM_EXTCLK2 OM1
AE3 XOM2
[11] Audio_Xi2sLRCK0
AE2
Xi2sLRCK0/PCM_FSYNC2 PWM Timer XOM3
OM2
[11] Audio_Xi2sSDI0 Xi2sSDI0/PCM_SIN2 OM3
AD3 XOM4
[11] Audio_Xi2sSDO0_0 Xi2sSDO0_0/PCM_SOUT2 OM4
AC3 Y21 XOM5
AA3
Xi2sSDO0_1 I2S/PCM/AC97 XEINT0/GPH0_0
W25
XEINT0 [15] OM5
Xi2sSDO0_2 XEINT1/GPH0_1 XEINT1 [15]
XEINT2/GPH0_2 W23 XEINT2 [15]
Xi2sCLK1/PCM_SCLK1/AC97_BITCLK AD1 Xi2sSCLK1/PCM_SCLK1/AC97BITCLK/GPC0_0 XEINT3/GPH0_3 Y25 XEINT3 [15]
AB3 AA22 OM5 OM4 OM3 OM2 OM1 OM0
Xi2sCDCLK1/PCM_EXTCLK1/AC97_RESETn Xi2sCDCLK1/PCM_EXTCLK1/AC97RESETn/GPC0_1 XEINT4/GPH0_4 XEINT4 [10,15]
Xi2sLRCK1/PCM_FSYNC1/AC97_SYNC AC2 Xi2sLRCK1/PCM_FSYNC1/AC97SYNC/GPC0_2 XEINT5/GPH0_5 W24 XEINT5 [10,15] SDBOOT 0 0 1 1 0 0
Xi2sSDI1/PCM_SIN1/AC97_SDI AA5 Xi2sSDI1/PCM_SIN1/AC97SDI/GPC0_3 XEINT6/GPH0_6 W21 XEINT6 [10,15]
AB4 AA25 Nand 2KB,
Xi2sSDO1/PCM_SOUT1/AC97_SDO Xi2sSDO1/PCM_SOUT1/AC97SDO/GPC0_4 EINT XEINT7/GPH0_7
V20
XEINT7 [13] 5cycle 0 0 0 0 1 0
XEINT8/GPH1_0 XEINT8 [15] (Nand 8bit ECC)
XpcmSCLK0/SPDIF_OUT0/Xi2sSCLK2 AA2 XpcmSCLK0/SPDIF_OUT0/Xi2sSCLK2/GPC1_0 KEYPAD XEINT9/GPH1_1 V22 XEINT9 [15]
Nand 4KB,
XpcmEXTCLK0/SPDIF_EXTCLK/Xi2sCDCLK2 AA1 XpcmEXTCLK0/SPDIF_EXTCLK/Xi2sCDCLK2/GPC1_1 XEINT10/GPH1_2 Y24 XEINT10 [10]
AB1 W22 TP5 5cycle 0 0 0 1 0 0
XpcmFSYNC0/LCD_FRM/Xi2sLRCK2 XpcmFSYNC0/LCD_FRM/Xi2sLRCK2/GPC1_2 XEINT11/GPH1_3 USBOTG_OVERCUR [15] (Nand 8bit ECC)
XpcmSIN0/Xi2sSDI2 AB2 XpcmSIN0/Xi2sSDI2/GPC1_3 XEINT12/HDMI_CEC/GPH1_4 AA24 HDMI_CEC [15]
AC1 AC23 Nand 4KB,
XpcmSOUT0/Xi2sSDO2 XpcmSOUT0/Xi2sSDO2/GPC1_4 XEINT13/HDMI_HPD/GPH1_5 HDMI_HPD [15] 5cycle (default) 0 0 0 1 1 0
XEINT14/GPH1_6 AB25 XEINT14/GPH1_6 [10]
B5 W20 (Nand 16bit ECC)
[9] XmmcCLK0 XmmcCLK0/GPG0_0 XEINT15/GPH1_7 XEINT15/GPH1_7 [10]
[9] XmmcCMD0 E6 XmmcCMD0/GPG0_1 XEINT16/KP_COL0/GPH2_0 U20 XEINT16/KP_COL0 [15]
B B
[9] Xmmc0CDn F7 Xmmc0CDn/GPG0_2 XEINT17/KP_COL1/GPH2_1 Y23 XEINT17/KP_COL1 [15]
[9] Xmmc0DATA0 C5 Xmmc0DATA0/GPG0_3 HS-MMC XEINT18/KP_COL2/GPH2_2 V21 XEINT18/KP_COL2 [15]
[9] Xmmc0DATA1 A5 Xmmc0DATA1/GPG0_4 XEINT19/KP_COL3/GPH2_3 AB24 XEINT19/KP_COL3 [15]
[9] Xmmc0DATA2 D6 Xmmc0DATA2/GPG0_5 XEINT20/KP_COL4/GPH2_4 AA21 XEINT20/KP_COL4 [15]
[9] Xmmc0DATA3 C6 Xmmc0DATA3/GPG0_6 XEINT21/KP_COL5/GPH2_5 AA23 XEINT21/KP_COL5 [15]
XEINT22/KP_COL6/GPH2_6 AC25 XEINT22/KP_COL6 [15]
XmmcCLK1 B6 Xmmc1CLK/GPG1_0 XEINT23/KP_COL7/GPH2_7 Y20 XEINT23/KP_COL7 [15]
XmmcCMD1 F8 Xmmc1CMD/GPG1_1 XEINT24/KP_ROW0/GPH3_0 AC24 XEINT24/KP_ROW 0 [15]
XmmcCDn1 C7 Xmmc1CDn/GPG1_2 XEINT25/KP_ROW1/GPH3_1 AB22 XEINT25/KP_ROW 1 [15]
Xmmc1DATA0 D7 Xmmc1DATA0/Xmmc0DATA4/GPG1_3 XEINT26/KP_ROW2/GPH3_2 AD25 XEINT26/KP_ROW 2 [15]
Xmmc1DATA1 E7 Xmmc1DATA1/Xmmc0DATA5/GPG1_4 XEINT27/KP_ROW3/GPH3_3 Y22 XEINT27/KP_ROW 3 [15]
Xmmc1DATA2 A6 Xmmc1DATA2/Xmmc0DATA6/GPG1_5 XEINT28/KP_ROW4/GPH3_4 AD24 XEINT28/KP_ROW 4 [15]
Xmmc1DATA3 F9 Xmmc1DATA3/Xmmc0DATA7/GPG1_6 XEINT29/KP_ROW5/GPH3_5 AA20 XEINT29/KP_ROW 5 [15]
XEINT30/KP_ROW6/GPH3_6 Y19 XEINT30/KP_ROW 6 [15]
[15] XmmcCLK2 Y6 Xmmc2CLK/SPI_CLK2/GPG2_0 XEINT31/KP_ROW7/GPH3_7 AB23 XEINT31/KP_ROW 7 [15]
[15] XmmcCMD2 W6 Xmmc2CMD/SPI_CSn2/GPG2_1
[15] XmmcCDn2 AA4 Xmmc2CDn/SPI_MISO2/GPG2_2 Xi2cSDA0/GPD1_0 F11 Xi2cSDA0 [9,11,15]
Y4 C9 CODEC/EEPROM/CAMERA A/SD WIFI
[15] Xmmc2DATA0 Xmmc2DATA0/SPI_MOSI2/GPG2_3 Xi2cSCL0/GPD1_1 Xi2cSCL0 [9,11,15]
[15] Xmmc2DATA1 Y5 Xmmc2DATA1/GPG2_4 Xi2cSDA1/GPD1_2 AE23 Xi2cSDA1 [15]
Y3 AD22 CAMERA B/HDMI
[15] Xmmc2DATA2
W4
Xmmc2DATA2/GPG2_5 I2C Xi2cSCL1/GPD1_3
AC16
Xi2cSCL1 [15]
[15] Xmmc2DATA3 Xmmc2DATA3/GPG2_6 Xi2cSDA2/IEM_SCLK/GPD1_4 Xi2cSDA2 [10,15] TOUCH PANAL
Xi2cSCL2/IEM_SPWI/GPD1_5 AE22 Xi2cSCL2 [10,15]
XmmcCLK3 A9 Xmmc3CLK/GPG3_0
XmmcCMD3 D10 Xmmc3CMD/GPG3_1 VDD_SYS_3.3V
E11 R24 4.7K
XmmcCDn3 Xmmc3CDn
B10 R21 R25 4.7K
Xmmc3DATA0 Xmmc3DATA0/Xmmc2DATA4/GPG3_3 NC/EPLL(evt1) R26 4.7K
Xmmc3DATA1 C10 Xmmc3DATA1/Xmmc2DATA5/GPG3_4 EPLL Filter
D11 C1 R27 4.7K
Xmmc3DATA2 Xmmc3DATA2/Xmmc2DATA6/GPG3_5 R28 4.7K
A Xmmc3DATA3 A10 Xmmc3DATA3/Xmmc2DATA7/GPG3_6 A
1.8nF R29 4.7K

S5PV210 DGND

Title
Mini210s,Designed by FriendlyARM in Guangzhou

Size Document Number Rev

A3 S5PV210 (SYS)/Boot Option

Date: Saturday, May 19, 2012 Sheet 3 of 15

5 4 3 2 1
 5 4 3 2 1

VDD_SYS_3.3V

[13] Xm0ADDR[15:0] Xm0ADDR0 K5 Xm0ADDR0/MP04_0

Xm0ADDR1 L7 U3
Xm0ADDR1/MP04_1 Xm0CSn0/MP01_0 Xm0CSn0

4.7K
4.7K

4.7K

4.7K

4.7K
Xm0ADDR2 J4 T4
Xm0ADDR3 Xm0ADDR2/MP04_2 Xm0CSn1/MP01_1 Xm0CSn1 [13]
H5 Xm0ADDR3/MP04_3 Xm0CSn2/NFCSn0/MP01_2 J1 Xm0CSn2/NFCSn0 [7]
Xm0ADDR4 J6 N9
Xm0ADDR5 Xm0ADDR4/MP04_4 Xm0CSn3/NFCSn1/MP01_3 Xm0CSn3/NFCSn1 [7]
K4 Xm0ADDR5/MP04_5 Xm0CSn4/NFCSn2/ONANDXL_CSn0/MP01_4 N3
Xm0ADDR6 K6 N7
Xm0ADDR6/MP04_6 Xm0CSn5/NFCSn3/ONANDXL_CSn1/MP01_5

R30

R31

R32

R33

R34
Xm0ADDR7 J5 R4
Xm0ADDR8 Xm0ADDR7/MP04_7 Xm0OEn/MP01_6 Xm0OEn [13]
H4 Xm0ADDR8/MP05_0 Xm0WEn/MP01_7 P4 Xm0W En [13]
Xm0ADDR9 G4 T3
Xm0ADDR10 Xm0ADDR9/MP05_1 Xm0BE0/MP02_0 Xm0BE0
J3 Xm0ADDR10/MP05_2 Xm0BE1/MP02_1 N6
Xm0ADDR11 K7 W2
D
Xm0ADDR12 H6
Xm0ADDR11/MP05_3 Memory Xm0WAITn/MP02_2
M7
Xm0W AITn D
Xm0ADDR12/MP05_4 Xm0DATA_RDn/MP02_3 Xm0DATA_RDn
Xm0ADDR13
Xm0ADDR14
G5 Xm0ADDR13/MP05_5 Port0 Xm0FCLE/ONDXL_AVD/MP03_0 K1 Xm0FCLE/ONDAVD [7]
F4 Xm0ADDR14/MP05_6 Xm0FALE/ONDXL_SMCLK/MP03_1 K2 Xm0FALE/ONDSMCLK [7]
Xm0ADDR15 H3 J2
Xm0ADDR15/MP05_7 Xm0FWEn/ONDXL_RPn/MP03_2 Xm0FW En/ONDRPn [7]
[7,13] Xm0DATA[15:0] Xm0FREn/MP03_3 M2 Xm0FREn [7]
Xm0DATA0 K3 R3
Xm0DATA0/MP06_0 Xm0FRnB0/ONDXL_INT0/MP03_4 Xm0FRnB0/ONDXL_INT0 [7]
Xm0DATA1 L3 M6
Xm0DATA1/MP06_1 Xm0FRnB1/ONDXL_INT1/MP03_5 Xm0FRnB1/ONDXL_INT1
Xm0DATA2 L5 V3
Xm0DATA2/MP06_2 Xm0FRnB2/MP03_6 Xm0FRnB2
Xm0DATA3 M4 L6
Xm0DATA3/MP06_3 Xm0FRnB3/MP03_7 Xm0FRnB3
Xm0DATA4 N1
Xm0DATA5 Xm0DATA4/MP06_4
N2 Xm0DATA5/MP06_5
Xm0DATA6 P1
Xm0DATA7 Xm0DATA6/MP06_6
N4 Xm0DATA7/MP06_7
Xm0DATA8 L1
Xm0DATA9 Xm0DATA8/MP07_0
L2 Xm0DATA9/MP07_1
Xm0DATA10 L4 AB18
Xm0DATA11 Xm0DATA10/MP07_2 XDDR2SEL XDDR2SEL [8]
M1 Xm0DATA11/MP07_3
Xm0DATA12 M3
Xm0DATA13 Xm0DATA12/MP07_4
M5 Xm0DATA13/MP07_5
Xm0DATA14 N5
Xm0DATA15 Xm0DATA14/MP07_6
[8] Xm1ADDR[13:0] P2 Xm0DATA15/MP07_7 Xm2ADDR[13:0]
Xm1ADDR0 E21
Xm1ADDR1 Xm1ADDR0 Xm2ADDR0
E20 Xm1ADDR1 Xm2ADDR0 L20
Xm1ADDR2 E17 L19 Xm2ADDR1
Xm1ADDR3 Xm1ADDR2 Xm2ADDR1 Xm2ADDR2
E15 Xm1ADDR3 Xm2ADDR2 L21
Xm1ADDR4 D18 R23 Xm2ADDR3
Xm1ADDR5 Xm1ADDR4 Xm2ADDR3 Xm2ADDR4
F15 Xm1ADDR5 Memory Memory Xm2ADDR4 F21
C Xm1ADDR6 D19 F20 Xm2ADDR5 C
Xm1ADDR6 Xm2ADDR5
Xm1ADDR7
Xm1ADDR8
D20 Xm1ADDR7 Port1 Port2 Xm2ADDR6 H22 Xm2ADDR6
Xm2ADDR7
E18 Xm1ADDR8 Xm2ADDR7 J19
Xm1ADDR9 F16 G20 Xm2ADDR8
Xm1ADDR10 Xm1ADDR9 Xm2ADDR8 Xm2ADDR9
F19 Xm1ADDR10 Xm2ADDR9 H19
Xm1ADDR11 F14 K22 Xm2ADDR10
Xm1ADDR12 Xm1ADDR11 Xm2ADDR10 Xm2ADDR11
E19 Xm1ADDR12 Xm2ADDR11 H23
Xm1ADDR13 F18 J22 Xm2ADDR12
Xm1ADDR13 Xm2ADDR12 Xm2ADDR13
[8] Xm1BA0 E16 Xm1BA0 Xm2ADDR13 H20
[8] Xm1BA1 D21 Xm1BA1 Xm2BA0 J20 Xm2BA0
[8] Xm1CASn F17 Xm1CASn Xm2BA1 K20 Xm2BA1
[8] Xm1RASn E12 Xm1RASn Xm2CASn J23 Xm2CASn
[8] Xm1W En G17 Xm1WEn Xm2RASn J21 Xm2RASn
[8] Xm1CKE0 G15 Xm1CKE0 Xm2WEn P22 Xm2W En
[8] Xm1ADDR14 G16 Xm1CKE1/ADDR14 Xm2CKE0 J24 Xm2CKE0
[8] Xm1CSn0 G18 Xm1CSn0 Xm2CKE1/ADDR14 G21 Xm2CKE1/ADDR14
[8] Xm1CSn1/BA2 G14 Xm1CSn1 Xm2CSn0 N21 Xm2CSn0
[8] Xm1DQS0 B22 Xm1DQS0 Xm2CSn1 K21 Xm2CSn1
[8] Xm1DQSn0 A22 Xm1DQSn0 Xm2DQS0 N24 Xm2DQS0
[8] Xm1DQS1 B18 Xm1DQS1 Xm2DQSn0 N25 Xm2DQSn0
[8] Xm1DQSn1 A18 Xm1DQSn1 Xm2DQS1 L24 Xm2DQS1
[8] Xm1DQS2 A15 Xm1DQS2 Xm2DQSn1 L25 Xm2DQSn1
[8] Xm1DQSn2 B15 Xm1DQSn2 Xm2DQS2 F24 Xm2DQS2
[8] Xm1DQS3 D12 Xm1DQS3 Xm2DQSn2 F25 Xm2DQSn2
[8] Xm1DQSn3 C12 Xm1DQSn3 Xm2DQS3 C24 Xm2DQS3
[8] Xm1DM0 C21 Xm1DM0 Xm2DQSn3 C25 Xm2DQSn3
TP8 D17 P25 Xm2DM0
M1SCLK [8] Xm1DM1 Xm1DM1 Xm2DM0
[8] Xm1DM2 D14 Xm1DM2 Xm2DM1 L22 Xm2DM1
[8] Xm1DM3 C11 Xm1DM3 Xm2DM2 H21 Xm2DM2
B B
[8] Xm1SCLK A16 Xm1SCLK Xm2DM3 E22 Xm2DM3
[8] Xm1SCLKn B16 Xm1SCLKn Xm2SCLK G24 Xm2SCLK
[8] Xm1DATA[7:0] Xm2SCLKn G25 Xm2SCLKn
Xm1DATA0 A24 Xm2DATA[7:0]
Xm1DATA1 Xm1DATA0 Xm2DATA0
C22 Xm1DATA1 Xm2DATA0 P23
Xm1DATA2 B23 R24 Xm2DATA1
Xm1DATA3 Xm1DATA2 Xm2DATA1 Xm2DATA2
A23 Xm1DATA3 Xm2DATA2 R25
Xm1DATA4 B21 P24 Xm2DATA3
Xm1DATA5 Xm1DATA4 Xm2DATA3 Xm2DATA4
A21 Xm1DATA5 Xm2DATA4 N23 TP9
Xm1DATA6 C20 M22 Xm2DATA5
Xm1DATA7 Xm1DATA6 Xm2DATA5 Xm2DATA6 M2SCLK
[8] Xm1DATA[15:8] C19 Xm1DATA7 Xm2DATA6 N22
Xm1DATA8 B19 M23 Xm2DATA7 Xm2DATA[15:8]
Xm1DATA9 Xm1DATA8 Xm2DATA7 Xm2DATA8
B20 Xm1DATA9 Xm2DATA8 M21
Xm1DATA10 A20 M24 Xm2DATA9
Xm1DATA11 Xm1DATA10 Xm2DATA9 Xm2DATA10
A19 Xm1DATA11 Xm2DATA10 L23
Xm1DATA12 C18 M25 Xm2DATA11
Xm1DATA13 Xm1DATA12 Xm2DATA11 Xm2DATA12
A17 Xm1DATA13 Xm2DATA12 K25
Xm1DATA14 B17 K23 Xm2DATA13
Xm1DATA15 Xm1DATA14 Xm2DATA13 Xm2DATA14
[8] Xm1DATA[23:16] C17 Xm1DATA15 Xm2DATA14 J25
Xm1DATA16 D16 K24 Xm2DATA15 Xm2DATA[23:16]
Xm1DATA17 Xm1DATA16 Xm2DATA15 Xm2DATA16
C16 Xm1DATA17 Xm2DATA16 H25
Xm1DATA18 D15 H24 Xm2DATA17
Xm1DATA19 Xm1DATA18 Xm2DATA17 Xm2DATA18
C15 Xm1DATA19 Xm2DATA18 G23
Xm1DATA20 E13 G22 Xm2DATA19
Xm1DATA21 Xm1DATA20 Xm2DATA19 Xm2DATA20
E14 Xm1DATA21 Xm2DATA20 F23
Xm1DATA22 F13 E25 Xm2DATA21
Xm1DATA23 Xm1DATA22 Xm2DATA21 Xm2DATA22
[8] Xm1DATA[31:24] C14 Xm1DATA23 Xm2DATA22 E24
Xm1DATA24 D13 E23 Xm2DATA23 Xm2DATA[31:24]
Xm1DATA25 Xm1DATA24 Xm2DATA23 Xm2DATA24
A B14 Xm1DATA25 Xm2DATA24 D25 A
Xm1DATA26 A14 D24 Xm2DATA25
Xm1DATA27 Xm1DATA26 Xm2DATA25 Xm2DATA26
C13 Xm1DATA27 Xm2DATA26 D23
Xm1DATA28 B13 F22 Xm2DATA27
Xm1DATA29 Xm1DATA28 Xm2DATA27 Xm2DATA28
A13 Xm1DATA29 Xm2DATA28 D22
Xm1DATA30 B12 B25 Xm2DATA29
Xm1DATA31 Xm1DATA30 Xm2DATA29 Xm2DATA30
A12 Xm1DATA31 Xm2DATA30 C23
B24 Xm2DATA31
Xm2DATA31 Title
Mini210s,Designed by FriendlyARM in Guangzhou
S5PV210 U1B Size Document Number Rev
A3 S5PV210 (Memory)

Date: Saturday, May 19, 2012 Sheet 4 of 15

5 4 3 2 1
 5 4 3 2 1

D U1C D

[10] XvHSYNC AA13 XvHSYNC/SYSCS0/VENHSYNC/GPF0_0 XmipiMDPCLK AE15 XmipiMDPCLK [15]

[10] XvVSYNC Y10 XvVSYNC/SYSCS1/VENVSYNC/GPF0_1 XmipiMDNCLK AD15 XmipiMDNCLK [15]
[10] XvVDEN AB10 XvVDEN/SYSRS/VENHREF/GPF0_2 XmipiMDP0 AE17 XmipiMDP0 [15]
[10] XvVD[23:0] [10] XvVCLK AA10 XvVCLK/SYSWE/V601CLK/GPF0_3 [DSI] XmipiMDN0 AD17 XmipiMDN0 [15]
XmipiMDP1 AE16 XmipiMDP1 [15]
XvVD0 AA9 AD16 XmipiMDN1 [15]
XvVD1 XvVD0/SYSD0/VEND0/GPF0_4 XmipiMDN1
AB9 XvVD1/SYSD1/VEND1/GPF0_5 XmipiMDP2 AE14 XmipiMDP2 [15]
XvVD2 AB8 AD14
XvVD3 AB7
XvVD2/SYSD2/VEND2/GPF0_6 MIPI-DSI/CSI XmipiMDN2
AE13
XmipiMDN2 [15]
XvVD3/SYSD3/VEND3/GPF0_7 XmipiMDP3 XmipiMDP3 [15]
XvVD4 Y9 AD13 XmipiMDN3 [15]
XvVD5 XvVD4/SYSD4/VEND4/GPF1_0 XmipiMDN3
XvVD6
AB6 XvVD5/SYSD5/VEND5/GPF1_1 [CSI]
AE7 XvVD6/SYSD6/VEND6/GPF1_2 XmipiSDPCLK AD10 XmipiSDPCLK [15]
XvVD7 AC9 AE10 XmipiSDNCLK [15]
XvVD8 XvVD7/SYSD7/VEND7/GPF1_3 XmipiSDNCLK
AA8 XvVD8/SYSD8/V656D0/GPF1_4 XmipiSDP0 AD12 XmipiSDP0 [15]
XvVD9 W9 AE12 XmipiSDN0 [15]
XvVD10 XvVD9/SYSD9/V656D1/GPF1_5 XmipiSDN0
AE6 XvVD10/SYSD10/V656D2/GPF1_6 XmipiSDP1 AD11 XmipiSDP1 [15]
XvVD11 AC8 AE11 XmipiSDN1 [15]
XvVD12 XvVD11/SYSD11/V656D3/GPF1_7 XmipiSDN1
Y8 XvVD12/SYSD12/V656D4/GPF2_0 XmipiSDP2 AD9 XmipiSDP2 [15]
XvVD13 AC7 AE9 XmipiSDN2 [15]
XvVD14 XvVD13/SYSD13/V656D5/GPF2_1 XmipiSDN2
AD6 XvVD14/SYSD14/V656D6/GPF2_2 XmipiSDP3 AD8 XmipiSDP3 [15]
XvVD15 AE5 AE8 XmipiSDN3 [15]
XvVD16 XvVD15/SYSD15/V656D7/GPF2_3 XmipiSDN3
AD7 XvVD16/SYSD16/GPF2_4
XvVD17 AA7 AC15 C2 2nF
XvVD18 AD5
XvVD17/SYSD17/GPF2_5 LCDC XmipiVREG_0P4V DGND
XvVD19 XvVD18/SYSD18/GPF2_6
AA6 XvVD19/SYSD19/GPF2_7
XvVD20 AB5 T2 XhdmiTX0P [15]
C XvVD21 XvVD20/SYSD20/GPF3_0 XhdmiTX0P C
AC5 XvVD21/SYSD21/GPF3_1 XhdmiTX0N T1 XhdmiTX0N [15]
XvVD22 AC6 U2 XhdmiTX1P [15]
XvVD23 XvVD22/SYSD22/GPF3_2 XhdmiTX1P
Y7 XvVD23/SYSD23/V656_CLK/GPF3_3 HDMI XhdmiTX1N U1 XhdmiTX1N [15]
VSYNC_LDI W8 VSYNC_LDI/GPF3_4 XhdmiTX2P V2 XhdmiTX2P [15]
SYS_OE/VEN_FIELD AE4 SYS_OE/VEN_FIELD/GPF3_5 XhdmiTX2N V1 XhdmiTX2N [15]
XhdmiTXCP R2 XhdmiTXCP [15]
XhdmiTXCN R1 XhdmiTXCN [15]
W1 R35 4.7K DGND
XhdmiREXT

XmsmADDR0/CAM_B_D0/CF_ADDR0/MIPI_BYTE_CLK/GPJ0_0 H1 CAM_B_D0
[9] XadcAIN0 AC11 XadcAIN0 XmsmADDR1/CAM_B_D1/CF_ADDR1/MIPI_ESC_CLK/GPJ0_1 G6 CAM_B_D1
[15] XadcAIN1 AC12 XadcAIN1 XmsmADDR2/CAM_B_D2/CF_ADDR2/TS_CLK/GPJ0_2 E4 CAM_B_D2
[15] XadcAIN2 AB11 XadcAIN2 XmsmADDR3/CAM_B_D3/CF_IORDY/TS_SYNC/GPJ0_3 H7 CAM_B_D3
XadcAIN3 AC10 XadcAIN3 TouchScreen XmsmADDR4/CAM_B_D4/CF_INTRQ/TS_VAL/GPJ0_4 G1 CAM_B_D4
XadcAIN4 Y11 XadcAIN4 XmsmADDR5/CAM_B_D5/CF_DMARQ/TS_DATA/GPJ0_5 H2 CAM_B_D5
XadcAIN5 W12 XadcAIN5 ADC XmsmADDR6/CAM_B_D6/CF_DRESETN/TS_ERROR/GPJ0_6 F5 CAM_B_D6
camera B
TP10 [15] XadcAIN6 Y12 XadcAIN6 XmsmADDR7/CAM_B_D7/CF_DMACKN/MHL_D0/GPJ0_7 D5 CAM_B_D7
[15] XadcAIN7 AA12 XadcAIN7 XmsmADDR8/CAM_B_PCLK/SROM_ADDR16/MHL_D1/GPJ1_0 F6 CAM_B_PCLK
VDD_DAC_AP XADCOUT AA11 G2
[15] XadcAIN8 XadcAIN8 XmsmADDR9/CAM_B_VSYNC/SROM_ADDR17/MHL_D2/GPJ1_1 CAM_B_VSYNC
[15] XadcAIN9 AB12 XadcAIN9 XmsmADDR10/CAM_B_HREF/SROM_ADDR18/MHL_D3/GPJ1_2 F1 CAM_B_HREF
R36 0R G3 CAM_B_FIELD
C3 XmsmADDR11/CAM_B_FIELD/SROM_ADDR19/MHL_D4/GPJ1_3
XdacOUT U5 XdacOUT Modem XmsmADDR12/CAM_B_CLKOUT/SROM_ADDR20/MHL_D5/GPJ1_4 E5 CAM_B_CLKOUT
104 W5 F2
XdacIREF TVOUT XmsmADDR13/KP_COL_0/SROM_ADDR21/MHL_D6/GPJ1_5 CAMERA_B_GPIO0
DACVREF
TP11 V5 XdacVREF Camera B
V4 XdacCOMP DAC XmsmDATA0/KP_COL_1/CF_DATA0/MHL_D7/GPJ2_0 F3 LED1 [15]
CF XmsmDATA1/KP_COL_2/CF_DATA1/MHL_D8/GPJ2_1 E2 LED2 [15]
LED
XmsmDATA2/KP_COL_3/CF_DATA2/MHL_D9/GPJ2_2 E1 LED3 [15]
R37 C4 R38 MHL XmsmDATA3/KP_COL_4/CF_DATA3/MHL_D10/GPJ2_3 D3 LED4 [15]
1.2K,1% 104 75R,1% D1
B
AC21 Key XmsmDATA4/KP_COL_5/CF_DATA4/MHL_D11/GPJ2_4
E3
CAMA_PW R_EN [15] B
[15] XciPCLK XciPCLK/GPE0_0 XmsmDATA5/KP_COL_6/CF_DATA5/MHL_D12/GPJ2_5 CAMERA_A_GPIO1
[15] XciVSYNC AA14 XciVSYNC/GPE0_1 SROM XmsmDATA6/KP_COL_7/CF_DATA6/MHL_D13/GPJ2_6 D2 CAMERA_A_GPIO2 [15] camera
[15] XciHREF AB14 XciHREF/GPE0_2 CAM XmsmDATA7/KP_ROW_0/CF_DATA7/MHL_D14/GPJ2_7 C1 CAMERA_B_GPIO1
addr[16:22] XmsmDATA8/KP_ROW_1/CF_DATA8/MHL_D15/GPJ3_0 C2 CAMERA_B_GPIO2
DGND DGND DGND
[15] XciYDATA0 AB15 XciYDATA0/GPE0_3 (VDD_CAM) XmsmDATA9/KP_ROW_2/CF_DATA9/MHL_D16/GPJ3_1 D4 CAM_A_RESET [15]
[15] XciYDATA1 AB16 XciYDATA1/GPE0_4 (VDD_MODEM)XmsmDATA10/KP_ROW_3/CF_DATA10/MHL_D17/GPJ3_2 B1 PCB1 [15]
[15] XciYDATA2 AB20 XciYDATA2/GPE0_5 XmsmDATA11/KP_ROW_4/CF_DATA11/MHL_D18/GPJ3_3 C3 PCB2 [15]
AA19 C4 GPIO
[15] XciYDATA3 XciYDATA3/GPE0_6 XmsmDATA12/KP_ROW_5/CF_DATA12/MHL_D19/GPJ3_4 PCB3 [15]
[15] XciYDATA4 AB21 XciYDATA4/GPE0_7 XmsmDATA13/KP_ROW_6/CF_DATA13/MHL_D20/GPJ3_5 B2 W IFI0_PW R_ONOFF
[15] XciYDATA5 Y18 XciYDATA5/GPE1_0 XmsmDATA14/KP_ROW_7/CF_DATA14/MHL_D21/GPJ3_6 B3 W IFI0_RESET_GPIO [15] WIFI
[15] XciYDATA6 AB17 XciYDATA6/GPE1_1 XmsmDATA15/KP_ROW_8/CF_DATA15/MHL_D22/GPJ3_7 A2 W IFI0_PD_GPIO [15]
[15] XciYDATA7 AA17 XciYDATA7/GPE1_2
[15] XciCLKenb AA18 XciCLKenb/GPE1_3 XmsmCSn/KP_ROW_9/CF_CSn0/MHL_D23/GPJ4_0 G8 W IFI1_nW P [15]
[15] XciFIELD AB19 XciFIELD/GPE1_4 XmsmWEn/KP_ROW_10/CF_CSn1/MHL_HSYNC/GPJ4_1 B4 W IFI1_IO
XmsmRn/KP_ROW_11/CF_IORN/MHL_IDCK/GPJ4_2 G9 W IFI1_PW R_ONOFF
XmsmIRQn/KP_ROW_12/CF_IOWN/MHL_VSYNC/GPJ4_3 A3 W IFI1_PD_GPIO
XmsmADVN/KP_ROW_13/SROM_ADDR22/MHL_DE/GPJ4_4 A4 W IFI1_RESET_GPIO

S5PV210

A A

Title
Mini210s,Designed by FriendlyARM in Guangzhou

Size Document Number Rev

A3 S5PV210 (Media)

Date: Saturday, May 19, 2012 Sheet 5 of 15

5 4 3 2 1
 5 4 3 2 1

U1D
VDD_ARM_AP VDD_ALIVE_AP VDD_M0_AP VDD_MEM_1.8V VDD_SYS_AP VDD_LCD_AP VDD_CAM_AP

D L13 VDD_ARM0 D
L14 VDD_ARM1 VSS0 A1
L15 VDD_ARM2 VSS1 A25
M13 AE1 TC1 TC2 TC3
VDD_ARM3 VSS2 + C5 + C6 C7 + C8 C9 C10 C11 C12 C13 C14 C15
M14 VDD_ARM4 VSS3 AE25
M15 VDD_ARM5 VSS4 G7
N14 G19 10u 104 10u 104 104 10u 104 104 104 104 104 104 104 104
VDD_ARM6 VSS5
N15 VDD_ARM7 VSS6 J12
N16 VDD_ARM8 VSS7 K10
P14 VDD_ARM9 VSS8 K11
P15 VDD_ARM10 VSS9 K12
K16 DGND DGND DGND DGND DGND DGND
VSS10
VSS11 K19
VDD_INT_AP L9
VSS12 VDD_AUD_AP VDD_EXT_AP VDD_RTC_AP VDD_ADC_AP VDD_DAC_AP VDD_HDMI_AP
VSS13 L12
K13 VDD_INT0 VSS14 L16
K14 VDD_INT1 VSS15 M10
K15 VDD_INT2 VSS16 M12
L10 VDD_INT3 VSS17 M16
L11 VDD_INT4 VSS18 N12
M11 N17 C16 C17 C18 C19 C20 C21 C22 C23 C24
VDD_INT5 VSS19
N10 VDD_INT6 VSS20 P10
N11 P12 104 104 104 104 104 104 104 104 104
VDD_INT7 VSS21
P11 VDD_INT8 VSS22 P13
R11 VDD_INT9 VSS23 P16
R12 VDD_INT10 VSS24 R9
R13 VDD_INT11 VSS25 R10
VDD_ALIVE_AP T11 R14 DGND DGND DGND DGND DGND DGND
VDD_INT12 VSS26
VSS27 R15
C R17 R16 C
VDD_M0_AP VDD_ALIVE_0 VSS28
W15 T10 VDD_MIPI_1.1V_AP VDD_MIPI_1.8V_APVDD_MIPI_PLL_AP VDD_APLL_AP VDD_MPLL_AP VDD_EPLL_APVDD_VPLL_AP VDD_UH_1.1V_AP
VDD_UO_1.1V_AP VDD_UO_3.3V_AP
VDD_ALIVE_1 VSS29
VSS30 T12
VDD_MEM_1.8V K9 T13
VDD_M0_0 VSS31
M9 VDD_M0_1 VSS32 T14
VSS33 T15
J13 VDD_M1_0 VSS34 T16
J14 W7 C25 C26 C27 C28 C29 C30 C31 C32 C33 C34 C35
VDD_M1_1 VSS35
J15 VDD_M1_2 VSS36 W19
J16 104 104 104 104 104 104 104 104 104 104 104
VDD_M1_3
J17 VDD_M2_0
K17 DGND
VDD_M2_1
L17 VDD_M2_2
M17 DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND
VDD_M2_3
VDD_ADC_AP W10 VDD_ADC
U9 VDD_ARM_AP VDD_UH_3.3V_AP
VDD_AUD_AP VDD_AUD_0 VDD_CKO__AP VDD_MODEM_AP
U19 VDD_AUD_1
VDD_CAM_AP V19 VDD_CAM
VDD_DAC_AP V7 VDD_DAC
U7 TC4 TC5 C48 C49
VDD_DAC_A + + C36 C37 C38 C39 C40 C41 C42 C43 C44 C45 C46 C47
VDD_MODEM_AP J7 VDD_MODEM
VDD_KEY_AP T17 104 104
VDD_KEY 10u 10u 104 104 104 104 104 104 104 104 104 104 104 104
VDD_LCD_AP U10 VDD_LCD
VDD_MIPI_1.1V_AP U12 VDD_MIPI_D_0 VSS_ADC W11
B DGND DGND B
U13 VDD_MIPI_D_1 VSS_DAC V6
VDD_MIPI_PLL_AP W14 VDD_MIPI_PLL VSS_HDMI R7
VDD_MIPI_1.8V_AP Y13 U11 DGND DGND
VDD_MIPI_A VSS_MIPI_0 VDD_HDMI_OSC_AP VDD_KEY_AP
VSS_MIPI_1 U14
VDD_HDMI_OSC_AP T7 VDD_HDMI_OSC VSS_DAC_A U6
R6 AA15 VDD_INT_AP
VDD_HDMI_PLL_AP VDD_HDMI_PLL VSS_UHOST_A VDD_HDMI_PLL_AP
VDD_HDMI_AP P6 Y17 C50 C51
VDD_HDMI VSS_UOTG_A
VSS_UHOST_AC AA16
VDD_UH_3.3V_AP Y16 Y15 104 104
VDD_UHOST_A VSS_UOTG_AC C52
VDD_UO_3.3V_AP W16 VDD_UOTG_A VSS_UHOST_D Y14
VDD_UH_1.1V_AP W13 W17 TC6 TC7
VDD_UHOST_D VSS_UOTG_D + + C53 C54 C55 C56 C57 C58 C59 C60 C61 C62 C63 C64 C65 DGND DGND 104
VDD_UO_1.1V_AP U15 VDD_UOTG_D VSS_HDMI_OSC T6
VSS_HDMI_PLL P7
P17 10u 10u 104 104 104 104 104 104 104 104 104 104 104 104 104 VDD_HDMI_AP
VDD_CKO__AP VDD_CKO
VDD_RTC_AP P21 DGND
VDD_RTC VDD_VPLL_AP
VDD_EXT_AP J10 VDD_EXT0
T9 DGND C66
VDD_EXT1_0
W18 VDD_EXT1_1
G11 DGND 104 C67
VDD_EXT2

VDD_SYS_AP P9 M19 104

VDD_SYS0_0 VSS_APLL DGND
U16 VDD_SYS0_1 VSS_MPLL N19
U17 VDD_SYS0_2 VSS_EPLL R19
T19 P19 DGND
VDD_SYS1 VSS_VPLL

VDD_APLL_AP M20 VDD_APLL

VDD_MPLL_AP N20 DGND
VDD_MPLL
VDD_EPLL_AP R20 VDD_EPLL
A VDD_VPLL_AP P20 VDD_VPLL A

S5PV210

Title
Mini210s,Designed by FriendlyARM in Guangzhou

Size Document Number Rev

A3 S5PV210 (Power)

Date: Saturday, May 19, 2012 Sheet 6 of 15

5 4 3 2 1
 5 4 3 2 1

VDD_SYS_3.3V

D NAND Flash memory D

R80
0R/NC
VDD_SYS_3.3V
VDD_SYS_3.3V
U2
R84
1 NC0 NC29/ VSS2 48
DGND 2 NC1 NC28/ IO15 47
R40 3 46
NC2 NC27/ IO7 Xm0DATA[15:0] [4,13] VDD_SYS_3.3V
4.7K/NC 4 45
0R/NC NC3 NC26/ IO14 Xm0DATA7
5 NC4 IO7/ IO6 44
R39 0R 6 43 Xm0DATA6
NC5 IO6/ IO13 Xm0DATA5
[4] Xm0FRnB0/ONDXL_INT0 7 R/nB IO5 42
8 41 Xm0DATA4 R83 R82
[4] Xm0FREn nRE IO4/ IO12
R41 0R 9 40 0R/NC 0R/NC
[4] Xm0CSn2/NFCSn0 nCE NC25/ IO4
R42 0R 10 39
[4] Xm0CSn3/NFCSn1 NC6 NC24
11 NC7 NC23 38
12 VCC0 VCC1 37
13 VSS0 VSS/ NC22 36
C
VDD_SYS_3.3V R43 10K 14 35 C
NC8 NC21
15 NC9 NC20 34 <Silk>
16 33
[4] Xm0FCLE/ONDAVD
[4] Xm0FALE/ONDSMCLK 17
CLE
ALE
NC19/ IO11
IO3 32 Xm0DATA3
Xm0DATA2
NAND
[4] Xm0FWEn/ONDRPn 18 nWE IO2/ IO10 31
19 30 Xm0DATA1
nWP IO1/ IO2 Xm0DATA0
20 NC10 IO0/ IO9 29
21 NC11 NC18/ IO1 28
VDD_SYS_3.3V 22 27
NC12 NC17/ IO8
23 NC13 NC16/ IO0 26
24 NC14 NC15/ VSS1 25
R44 R85
R81 OR/NC 0R/NC
0R/NC R45 R46
K9GBG08U0A 0R 0R/NC

B DGND DGND B

VDD_SYS_3.3V

C68 C69 C70

10u 104 104

DGND

A A

Title
Mini210s,Designed by FriendlyARM in Guangzhou

Size Document Number Rev

A4 NAND Flash

Date: Saturday, May 19, 2012 Sheet 7 of 15

5 4 3 2 1
 5 4 3 2 1

VDD_MEM_1.8V
U3 U4 VDD_MEM_1.8V
[4] Xm1ADDR[13:0] [4] Xm1ADDR[13:0]
Xm1ADDR0 H8 A9 Xm1ADDR0 H8 A9
Xm1ADDR1 A0 VDDQ0 Xm1ADDR1 A0 VDDQ0
H3 C1 H3 C1
Xm1ADDR2 A1 VDDQ1 Xm1ADDR2 A1 VDDQ1
H7 C9 H7 C9
Xm1ADDR3 A2 VDDQ2 Xm1ADDR3 A2 VDDQ2
J2 C7 J2 C7
Xm1ADDR4 A3 VDDQ3 Xm1ADDR4 A3 VDDQ3
J8 C3 J8 C3
Xm1ADDR5 A4 VDDQ4 Xm1ADDR5 A4 VDDQ4
J3 J3
Xm1ADDR6 A5 Xm1ADDR6 A5
J7 A1 J7 A1
Xm1ADDR7 A6 VDD0 Xm1ADDR7 A6 VDD0
K2 E9 K2 E9
Xm1ADDR8 A7 VDD1 Xm1ADDR8 A7 VDD1
K8 H9 K8 H9
Xm1ADDR9 A8 VDD2 Xm1ADDR9 A8 VDD2 R55 10K
K3 L1 C98 K3 L1 C99 VDD_MEM_1.8V
Xm1ADDR10 A9 VDD3 Xm1ADDR10 A9 VDD3
D H2 H2 D
Xm1ADDR11 A10/AP Xm1ADDR11 A10/AP
K7 E1 K7 E1
Xm1ADDR12 A11 VDDL Xm1ADDR12 A11 VDDL VDD_MEM_1.8V XDDR2SEL [4]
L2 L2
Xm1ADDR13 A12 VDD_MEM_1.8V Xm1ADDR13 A12 R58 NC
L8 E7 L8 E7
A13 VSSDL 104 A13 VSSDL 104

DGND R51
DGND
R47 10K/1% DGND
[4] Xm1BA0 G2 10K/1% [4] Xm1BA0 G2
BA0 BA0
[4] Xm1BA1 G3 [4] Xm1BA1 G3
BA1 BA1
[4] Xm1CSn1/BA2 G1 E2 [4] Xm1CSn1/BA2 G1 E2
BA2 VREF BA2 VREF
ODT1 ODT1 VDD_MEM_1.8V R56 10K
A8 F9 A8 F9 C100
[4] Xm1DQSn0 nDQS ODT [4] Xm1DQSn1 nDQS ODT
B7 C105 R48 B7 R52
[4] Xm1DQS0 DQS [4] Xm1DQS1 DQS ODT1
10K/1% 104 10K/1%
B3 104 B3
[4] Xm1DM0 DM/RDQS [4] Xm1DM1 DM/RDQS R57 10K/NC
A2 A2
NU/nRDQS NU/nRDQS

[4] Xm1SCLKn F8 [4] Xm1SCLKn F8

nCK DGND nCK DGND
[4] Xm1SCLK E8 [4] Xm1SCLK E8 DGND
CK Xm1DATA[7:0] [4] CK Xm1DATA[15:8] [4]
[4] Xm1RASn F7 [4] Xm1RASn F7
nRAS nRAS
[4] Xm1CASn G7 [4] Xm1CASn G7
nCAS Xm1DATA4 nCAS Xm1DATA15
C8 C8
DQ0 Xm1DATA1 DQ0 Xm1DATA9
[4] Xm1CSn0 G8 C2 [4] Xm1CSn0 G8 C2
nCS DQ1 Xm1DATA3 nCS DQ1 Xm1DATA12
[4] Xm1CKE0 F2 D7 [4] Xm1CKE0 F2 D7
CKE DQ2 Xm1DATA0 CKE DQ2 Xm1DATA11
[4] Xm1WEn F3 D3 [4] Xm1WEn F3 D3
nWE DQ3 Xm1DATA7 nWE DQ3 Xm1DATA10
D1 D1
DQ4 Xm1DATA6 DQ4 Xm1DATA13
D9 D9
DQ5 Xm1DATA2 DQ5 Xm1DATA8
B1 B1
DQ6 Xm1DATA5 DQ6 Xm1DATA14
B9 B9
DQ7 DQ7

B8 B8
VSSQ0 VSSQ0
B2 B2
VSSQ1 VSSQ1
A7 A7
VSSQ2 Xm1ADDR14 VSSQ2 Xm1ADDR14
D2 L3 D2 L3
VSSQ3 NC0 Xm1ADDR14 [4] VSSQ3 NC0 Xm1ADDR14 [4]
D8 L7 D8 L7
VSSQ4 NC1 VSSQ4 NC1

K9
2Gbit K9
2Gbit
VSS0 VSS0
C J1 J1 C
VSS1 VSS1
A3 A3
VSS2 VSS2
E3 E3
VSS3 VSS3 VDD_MEM_1.8V

K4T1G084QQ-HCE6 or HCF7 (DDR2, 1Gb) K4T1G084QQ-HCE6 or HCF7 (DDR2, 1Gb)

DGND
DGND

C71 C72 C73 C74 C75 C76 C77 C78 C79 C80 C81 C82 C83 C84

10u 10u 104 104 104 104 104 104 104 104 104 104 104 104

DGND

VDD_MEM_1.8V

U6 VDD_MEM_1.8V
[4] Xm1ADDR[13:0]
U5 VDD_MEM_1.8V Xm1ADDR0
[4] Xm1ADDR[13:0] H8 A9
Xm1ADDR1 A0 VDDQ0 C85 C112 C86 C87 C88 C89 C90 C91 C92 C93 C94 C95
H3 C1
Xm1ADDR0 Xm1ADDR2 A1 VDDQ1
H8 A9 H7 C9
Xm1ADDR1 A0 VDDQ0 Xm1ADDR3 A2 VDDQ2 10u 10u 104 104 104 104 104 104 104 104 104 104
H3 C1 J2 C7
Xm1ADDR2 A1 VDDQ1 Xm1ADDR4 A3 VDDQ3
H7 C9 J8 C3
Xm1ADDR3 A2 VDDQ2 Xm1ADDR5 A4 VDDQ4
J2 C7 J3
Xm1ADDR4 A3 VDDQ3 Xm1ADDR6 A5
J8 C3 J7 A1
Xm1ADDR5 A4 VDDQ4 Xm1ADDR7 A6 VDD0
J3 K2 E9
Xm1ADDR6 A5 Xm1ADDR8 A7 VDD1 DGND
J7 A1 K8 H9
Xm1ADDR7 A6 VDD0 Xm1ADDR9 A8 VDD2
K2 E9 K3 L1 C96
Xm1ADDR8 A7 VDD1 Xm1ADDR10 A9 VDD3
K8 H9 H2
Xm1ADDR9 A8 VDD2 Xm1ADDR11 A10/AP
K3 L1 C153 K7 E1
Xm1ADDR10 A9 VDD3 Xm1ADDR12 A11 VDDL
H2 L2
Xm1ADDR11 A10/AP Xm1ADDR13 A12 VDD_MEM_1.8V VDD_MEM_1.8V
K7 E1 L8 E7
Xm1ADDR12 A11 VDDL VDD_MEM_1.8V A13 VSSDL 104
L2
Xm1ADDR13 A12
L8 E7
A13 VSSDL 104
B DGND R49 B
10K/1%
DGND R53 [4] Xm1BA0 G2
BA0 C126 C155 C101 C102 C103 C108 C104 C109 C110 C106 C107 C111
[4] Xm1BA1 G3
10K/1% BA1
[4] Xm1BA0 G2 [4] Xm1CSn1/BA2 G1 E2
BA0 BA2 VREF 10u 10u 104 104 104 104 104 104 104 104 104 104
[4] Xm1BA1 G3
BA1 ODT1
[4] Xm1CSn1/BA2 G1 E2 [4] Xm1DQSn3 A8 F9 C97 R50
BA2 VREF nDQS ODT
[4] Xm1DQS3 B7
ODT1 DQS 10K/1%
[4] Xm1DQSn2 A8 F9 C154 R54 104
nDQS ODT
[4] Xm1DQS2 B7 [4] Xm1DM3 B3
DQS 10K/1% DM/RDQS DGND
104 A2
NU/nRDQS
[4] Xm1DM2 B3
DM/RDQS DGND
A2 [4] Xm1SCLKn F8
NU/nRDQS nCK VDD_MEM_1.8V
[4] Xm1SCLK E8
DGND CK Xm1DATA[31:24] [4]
[4] Xm1SCLKn F8
nCK
[4] Xm1SCLK E8 [4] Xm1RASn F7
CK Xm1DATA[23:16] [4] nRAS
[4] Xm1CASn G7
nCAS Xm1DATA31
[4] Xm1RASn F7 C8
nRAS DQ0 Xm1DATA25
[4] Xm1CASn G7 [4] Xm1CSn0 G8 C2
nCAS Xm1DATA20 nCS DQ1 Xm1DATA28 C156 C157 C113 C114 C115 C116 C117 C118 C119 C120 C121 C122 C123 C124 C125
C8 [4] Xm1CKE0 F2 D7
DQ0 Xm1DATA17 CKE DQ2 Xm1DATA24
[4] Xm1CSn0 G8 C2 [4] Xm1WEn F3 D3
nCS DQ1 Xm1DATA23 nWE DQ3 Xm1DATA26 10u 10u 104 104 104 104 104 104 104 104 104 104 104 104 104
[4] Xm1CKE0 F2 D7 D1
CKE DQ2 Xm1DATA18 DQ4 Xm1DATA30
[4] Xm1WEn F3 D3 D9
nWE DQ3 Xm1DATA16 DQ5 Xm1DATA29
D1 B1
DQ4 Xm1DATA22 DQ6 Xm1DATA27
D9 B9
DQ5 Xm1DATA19 DQ7
B1
DQ6 Xm1DATA21 DGND
B9
DQ7
B8
VSSQ0
B2
VSSQ1
B8 A7
VSSQ0 VSSQ2 Xm1ADDR14
B2 D2 L3
VSSQ1 VSSQ3 NC0 Xm1ADDR14 [4]
A7 D8 L7
VSSQ2 Xm1ADDR14 VSSQ4 NC1
D2 L3
VSSQ3 NC0 Xm1ADDR14 [4]
D8 L7
VSSQ4 NC1 2Gbit
K9
VSS0
J1
2Gbit VSS1
K9 A3
VSS0 VSS2
J1 E3
VSS1 VSS3
A3
VSS2
E3
VSS3
K4T1G084QF-HCE6 or HCF7 (DDR2, 1Gb)
A DGND A
K4T1G084QQ-HCE6 or HCF7 (DDR2, 1Gb)
DGND

Title
Mini210s,Designed by FriendlyARM in Guangzhou

Size Document Number Rev

A2 Memory(DDR2)

Date: Saturday, May 19, 2012 Sheet 8 of 15

5 4 3 2 1
 5 4 3 2 1

VDD_SYS_3.3V
JTAG
AD CONVERT EEPROM VDD_SYS_3.3V
VDD_SYS_3.3V

10K

10K

10K
0R/NC
C127 104
VDD_SYS_3.3V

330R
10K
U7
C128 JTAG DGND
1 A0 VCC 8 R68 10K

R61

R62

R63

R64
104 2 7
A1 WP

2
R66
R67 DGND 1 2 3 6
4.7K 1 2 A2 SCL Xi2cSCL0 [3,11,15]
[3] XjTRSTn 3 3 4 4 XnRESET [3] 4 GND SDA 5 Xi2cSDA0 [3,11,15]

R65
U8 5 6 3 W1
[3] XjTDI 5 6 XjTDO [3] [5] XadcAIN0 10K
RESET 4 1 7 8 AT24C08
VCC GND [3] XjTMS 7 8 DGND DGND
D
[3] XjTCK 9 9 10 10 D
1 2 3 2 C233 IIC address 1010 000
XnRESET [3]

1
1 2 MR# RESET#
3

100p

10K
CAT811 J2X5 2.0mm
3

RESET C129 DGND

DGND 104
TP12 V_RST

R69
DGND

DGND DGND

24Mhz-M 24Mhz-H
VDD_SYS_3.3V For PLL For USB HOST
XXTI [3] XusbXTI [3]
C130 104 DGND
CON1 CON2

1
16 X1 X2
U9 1 1 3 4 R70 C131 3 4 R71 C132
RSTXD0 [3] XuRTSn0 1 [3] XuRTSn1 1 5.1M 15p 5.1M 15p
[3] XuTXD0 11 T1IN VDD T1OUT 14 [3] XuCTSn0 2 2 [3] XuCTSn1 2 2
COM0 12 13 RSRXD0 3 3
[3] XuTXD0

2
[3] XuRXD0 ROUT1 RIN1 3 [3] XuTXD1 3 24MHz 24MHz
1 1 [3] XuRXD0 4 4 [3] XuRXD1 4 4
10 6 10 7 RSRTS0 VDD_5V 5 VDD_5V 5
10 6 RSRXD0 [3] XuRTSn0 T2IN T2OUT RSCTS0 5 5 DGND DGND
11 11 2 2 [3] XuCTSn0 9 ROUT2 RIN2 8 6 6 6 6
7 RSRTS0
7 XXTO [3] XusbXTO [3]
C 3 RSTXD0 1 4 J1X6_2.0PH J1X6_2.0PH
C
3 RSCTS0 C133 C1+ C2+ C134 DGND DGND C135 C136
8 8
4 104 104 uart1 uart1 15p 15p
4
9 9 3 C1- C2- 5
5 5
DGND 27Mhz RTC_CLK
(male) DGND C137 DGND
BOXCONN_DB9
DGND CON3 CON4 XhdmiXTI [3] XrtcXTI [3]
2 V+ V- 6
VSS 13p
[3] XuTXD2 1 1 [3] XuTXD3 1 1
C138 C139 2 2 X4
104 15 MAX3232SOP 104 [3] XuRXD2 2 [3] XuRXD3 2
VDD_5V 3 3 VDD_5V 3 3

1
4 4 X3 R72 C140 R73
4 4 5.1M 15p 10M
3 4 3 4

DGND DGND J1X4_2.0PH DGND J1X4_2.0PH

32.768KHz

2
uart2 uart3 27MHz
DGND C141
CON3 CON46PIN4pin
XhdmiXTO [3] XrtcXTO [3]
C142
For VEDIO 15p 13p
For RTC
DGND
DGND

VDD_SYS_3.3V

B B

C143 C144
104 10u
R74 R75 R76 R77 R78 R79
10K 10K 10K 10K 10K 10K

DGND

TF_CLK0
TF1

M1 M1
[3] Xmmc0DATA2
[3] Xmmc0DATA3
1
2
DAT2
CD/DAT3
M2 M2
Xmmc0CDn
Designed by FriendlyARM in Guangzhou
CD 9
3
[3] XmmcCMD0
4
CMD
VDD
All rights reserved | http://www.arm9.net
R86 M_GMD1 10
[3] XmmcCLK0 5 CLK
22R M_GND2 11
6 VSS
M_GND3 12
[3] Xmmc0DATA0 7 DAT0
M_GND4 13
[3] Xmmc0DATA1 8 DAT1

MSPN09-XO-4X00
R88 VDD_SYS_3.3V SKD_TF_MSHN08-A0-1X10
A Xmmc0CDn DGND DGND A
[3] Xmmc0CDn
100K
R89
100K/NC

DGND
TF
(mmc0) Title
Mini210s,Designed by FriendlyARM in Guangzhou

Size Document Number Rev

A3 RST/JTAG/TF/Uart/EEROM/CLK

Date: Saturday, May 19, 2012 Sheet 9 of 15

5 4 3 2 1
 5 4 3 2 1

LCD
D D
22R R92 HS
[5] XvHSYNC 22R R93 VS DGND
[5] XvVSYNC 22R R94 DE
[5] XvVDEN 22R R95 LCDCLK
[5] XvVCLK

[5] XvVD[23:0]
DB
XvVD0 8 1 VD0 VDD_5V VDD_5V
XvVD1 7 2 VD1 1 2 VDD_SYS_3.3V
XvVD2 VD2 VD0 1D B 2 VD1
6 3 3 3 4 4
XvVD3 5 200R 4 VD3 VD2 5 6 VD3
XvVD4 RN1 8 VD4 VD4 5 6 VD5
1 7 7 8 8
XvVD5 7 2 VD5 VD6 9 10 VD7
9 10

8
7
6
5
XvVD6 6 3 VD6 11 12 VD8
200R 4 11 12 R219 R216
XvVD7 5 VD7 VD9 13 14 VD10 RN11
RN2 13 14 10K
VD11 15 16 VD12 10K
XvVD8 VD8 VD13 15 16 VD14 10K
8 1 17 17 18 18
XvVD9 7 2 VD9 VD15 19 20

1
2
3
4
XvVD10 VD10 VD16 19 20 VD17
6 3 21 21 22 22
XvVD11 5 200R 4 VD11 VD18 23 24 VD19
XvVD12 RN3 8 VD12 VD20 23 24 VD21
1 25 25 26 26
XvVD13 7 2 VD13 VD22 27 28 VD23 DGND
XvVD14 VD14 27 28 XpwmTOUT1
6 3 29 29 30 30
200R 4

XEINT5
XEINT6

XEINT4
XEINT10

[3]

[3]

[3]
XvVD15 VD15 LCD_RESET

[3,15]
[3,15]

[3,15]
5 31 32

XEINT14/GPH1_6

XEINT15/GPH1_7
RN4 [3] XEINT10 31 32
DE 33 34 VS
XvVD16 VD16 HS 33 34 LCDCLK
8 1 35 35 36 36
XvVD17 7 2 VD17 37 38
XvVD18 VD18 [3,15] Xi2cSCL2 37 38 XEINT14/GPH1_6 [3]
6 3 [3,15] Xi2cSDA2 39 39 40 40 XEINT15/GPH1_7 [3]
C XvVD19 5 200R 4 VD19 41 C
XvVD20 RN5 8 VD20 41
1
XvVD21 VD21 A C
7 2
XvVD22 6 3 VD22 LCD1
XvVD23 200R 4 VD23 A C LCD41P
5
RN6
DGND

DGND

[3,13,15] XnRSTOUT XnRSTOUT 0R R96 LCD_RESET

XpwmTOUT1
[3] XpwmTOUT1

B B

MIPI

CON16

VDD_SYS_3.3V 1 1 2 2
VDD_5V 3 3 4 4 DGND
[5] XmipiSDPCLK 5 5 6 6 XmipiMDPCLK [5]
[5] XmipiSDNCLK 7 7 8 8 XmipiMDNCLK [5]
[5] XmipiSDP0 9 9 10 10 XmipiMDP0 [5]
[5] XmipiSDN0 11 11 12 12 XmipiMDN0 [5]
[5] XmipiSDP1 13 13 14 14 XmipiMDP1 [5]
[5] XmipiSDN1 15 15 16 16 XmipiMDN1 [5]
[5] XmipiSDP2 17 17 18 18 XmipiMDP2 [5]
[5] XmipiSDN2 19 19 20 20 XmipiMDN2 [5]
[5] XmipiSDP3 21 21 22 22 XmipiMDP3 [5]
[5] XmipiSDN3 23 23 24 24 XmipiMDN3 [5]
J2X12

A A

Title
Mini210s,Designed by FriendlyARM in Guangzhou

Size Document Number Rev

A3 LCD Interface/MIPI

Date: Saturday, May 19, 2012 Sheet 10 of 15

5 4 3 2 1
 5 4 3 2 1

VDD_SYS_3.3V VDD_AC97_D3.3V VDD_SYS_3.3V VDD_AC97_A3.3V

D FB1 FB2 D
0R 0R
C147 C148 C149 C150 C151 C152
10u 104 104 10u 104 104

DGND AGND

AGND

J6
5
4
VDD_SYS_3.3V VDD_AC97_A3.3V 3
VDD_AC97_A3.3V 2
1
U50 AUDIO_3F37-4
VDD_AC97_D3.3V
5
6
7
8

5
6
7
8

32 28 VDD_SYS_3.3V
AVDD AGND AGND
10K 10K 26 SPKVDD1 SPKGND1 24
21 SPKVDD2 SPKGND2 20
RN14 RN15 8 9 C237 C236 R155
DCVDD DGND R428 R429
10 G1 DGND 470K
4
3
2
1

4
3
2
1

C DBVDD GND_PADDLE 10K 10K 100p 100p C

TP2 R156 Earphone_detect

R418 200R TC84 10u 0R

+
[3] Audio_Xi2sCDCLK0 11 MCLK HP_L 31
R419 200R 12 30 TP44
[3] Audio_Xi2sSCLK0 BCLK OUT3
R420 200R TC85 10u AGND

+
[3] Audio_Xi2sLRCK0 13 DACLRC HP_R 29
R421 200R 14
[3] Audio_Xi2sSDO0_0 DATDAT
Earphone_detect R422 0R 15
TP27 ADCLRC/GPIO1
R423 200R 16 25
[3] Audio_Xi2sSDI0 ADCDAT SPK_LP

SPK_LN 23
R424 200R 17
[3,9,15] Xi2cSCL0 SCLK
R425 200R 18
[3,9,15] Xi2cSDA0 SDIN
SPK_RP 22 CON7
1u/16V 19 SPK_OUT_LP SPK_OUT_LP 4
MICBIAS SPK_RN SPK_OUT_LN SPK_OUT_LN 4
4 LINPUT1 3 3A A
LINPUT_L C282 1uF 3 SPK_OUT_RN 2 B
R201=680 Ohm to 2.2kOhm LINPUT2 C232 C231 SPK_OUT_RP 2B
C235 2 LINPUT3/JD2 1 1
check microphone's specification 27
LINPUT_R C284 1uF VMID 100p 100p con4
R415 5 RINPUT1
2.2K 6
7
RINPUT2 MICBIAS 1
+ TC86 C302
TOP LAYER
mic RINPUT3/JD3 10u AGND AGND
R417
1 104
1 W M8960GEFL
2 2 100R
mic C234
R416
AGND SPK_OUT_RP
B SPK_OUT_RN B
47K/NC 100p
C280 C283
C279
C277 C276
MICBIAS
1uF 1uF 1uF
100p 100p
AGND AGND
AGND
AGND AGND AGND
+ TC87 C303 AGND AGND
10u/16V 104
0R R97

DGND AGND
AGND

A A

Title
Mini210s,Designed by FriendlyARM in Guangzhou

Size Document Number Rev

A3 Audio

Date: Saturday, May 19, 2012 Sheet 11 of 15

5 4 3 2 1
 5 4 3 2 1

D D

[4,7] Xm0DATA[15:0]

Xm0DATA0
Xm0DATA1
Xm0DATA2

Xm0DATA3
Xm0DATA4
Xm0DATA14

Xm0DATA15
VDD_SYS_3.3V

C180 C181 DGND

104 10u

104
C182
DGND U12 VDD_SYS_3.3V

24
23
22
21
20
19
18
17
16
15
14
13

51R
SD14
VDD3
SD15

SD0
SD1
SD2
GND3
SD3
SD4
EEDIO
EEDCS
EEDCK

51R
R129 R130
C Xm0DATA13 25 12 Xm0DATA5 330R 330R C

R127

R128
Xm0DATA12 SD13 SD5 Xm0DATA6
26 SD12 SD6 11
Xm0DATA11 27 10 Xm0DATA7
Xm0DATA10 SD11 SD7 NET_AVDD18 J3
28 SD10 AVDD18B 9
Xm0DATA9 29 8 DM9000_TX-
SD9 TX- DM9000_TX+
30 VDD1 TX+ 7 1 TD+ LEDG+ 9
Xm0DATA8 31 6 4 10 DM9000_LINKLED
SD8 AGND3 CT2 LEDG-
[4] Xm0ADDR2 32 CMD AGND2 5 2 TD-
33 4 DM9000_RX- 12
R210 0R GND1 RX- DM9000_RX+ LEDY+ DM9000_LANLED
[3] XEINT7 34 INT RX+ 3 LEDY- 11
[4] Xm0OEn 35 IOR# AVDD18a 2 3 RX+
[4] Xm0W En 36 1 C183 5 8
IOW# BGRES 10u C184 CT1 CHS_GND
6
PWRST#

RX-

6.8K R131
BGGND
104
AGND1
NC 7
GND2

R132

R133
VDD2
TEST
LED2
LED1

M1 G1
CS#

M1 G1
SD
M2 G2
X2
X1

M2 G2
DM9000AEP C185
37
38
39
40
41
42
43
44
45
46
47
48

51R

51R
DGND 104 HR911105A
[4] Xm0CSn1
DGND
DM9000_LINKLED R134 1M C186
DM9000_LANLED DGND 104

[3,10,15] XnRSTOUT R135 0R 25Mhz R136

22R DGND
Y1
R137
4

B 25MHz B

1 2
VDD_SYS_3.3V DGND
3

C187 C188 0R
15p 15p DGND

DGND DGND

A A

Title
Mini210s,Designed by FriendlyARM in Guangzhou

Size Document Number Rev

A3 Ethnet

Date: Saturday, May 19, 2012 Sheet 12 of 15

5 4 3 2 1
 5 4 3 2 1

TP21
V_PLL

[3,15] XPW RRGTON U13 2.2UH

L2
VDD_5V 4 3 R138 0R VDD_INT_AP
C189 VIN LX 3.3V

1 R140 VDD_SYS_3.3V R139 330R LED DGND
10u EN 110K
2 5 C190 C191 LED3V3
GND FB
D D
RT8024-ADJ 10u
104
R141
120K

DGND DGND

TP22
V_ARM

[3,15] XPW RRGTON TP23

U15 2.2UH U14 1.2V
L3
VDD_5V 4 3 R143 0R VDD_ARM_AP VDD_5V 1 5 R142 0R VDD_ALIVE_AP
C192 VIN LX VIN VOUT
1 R144 VDD_SYS_1.2V C193 C194 2
10u EN 104 100p GND
110K R145
2 5 C195 C196 3 4
GND FB EN NC C197 C198
10u 10K 104
RT8024-ADJ 104 DGND DGND XC6219B121MR
R146 10u

100K

C DGND DGND DGND C

TP25
TP24 V_MEM
V_HDMI 1.8V
[3,15] XPW RRGTON U16 [3,15] XPW RRGTON U17
2.2UH 2.2UH
L4 L5
VDD_5V 4 3 R147 0R VDD_HDMI_AP VDD_5V 4 3 R151 0R VDD_MEM_1.8V
C199 VIN LX C202 VIN LX
VDD_MIPI_1.1V_AP
1 R148 VDD_UO_1.1V_AP 1 R152 VDD_MIPI_1.8V_AP
10u EN 10u EN
110K VDD_UH_1.1V_AP 200K
2 5 C200 C201 VDD_APLL_AP 2 5 C203 C204 VDD_SYS_1.8V
GND FB GND FB
VDD_EPLL_AP
RT8024-ADJ 10u VDD_MPLL_AP RT8024 10u
104 104
R149 VDD_VPLL_AP R153
120K VDD_MIPI_PLL_AP 100K
DGND VDD_HDMI_PLL_AP

DGND DGND DGND

B B

DGND V_SYS_3V3 VDD_SYS_3.3V

VDD_HDMI_OSC_AP
G1

VDD_CKO__AP

A
U18
VDD_KEY_AP
1 10 D1
G1

[3,15] XPW RRGTON EN PGND0 VDD_MODEM_AP

TP26 VBAT 1N4148
2 9 VDD_RTC_AP
VDD_5V IN PGND1 VDD_CAM_AP
2.2UH VDD_DAC_AP R150
L76

K
3 8 R154 0R VDD_SYS_AP 100K
AIN LX0
VDD_SYS_GPS_AP BAT1

1
C205 DGND 4 7 R224 TC20 VDD_EXT_AP
AGND0 LX1 C246 + C245

+
VDD_MSM_AP
10u 5 6 56K VDD_MMC_AP 4 3
FB/OUT AGND1 104 33u 104 4 3
VDD_AUD_AP

GND
TPS62040 VDD_CAN_AP
VDD_ADC_AP BATTERY
VDD_UH_3.3V_AP
0R VDD_UO_3.3V_AP

2
R225 R157 VDD_LCD_AP
DGND 10K BACKUP BATTERY
DGND VDD_M0_AP
A VDD_SYS_3.3V FOR RTC A
VDD_RTC_AP
R158 DGND
0R/NC

DGND

Title
Mini210s,Designed by FriendlyARM in Guangzhou

Size Document Number Rev

A3 System Power

Date: Saturday, May 19, 2012 Sheet 13 of 15

5 4 3 2 1
 5 4 3 2 1

UAF95-05254-1500

GPIO PORT MINI HDMI USB HOST2.0 USB2.0 OTG

S1

S2
CON8
VDD_SYS_3.3V DGND
20 21 M1
CON6 GND0 GND4 XuoVBUS M1
1
[3] XuoVBUS Vbus
1
TMDS_SHIELD2 VDD_5V C209
1 2 [5] XhdmiTX2P 2
1 2 TMDS_D2+ R162 0R R161 22R
3 4 [5] XhdmiTX2N 3 DGND [3] Base_XuoDM 2
[5] XadcAIN1 3 4 XEINT0 [3] TMDS_D2- D-
5 6 4

MINI-AB
[5] XadcAIN2 5 6 XEINT1 [3] TMDS_SHIELD1 VDD_SYS_3.3V
7 8 5 10u

GRAY
[5] XadcAIN6 7 8 XEINT2 [3] [5] XhdmiTX1P TMDS_D1+
9 10 [5] XhdmiTX1N 6 USB_HOST R60 [3] Base_XuoDP R164 22R 3
[5] XadcAIN7 9 10 XEINT3 [3] TMDS_D1- R166 15K D+
11 12 7 1
[5] XadcAIN8 11 12 XEINT4 [3,10] TMDS_SHIELD0 R167 0R VBUS 10K/NC
13 14 [5] XhdmiTX0P 8 [3] XuhDN 2 5
[5] XadcAIN9 13 14 XEINT5 [3,10] TMDS_D0+ R168 0R D- GND3
15 16 [5] XhdmiTX0N 9 24 [3] XuhDP 3 6 [3] XuoID 4
[3,9,11] Xi2cSDA0 15 16 XEINT6 [3,10] TMDS_D0- 24 R169 15K D+ GND2 ID
17 18 XEINT9 [3] 4
[3,9,11] Xi2cSCL0 17 18 GND1 R59
D 19 20 10 D
[3] Xi2cSDA1 19 20 XspiCLK1 [3] TMDS_SHIELD CLK USB A R170
21 22 [5] XhdmiTXCP 11 5
[3] Xi2cSCL1 21 22 XspiCS1 [3] TMDS_CLK+ 10K/NC GND
23 24 [5] XhdmiTXCN 12 25 M2
[3,10] Xi2cSDA2 23 24 XspiMISO1 [3] TMDS_CLK- 25 DGND DGND 20K M2
[3,10] Xi2cSCL2 25 26
25 26 XspiMOSI1 [3] R163 0R
27 28 DGND 13
[3,10,13] XnRSTOUT 27 28 XpwmTOUT2 [3] DDC/CEC GND DGND DGND
29 30

S3

S4
[3,14] XPWRRGTON 29 30 XpwmTOUT3 [3] R165 0R/NC
[3] HDMI_CEC 14
CEC

9
HEAD2X20 2.0mm 15 C212 Mimi_USB
[3] Xi2cSCL1 SCL [3] XEINT8
16
[3] Xi2cSDA1 SDA R178 10u
VDD_5V 17 30K
NC
18
R174 1K +5V
[3] HDMI_HPD 19
HOTPLUG
R179 C210C211 22 23
Mimi USB DGND
2K GND1 GND3 VDD_5V DGND DGND
CAMERA A 10u 104
MINI HDMI 7
U19
IN OUT2
8 XuoVBUS
6 C208
R159 10K OUT1
[3] XuoDRVVBUS 1 5
DGND EN NC2 10u
4
R160 200R NC1
2 3
DGND DGND [3] USBOTG_OVERCUR FLG GND
MIC2075-1YMM
[3,9,11] Xi2cSDA0 CON10
R175 0R/NC 1 2 DGND
[5] XciFIELD R176 0R 1 2 Xi2cSCL0 [3,9,11]
3 4
[5] CAMERA_A_GPIO2 3 4 CAM_A_RESET [5]
5 6
[5] XciCLKenb 5 6 XciHREF [5]
7 8
[5] XciVSYNC 7 8 XciPCLK [5]
9 10
[5] XciYDATA7 9 10 XciYDATA6 [5]
11 12
[5] XciYDATA5
[5] XciYDATA3
[5] XciYDATA1
13
15
11
13
15
12
14
16
14
16
XciYDATA4 [5]
XciYDATA2 [5]
XciYDATA0 [5]
LED x 4 SD WIFI
VDD_SYS_3.3V 17 18 VDD_CAMA_2.8V
17 18
VDD_CAMA_1.8V 19 20
19 20
LED1
J2X10
C214 VDD_SYS_3.3V
[5] LED1
DGND
104 R180 1K
C
LED C
VDD_SYS_3.3V
DGND LED2
VDD_5V
[5] LED2 VDD_SYS_3.3V VDD_SYS_3.3V DGND
R184 10K
R185 1K [5] WiFi0_PD_GPIO
LED R186 10K
R223 0R [5] WiFi0_RESET_GPIO CON9
VDD_SYS_1.8V VDD_CAMA_1.8V LED3
1 R187 10K 1 2
+ BP1 [3] XmmcCLK2 1 2
[5] LED3 VDD_SYS_3.3V 2 3 4
D2 - TMB-12-A05 R188 10K 3 4
[3] XmmcCDn2 5 6
R190 1K [3,9,11] Xi2cSCL0 5 6 Xi2cSDA0 [3,9,11]
VDD_SYS_3.3V A K VDD_CAMA_2.8V VDD_SYS_3.3V 7 8
LED [5] R189 10K [3] XspiMOSI0 7 8 XspiMISO0 [3]
9 10 XspiCS0 [3]
WIFI1_nWP [3] XspiCLK0 9 10
LED4 11 12 WiFi0_RESET_GPIO [5]
1N4148 R193 R192 10K [5] WiFi0_PD_GPIO 11 12
13 14
10K [3] Xmmc2DATA0 [3] XmmcCLK2 13 14 XmmcCMD2 [3]
[5] LED4 VDD_SYS_3.3V [3] XmmcCDn2 15 16 WIFI1_nWP [5]
[3] Xmmc2DATA1 R199 10K 15 16
17 18
R191 1K R194 Q3 [3] Xmmc2DATA0 17 18 Xmmc2DATA1 [3]
[3] XpwmTOUT0 19 20
LED MMBT3904LT1G R200 10K [3] Xmmc2DATA2 19 20 Xmmc2DATA3 [3]
10K [3]Xmmc2DATA2
J2X10
[3] R201 10K
Xmmc2DATA3
[3] R202 10K
DGND XmmcCMD2

Buttons

B B
VDD_SYS_3.3V VDD_SYS_3.3V VDD_SYS_3.3V VDD_SYS_3.3V
POWER JACK PCB
R195 R196 R197 R198
10K K1 10K K2 10K K3 10K K4

[3] XEINT16/KP_COL0 1 2 [3] XEINT17/KP_COL1 1 2 [3] XEINT18/KP_COL2 1 2 [3] XEINT19/KP_COL3 1 2

1 2 1 2 1 2 1 2
3

3
3

C220 RESET C221 RESET C222 RESET C223 RESET

104 104 104 104

DGND DGND DGND DGND DGND DGND DGND DGND S1

S300 VDD_SYS_3.3V

1 2 3 4 5

1 2 3 4 5
R182 R183 R229
VDD_5V 10K/NC 10K/NC
CN1 A 10K
VDD_SYS_3.3V 1
VDD_SYS_3.3V 2
3 D5 R177 10K
[5] PCB1 R173 10K
B 6.3V
JACK [5] PCB2 R181 10K/NC
[5] PCB3
R218 R220 R221 R222 R205 R203 R204 R213 R206 R207 R214 R217 DGND
CON13 DGND DGND
4
10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 4
3 DGND
3 VDD_5V
2
2
1
1

CON12 con4
A A
[3] XEINT16/KP_COL0 1 2 XEINT24/KP_ROW0 [3]
1 2
[3] XEINT17/KP_COL1 3 4 XEINT25/KP_ROW1 [3]
3 4
[3] XEINT18/KP_COL2 5 6 XEINT26/KP_ROW2 [3]
5 6
[3] XEINT19/KP_COL3 7 8 XEINT27/KP_ROW3 [3]
7 8
[3] XEINT20/KP_COL4 9 10 XEINT28/KP_ROW4 [3]
9 10
[3] XEINT21/KP_COL5 11 12 XEINT29/KP_ROW5 [3]
11 12
[3] XEINT22/KP_COL6 13 14 XEINT30/KP_ROW6 [3]
13 14
[3] XEINT23/KP_COL7 15 16 XEINT31/KP_ROW7 [3]
15 16
VDD_SYS_3.3V 17 18 VDD_SYS_3.3V
17 18
19 20
19 20

J2X10
DGND DGND
Title
Mini210s,Designed by FriendlyARM in Guangzhou

KEY X 16 Interface Size

A2
Document Number
Board connector
Rev

Date: Saturday, May 19, 2012 Sheet 14 of 15

5 4 3 2 1
 5 4 3 2 1

D D

C C

M2 M1
ID1 ID2

ID3 ID4

ID5

DGND
M3 M4 M5 M6

B B

A A

Title
Mini210s,Designed by FriendlyARM in Guangzhou

Size Document Number Rev

A3 ID Mark/Fixed Hold

Date: Saturday, May 19, 2012 Sheet 15 of 15

5 4 3 2 1