Thermal Model

Christoph H.
van der Broeck

Methodology for Thermal Modeling,
Monitoring and Control
of Power Electronic Modules
Thermal Loss
Model Model Degradation
Degradation
Monitoring
Thermal Temperatures
Monitoring Losses
Thermal
Control
Temperature
Sensor Data
Power Loss Manipulation

Module
Predictive Maintenance
Aachener Beiträge des ISEA Band 119

Christoph H. van der Broeck

Von der Fakultät für Elektrotechnik und Informationstechnik

der Rheinisch-Westfälischen Technischen Hochschule Aachen
zur Erlangung des akademischen Grades eines Doktors der
Ingenieurwissenschaften genehmigte Dissertation
vorgelegt von
Christoph Henrik van der Broeck, M. Sc.

aus Schwerfen (Stadt Zülpich)
Berichter:
Universitätsprofessor Dr. ir. Dr. h. c. Rik W. De Doncker
Universitätsprofessor Robert D. Lorenz, Ph. D.
Tag der mündlichen Prüfung: 26. November 2018
Diese Dissertation ist auf den Internetseiten

der Universitätsbibliothek online verfügbar.
Electronic version
This dissertation is available online on the website of the university library
(https://publications.rwth-aachen.de/).
AACHENER BEITRÄGE DES ISEA

Vol. 119
Editor:
Univ.-Prof. Dr. ir. h. c. Rik W. De Doncker
Director of the Institute for Power Electronics and Electrical Drives (ISEA)
RWTH Aachen University
Copyright ISEA and Christoph H. van der Broeck, 2019

All rights reserved. No part of this publication may be reproduced, stored in a retrieval system,
or transmitted in any form or by any means, electronic, mechanical, photocopying, recording, or
otherwise, without prior permission of the publisher.
ISSN 1437-675X
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Vorwort
Dieser Dissertation entstand zwischen 2014 und 2018 während meiner Tätigkeit als wis-
senschaftlicher Mitarbeiter am Institut für Stromrichtertechnik und elektrische Antriebe
(ISEA) der RWTH Aachen sowie als Visiting Scholar am Wisconsin Electric Machines
and Power Electronics Consortium (WEMPEC) der University of Wisconsin-Madison. Der
interdisziplinäre Charakter meiner Arbeit entstammt der starken leistungselektronischen
Prägung, die ich am ISEA erfahren haben, und der domainenübergreifenden regelungstech-
nischen Ausbildung und Forschung an der ich in WEMPEC teilhaben konnte. Diese habe
ich versucht in meiner Arbeit zusammenzuführen, um neue Lösungen zur langlebigen und
zuverlässigen Betriebsführung von Leistungsmodulen zu entwickeln.
Besonders danken möchte ich Herrn Professor Rik W. De Doncker und Herrn Professor
Robert D. Lorenz für die gemeinsame Betreuung meiner Dissertation. Herr Professor De
Doncker hat mich als Student für die Leistungselektronik begeistert und es mir im An-
schluss ermöglicht als wissenschaftlicher Mitarbeiter am ISEA zu forschen. Für sein entge-
gengebrachtes Vertrauen, die Freiheit bei der Durchführung meiner Forschungen und seine
wertvollen Hinweise, die maßgeblich zum Erfolg meiner Arbeit beigetragen haben, möchte
ich ihm ganz herzlich danken. Herr Professor Lorenz hat mich von 2011-2012 und 2017-
2018 eingeladen an seinem Lehrstuhl der University of Wisconsin-Madison zu forschen und
mir in dieser Zeit in unzähligen Vorlesungen und Gesprächen ein vielseitiges regelungstech-
nisches Wissen beigebracht. Viele regelungstechnische Aspekte dieser Arbeit sind daraus
entstanden. Für seine Begeisterung, die er meiner Forschung entgegengebracht und die
vielen Jahre, die er mich als Mentor unterstütz hat, bin ich ihm sehr dankbar.
In diesem Zuge möchte ich mich auch ganz besonders bei Sebastian Richter bedanken. Du
hast mir während meiner Bachelorarbeit und Masterarbeit mit viel Einsatz die Grundzüge
der Regelungstechnik beigebracht und mich für das wissenschaftliche Arbeiten an der The-
matik begeistert. Es freut mich sehr, dass wir auch heute noch die gemeinsame Begeisterung
für die Regelungstechnik teilen und so häufig die Chance haben uns darüber auszutauschen.
Für das Gegenlesen meiner Dissertation möchte ich mich bei Sven, Marc, Raphael, Matthias,
meiner Freundin Nicole und meiner Mutter Brigitte bedanken Mit eurer großartigen Hilfe
konnte ich die Dissertationsschrift tatsächlich punktgenau zum Abgabetag fertigzustellen.
Besonders verbunden fühle ich mich allen ISEAner und WEMPECern. Durch die vielen
fachlichen Diskussionen und Aktivitäten, oft bei dem einen oder anderen Bier, habt ihr
großen Anteil am Gelingen meiner Arbeit. Eine wichtige Konstante dies- und jenseits des
Atlantiks ist dabei sicherlich das ”Friday Symposium” und die B12-Runde. Ganz besonders
danken möchte ich in diesem Zusammenhang der LE-Gruppe, meinen Bürokollegen im ISEA
- Atila, Martin, Jan, Florian, Michael und Sven - und meinen Freunden in den USA -
Marc, Phil, Tim und Tim2 . Die vielen Diskussionen, das Entwickeln neuer Ideen, Essen am
Kennedypark bzw. in der ”Library Bar”, die LE-Outdoor-Meetings und sonstiger Feinfug
machten die letzten fünf Jahre zu einer tollen, schönen und spannenden Zeit.
Ebenso danken möchte ich meinen Studenten Philipp, Arne, Liang, Hao, Rafael, Alexan-
der und Lukas, die mit ihren Abschlussarbeiten die zugrundeliegende Forschung zu dieser
Dissertation maßgeblich unterstützt haben. Das gemeinsame Forschen mit euch hat mir
immer große Freude bereitet und es freut mich sehr, dass einige von euch heute am ISEA
bzw. in WEMPEC promovieren.
Den Kollegen der AixControl, ganz besonders Jochen, Sebastian, Felix, Stefan und Marcus
möchte ich für die vielen Diskussionen, das hilfreiche Feedback und die Unterstützung meiner
Forschung danken. Es ist immer schön für ein paar Stunden euch zu besuchen und bei eurem
vorzüglichem Kaffee neue Ideen zu diskutieren.
Bei meiner Familie und meinen Freunden möchte ich mich bedanken für die viele Un-
terstützung, den Rückhalt und die vielen schönen gemeinsamen Erlebnisse. Ganz besonders
danken möchte ich meinem Vater Heinz für die Begeisterung und Faszination an Tech-
nik und Wissenschaft, insbesondere an der Leistungselektronik, die er mir mitgegeben hat,
und meiner Mutter Brigitte für die viele Ermutigung in den letzten 30 Jahren. Schließlich
möchte ich meiner Freundin Nicole danken. Ohne deinen Rückhalt, dein Verständnis und
dein Einsatz uns trotz meines Arbeitspensums eine schöne Zeit zu ermöglichen wäre meine
Dissertation sicher nicht fertig geworden.
Aachen, im Dezember 2018 Christoph van der Broeck

Acknowledgements
This work would not be possible without the funding of the Federal Ministry of Education
and Research (BMBF) via the project InTeLekt (BMBF, Support Code 16EMO0023) and
the funding of the German Academic Exchange Service (DAAD) via a research scholarship.
I would like to thank the company AixControl GmbH, in particular Mr. Jochen von Bloh,
for the support in the design of the load emulator test bench. Furthermore, I would like to
thank Mr. Andre Kipp and InfraTec GmbH for supporting this work with images made by a
IR8300 infra-red camera that allowed monitoring the transient operation of a decapsulated
power module with ultra-high speed and resolution.
i
ii
Abstract
This work proposes a methodology to extend the lifetime of power electronic modules by
monitoring and controlling its thermal properties which affect and reflect degradation. The
key factor that drives the degradation of power electronic modules is the thermally induced
strain caused by the load cycles of the power converter. This thermally induced strain is a
major design limitation for power electronic modules, as their power density is continuously
increased to reduce weight, volume and costs. Although recent research approached the
challenge of extending the lifetime of power electronic modules by active control and careful
monitoring, no unified and consistent methodology yet exists. To address this limitation,
a comprehensive framework for future power electronic modules is proposed that tracks its
thermal key variables, diagnoses its state-of-health and reduces the thermally induced strain
to ensure a long-lasting, reliable and safe operation.
A first step towards more reliable future power converter systems is the development of
accurate, spatially resolved and real-time compatible thermal models of the power module
allowing for fast simulations over long term mission profiles. To meet these requirements,
a 3-D thermal modeling tool is developed that effectively combines a finite volume model
and model reduction techniques. Thereby, the complexity of time-consuming finite-element-
method simulations is avoided, but an appropriate local accuracy is assured. Applying the
developed modeling tool to a trolleybus application that is examined over long-term mission
profiles, the 3-D thermal simulation of the power module significantly speeds up compared
to existing techniques. It is therefore a powerful tool for the lifetime prediction and stress
evaluation of power modules.
For robust spatial temperature monitoring, these thermal models can be combined with
junction temperature measurement techniques, which were developed in this work to extract
the junction temperature from the switching transients of the devices to establish a unique
thermal observer structure. It estimates device losses and 3-D temperature distributions
throughout the power module instantaneously and averaged over one electrical excitation
period with zero lag over a wide bandwidth. The observer structure is combined with a
loss injection algorithm that manipulates the gate resistance and the switching frequency
for small signal device loss excitation, creating a device self-sensing unit that exhibits two
innovative features. On the one hand, it enables the adaptive calibration of the device loss
model avoiding time-consuming off-line calibrations. On the other hand, it can conduct
an on-line thermal impedance spectroscopy of the power module without interruption of
normal operation. The extracted thermal impedance can be effectively used to detect,
separate and quantify local degradations allowing remote diagnosis of the state-of-health of
power modules in the field via the Internet of Things. Consequently, the extracted state-
of-health information is valuable information to schedule maintenance and to appropriately
reduce the operational stress enabling reliable long-term operation.
iii
Active thermal cycle reduction techniques increase the reliability and service life of power
electronic modules. They directly reduce thermally induced strain and simultaneously de-
crease fatigue. This work is the first that addresses the closed loop active thermal cycle
reduction of a multi-device power module by introducing the following new technologies.
A minimal invasive loss manipulation unit for individual power devices was developed that
effectively combines gate resistance and switching frequency as manipulated inputs for the
decoupled loss manipulation of the power module. This loss manipulation unit is cascaded
by a model-based control algorithm that controls the averaged junction temperatures, which
are estimated with the aforementioned observer. For the derivation of stress relieving tem-
perature references that are feasible within the loss manipulation limits a virtual heat sink
concept is proposed that is utilized as a trajectory filter. The evaluation of the active
thermal cycle reduction with the proposed methodology for a trolleybus application over
typical mission profiles shows that the service life of the power module can be increased
by a factor of two. Compared to a power module that achieves the same lifetime through
physical scaling, the active thermal cycle reduction can achieve a life cycle cost reduction
of up to 10 %.
iv
Contents
Abstract iii
1 Introduction 1
1.1 Motivation and Background . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2 Research Objective . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.3 Outline of this Thesis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 State-of-the-Art Review 5
2.1 Reliability-Oriented Electrothermal Modeling and Simulation . . . . . . . . . 5
2.1.1 Loss Modeling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1.2 Thermal Modeling . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1.3 Model Order Reduction Techniques . . . . . . . . . . . . . . . . . . . 8
2.2 Thermal Monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2.1 Real-time Junction Temperature Sensing of IGBTs . . . . . . . . . . 9
2.2.2 Thermal Monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.3 Condition Monitoring and State of Health Estimation . . . . . . . . . . . . . 14
2.3.1 Failure Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.3.2 State-of-Health Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . 16
2.3.3 Lifetime Prognosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.4 Active Thermal Control Techniques . . . . . . . . . . . . . . . . . . . . . . . 18
2.4.1 Reference Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.4.2 Active Thermal Control of AC Applications . . . . . . . . . . . . . . 19
2.4.3 Device Loss Modulation Techniques . . . . . . . . . . . . . . . . . . . 19
2.5 Summary of Identified Research Opportunities . . . . . . . . . . . . . . . . . 20
3 Methods for Electrothermal and Degradation Modeling 23

3.1 Loss Modeling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.1.1 Conduction Loss Modeling . . . . . . . . . . . . . . . . . . . . . . . . 23
3.1.2 Switching Loss Modeling . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.1.3 Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
3.2 Thermal Modeling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.2.1 Fundamental Mechanisms of Heat Transfer . . . . . . . . . . . . . . . 29
3.2.2 Numerical Modeling of Heat Transfer in Solids . . . . . . . . . . . . . 31
3.3 Model Order Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
3.3.1 Balanced Truncation Method (BTM) . . . . . . . . . . . . . . . . . . 40
3.3.2 Singular Perturbation Approximation (SPA) . . . . . . . . . . . . . . 41
3.3.3 System Gramians and Hankel Singular Values (HSVs) . . . . . . . . . 42
3.4 Review and Modeling of Degradation Mechanisms . . . . . . . . . . . . . . . 45
3.4.1 Degradation Mechanisms . . . . . . . . . . . . . . . . . . . . . . . . . 45
v
Contents
3.4.2 Experimental Assessment of Degradation . . . . . . . . . . . . . . . . 50

3.4.3 Lifetime Estimation and Degradation Analysis . . . . . . . . . . . . . 52
3.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
4 Electrothermal Simulation and Lifetime Estimation over Mission Cycles 57

4.1 Electrothermal Modeling of the Hybridpack2 Power Module . . . . . . . . . 57
4.1.1 Loss Model Parametrization . . . . . . . . . . . . . . . . . . . . . . . 57
4.1.2 Software Framework for Numerical Thermal Modeling . . . . . . . . . 59
4.1.3 Flexible Application of the Thermal Modeling Software . . . . . . . . 63
4.1.4 Convection Modeling . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
4.1.5 Optimized Meshing of Power Module Structures . . . . . . . . . . . . 65
4.1.6 Compact State Space Modeling for 3-D Real-Time Models . . . . . . 68
4.1.7 Experimental Thermal Model Validation . . . . . . . . . . . . . . . . 71
4.1.8 Model Reduction via Singular Perturbation Approximation (SPA) . . 72
4.1.9 Lifetime and Degradation Modeling . . . . . . . . . . . . . . . . . . . 77
4.2 Simulation Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
4.2.1 Vehicle and Driver Model . . . . . . . . . . . . . . . . . . . . . . . . 80
4.2.2 Drive Train Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
4.2.3 Mission Cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
4.3 Simulation of the Power Module over Mission Cycles . . . . . . . . . . . . . 85
4.3.1 Drive Train Simulation . . . . . . . . . . . . . . . . . . . . . . . . . . 86
4.3.2 Thermal Simulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
4.3.3 Performance Analysis of the Simulation . . . . . . . . . . . . . . . . . 92
4.4 Degradation Analysis and Lifetime Estimation . . . . . . . . . . . . . . . . . 93
4.4.1 Categorization of Thermal Cycles . . . . . . . . . . . . . . . . . . . . 93
4.4.2 Categorization of Cycle-based Degradation . . . . . . . . . . . . . . . 95
4.4.3 Lifetime Estimation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
4.4.4 Opportunities for Active Thermal Cycle Reduction . . . . . . . . . . 97
4.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
5 Thermal Monitoring 101

5.1 Junction Temperature Estimation via Gate Plateau Voltage Sensing . . . . . 101
5.1.1 Gate Plateau Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
5.1.2 Basic Principle of Temperature Estimation . . . . . . . . . . . . . . . 104
5.1.3 Temperature Characteristics of the Gate Plateau Voltage . . . . . . . 104
5.1.4 Temperature Estimation Process . . . . . . . . . . . . . . . . . . . . 108
5.1.5 Sensitivity Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
5.1.6 Sensing Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
5.1.7 Experimental Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . 116
5.1.8 Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
5.2 Thermal Predictors and Observers . . . . . . . . . . . . . . . . . . . . . . . . 119
5.2.1 Loss Prediction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
5.2.2 3-D Spatial Thermal Predictors . . . . . . . . . . . . . . . . . . . . . 120
5.2.3 Instantaneous Thermal Observer . . . . . . . . . . . . . . . . . . . . 122
5.2.4 Combined Instantaneous and Averaged Thermal Observer . . . . . . 130
vi
Contents
5.2.5 Adaptive Observer for Switching Loss Model Calibration . . . . . . . 138

5.2.6 Utilization of NTC Sensors in Thermal Monitoring . . . . . . . . . . 140
5.3 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
6 Real-Time Degradation Monitoring and Diagnosis 147

6.1 Generic Condition Monitoring of Power Modules . . . . . . . . . . . . . . . . 147
6.2 Observer-based Degradation Detection . . . . . . . . . . . . . . . . . . . . . 149
6.3 Degradation Identification in the Frequency Domain . . . . . . . . . . . . . . 150
6.4 In-situ Thermal Impedance Spectroscopy (ITIS) . . . . . . . . . . . . . . . . 153
6.4.1 Operation Principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
6.4.2 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
6.5 Localized Identification and Quantification of Power Module Degradation . . 159
6.5.1 Artificial Neural Networks (ANNs) . . . . . . . . . . . . . . . . . . . 159
6.5.2 Artificial Neural Network-based Degradation Diagnosis . . . . . . . . 161
6.6 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
7 Active Thermal Cycle Reduction 167

7.1 Active Thermal Control Methodology . . . . . . . . . . . . . . . . . . . . . . 167
7.2 Loss Manipulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168
7.2.1 Gate Resistance-based Loss Manipulation . . . . . . . . . . . . . . . 169
7.2.2 PWM Frequency-based Loss Manipulation . . . . . . . . . . . . . . . 172
7.2.3 Loss Manipulation Units (LMUs) . . . . . . . . . . . . . . . . . . . . 173
7.3 Active Thermal State Feedback Control . . . . . . . . . . . . . . . . . . . . . 176
7.3.1 Averaged Junction Temperature Control . . . . . . . . . . . . . . . . 176
7.3.2 Implementation Options for Averaged Junction Temperature Estimation177
7.3.3 Thermal State Feedback Control Design . . . . . . . . . . . . . . . . 178
7.4 Active Thermal Cycle Reduction . . . . . . . . . . . . . . . . . . . . . . . . 183
7.4.1 Virtual Heat Sink Concept . . . . . . . . . . . . . . . . . . . . . . . . 184
7.4.2 Virtual Heat Sink Design . . . . . . . . . . . . . . . . . . . . . . . . . 185
7.4.3 Design of the Error Feedback Path . . . . . . . . . . . . . . . . . . . 187
7.5 Review of the Active Thermal Control Methodology . . . . . . . . . . . . . . 188
7.6 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190
7.6.1 Evaluation of Active Thermal Cycle Reduction for a Repetitive Load 190
7.6.2 Evaluation of Active Thermal Cycle Reduction for a Trolleybus . . . 196
7.7 Evaluation of Lifetime Increment and Life Cycle Costs for a Trolleybus . . . 200
7.7.1 Evaluation of the Lifetime Increment . . . . . . . . . . . . . . . . . . 200
7.7.2 Lifetime Increment by Physical Scaling of the Power Module . . . . . 202
7.7.3 Impact of Active Thermal Cycle Reduction on Degradation . . . . . . 203
7.7.4 Potential of Active Thermal Cycle Reduction for Life Cycle Cost Re-
duction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206
7.8 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 211
8 Experimental Evaluation 213

8.1 Experimental Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213
8.1.1 Electric Load Emulator . . . . . . . . . . . . . . . . . . . . . . . . . . 213
vii
Contents
8.1.2 Device under Test (DUT) . . . . . . . . . . . . . . . . . . . . . . . . 215

8.2 Electrothermal Model Evaluation via Dynamic Load Emulation . . . . . . . 217
8.3 Electrothermal Real-Time Monitoring . . . . . . . . . . . . . . . . . . . . . . 219
8.3.1 Real-Time Model Evaluation . . . . . . . . . . . . . . . . . . . . . . . 220
8.3.2 Monitoring of Device Losses and 3-D Temperature Distributions . . . 221
8.3.3 NTC Sensor-based Coolant Temperature Observer . . . . . . . . . . . 225
8.3.4 Evaluation of Adaptive Loss Parameter Identification . . . . . . . . . 227
8.4 In-Situ Thermal Impedance Spectroscopy (ITIS) . . . . . . . . . . . . . . . . 229
8.5 Active Thermal Cycle Reduction . . . . . . . . . . . . . . . . . . . . . . . . 231
8.5.1 Periodic Load Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . 231
8.5.2 Modified Trolleybus Load Profile . . . . . . . . . . . . . . . . . . . . 232
8.6 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234
9 Conclusions 235
9.1 Contributions and Key Outcome . . . . . . . . . . . . . . . . . . . . . . . . 236
9.2 Recommended Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . 238
A Appendix 241
A.1 Derivation of Averaged Conduction Losses . . . . . . . . . . . . . . . . . . . 241
A.2 Switching Loss Characterization . . . . . . . . . . . . . . . . . . . . . . . . . 243
A.3 Transient Thermal Impedance Test Bench . . . . . . . . . . . . . . . . . . . 246
A.4 Derivation of a Base Transformation for the Balanced Realization . . . . . . 247
A.5 Synthetic Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 248
Acronyms 253
Symbols 255
Bibliography 261
Curriculum Vitae
viii
1 Introduction
The rise of our modern way of living has led to an enormous increase of greenhouse gases
in the atmosphere during the 20th century [182]. The energy generation via fossil fuels as
well as the transportation sector, which primarily rely on combustion engines, are one of
the major emitters of CO2 today [148]. The consequences of growing CO2 emissions start to
influence all our lives and will persist for many centuries if the emissions are not significantly
reduced. CO2 emitted in the atmosphere absorbs sunlight that would normally be rejected
back into space. However, as the sunlight energy is absorbed by the CO2 , it heats up the
atmosphere and thereby our planet [161]. As consequences, the ocean temperature will
rise, the ocean circulation will be transformed and the global carbon cycle processes will
be affected leading to a further increased emission of CO2 in the atmosphere [229]. These
effects will endanger many ecological systems and will result in extreme weather conditions
and floodings, crop failures, millions of refugees losing their homes and an unpredictable,
accelerating and irreversible change of the climate and living conditions worldwide.
To address these challenges, the United Nations committed themselves in the ”Paris
Agreement 2015” to limit the emission of greenhouse gases such that the global temperature
does not exceed an elevation of 2 ◦C in comparison to the preindustrial global temperature
[231]. In order to achieve the goals of the ”Paris Agreement”, the German government
formulated the ”Klimaschutzplan 2050” with the intermediate goals to reduce the German
greenhouse gas emissions compared to 1990 by 55 % until 2030 and by 70 % until 2040 [168].
To realize these plans and to prevent the ”Paris Agreement” to fail, the CO2 emission of
the electricity generation and the transportation sector must be significantly reduced in a
very short amount of time. The key technologies to realize a reduction of CO2 emission in
the electricity generation are renewable energies. Similarly, in the transportation sector the
combustion engine must be repelled and replaced by electric drive systems operated with
electricity from renewable energy sources.
To make this development towards more renewable energy sources and electric propulsion
economically feasible, sustainable and attractive power electronic converters, which are a
key component for both applications, must be reduced in size and weight to save costs and
resources. However, this multi-physics integration of power converters must be pursued
without compromising its expected lifetime and reliability. This is the only path that allows
both, cost reduction and assurance of reliability. It requires accurate modeling for insightful
lifetime prediction, smart monitoring for degradation detection and lifetime prognosis and
active control of the stress within critical components to increase reliability and lifetime.
Therefore, in this thesis various technologies are developed as part of a methodology for the
reliability and lifetime assessment and enhancement of future power electronic systems.
1
1 Introduction
1.1 Motivation and Background

The power converter is the key component in modern electric drive trains, e.g. in elec-
tric vehicles or wind and water energy conversion systems. It injects current from various
sources, e.g. the utility grid or a battery, into an electric machine, such that a desired
torque is realized at the machine shaft. The conduction and switching losses, which occur
during the operation of the converter in its power semiconductor, are dissipated through the
structure of the power module via the heat sink to the coolant, ensuring that the maximum
semiconductor temperature is not exceeded.
Load cycling, which occurs due to repetitive acceleration and breaking action of the
electric drive, results into strong variation of the device losses and thus leads to thermal
cycling of the power module. At the material interfaces of the power module, which exhibit
different coefficient of thermal expansions (CTEs), the thermal excitation creates thermally
induced strain [20, 234]. After long term operation with severe thermal stress, the thermally
induced strain leads to micro cracks, which grow continuously due to the applied strain. At
some point, this creates voids and delamination processes leading to the destruction of the
material interface which ultimately causes the failure of the power module [71].
The reliable and safe operation of power electronic systems is of great importance in most
applications such that a failure of the converter must be avoided under all circumstances.
A conservative approach is the strategic over-sizing of converters. However, this leads to
power conversion systems with increased weight, volume and costs.
1.2 Research Objective

This work aims to promote technologies that avoid strategic over-sizing of power electronics
by effective and insightful modeling, precise thermal management and predictive mainte-
nance efforts. These technologies shall help to develop future power electronics that are
compact and cost-efficient and also provide safe and reliable long-term operation. There-
fore, this research has three main focuses:
• Time efficient and detailed methods for modeling and simulation of power modules are
investigated to gather more in-depth knowledge about critical thermal stress within
power modules that occurs during realistic load profiles.
• Thermal monitoring solutions are developed that enable detailed real-time estimation
of the occurring thermal stress and the resulting degradation state of a power module.
This ensures that critical degradation states of the converter can be identified and
evaluated such that the peak power of the drive train can be reduced to decelerate
degradation. Thereby, the electric drive train can be used safely for a limited amount
of time until it is brought to maintenance.
• Active thermal control concepts are proposed that actively reduce the thermally in-
duced stress at the critical module interconnects. These concepts contribute to the
lifetime enhancement of converters and provide the opportunity to design next gen-
eration power modules with reduced size, weight and cost without compromising its
reliability.
2
1.3 Outline of this Thesis
Figure 1.1: Hybridpack2 power module (HP2) from Infineon [107] that is used as device
under test (DUT) throughout this work
1.3 Outline of this Thesis

This section provides an overview of the individual chapters of the thesis. All technologies
that are developed within this work are applicable for a wide range of power converter
assemblies. However, this work consistently uses the Hybridpack2 power module (HP2),
which is depicted in Figure 1.1, as an example for the evaluation of the proposed technologies.
Chapter 2 - State-of-the-Art Review The second chapter reviews the state-of-the-art

of reliable-oriented electrothermal modeling techniques, thermal monitoring solutions and
active thermal control methods for power electronic modules. The limitations of state-of-
the-art technologies are discussed to derive research opportunities that are addressed within
this thesis.
Chapter 3 - Methods for Electrothermal and Degradation Modeling The third chap-
ter introduces modeling techniques for the time efficient and detailed 3-dimensional (3-
D) electrothermal simulation and degradation analysis of power electronic modules. For
this purpose, the thermal finite volume method (FVM) is combined with model reduction
techniques. This creates optimized models for simulation and real-time monitoring of 3-
D distributed temperatures and device losses of power modules. This chapter concludes
by reviewing degradation mechanisms that are triggered by thermally induced strain and
presents an empirical framework for the lifetime prediction and degradation analysis of
power modules.
Chapter 4 - Electrothermal Simulation and Lifetime Estimation over Mission Cycles

This chapter applies the proposed electrothermal and degradation modeling methodology
to the Hybridpack2 power module (HP2). It derives time efficient models for simulation
and real-time applications with a software framework that was developed within this work
for the flexible FVM modeling of power modules. The compromise between compactness
and accuracy of an electrothermal model, which has to be considered for the meshing and
order reduction of the model, is analyzed and discussed. For the evaluation of the model in
a realistic application, a trolleybus simulation framework has been developed. This is used
to evaluate the detailed electrothermal stress that occurs in the HP2 power module over
realistic mission profiles. The resulting temperature data are used for lifetime prediction of
the power module and to identify the key driving factors for degradation.
3
1 Introduction
Chapter 5 - Thermal Monitoring The fifth chapter starts by introducing a new tech-
nique for junction temperature sensing of insulated-gate bipolar transistors (IGBTs) that
uses gate plateau voltage and load current information. This technique is in-depth analyzed
and experimentally evaluated over a wide operation range. Furthermore, this chapter in-
troduces thermal observers that combine the electrothermal real-time models developed in
chapter 2 and 4 with real-time junction and NTC sensor-based temperature information.
They estimate device losses and 3-D distributed temperatures throughout the power module
instantaneously and averaged over one electrical excitation period insensitive to modeling
errors over a wide bandwidth.
Chapter 6 - Real-Time Degradation Monitoring and Diagnosis In the sixth chapter

methods for real-time degradation monitoring and diagnosis are introduced. It is addressed
how the thermal observers, introduced in chapter 5, can intrinsically detect small abnor-
malities of the electrothermal power module behavior that can be linked to degradation
mechanisms. For more accurate degradation monitoring, the in-situ thermal impedance
spectroscopy is proposed. It excites the power devices by small signal loss injection, ex-
tracts the temperature response with a unique filtering technique and computes the thermal
impedance in magnitude and phase over a wide bandwidth. In particular, the phase infor-
mation is a key indicator of structural degradation and can be extracted with zero error.
Consequently, the frequency response information is effectively processed by artificial neural
networks to separate and quantify localized degradation modes.
Chapter 7 - Active Thermal Cycle Reduction This chapter proposes a methodology for
the active thermal control of power electronic modules in AC applications that reduces ther-
mal cycles. The methodology includes a loss manipulation unit, a thermal observer structure
and an active thermal cycle reduction algorithm. It aims to reduce the thermomechanical
strain in the interconnects of the module in order to enhance its reliability and lifetime.
The introduced methodology is evaluated for repetitive loading as well as for a trolleybus
load profile, which was derived in chapter 4, to evaluate the lifetime enhancement that can
be achieved. For the trolleybus application, the life-cycle cost benefit that can be obtained
with this technology is analyzed for various scenarios to evaluate its economic potential.
Chapter 8 - Experimental Evaluation The eighth chapter discusses experimental results

that demonstrate the feasibility of the technologies that were developed within this work.
All experiments were conducted on a load emulator test bench that allows the flexible
operation of power modules over dynamic load profiles. These are applied to a decapsulated
Hybridpack2 power module (HP2) that is monitored by four infrared (IR) sensors. The IR
sensors provide real-time junction temperature information to the thermal monitoring and
control algorithms. Furthermore, IR cameras were used to extract the surface temperature
distribution of the power module for further evaluation.
Chapter 9 - Conclusions The ninth chapter summarizes the findings of the previous
chapters, highlights the contributions that were made within this work and provides recom-
mendations for future work.
4
2 State-of-the-Art Review
This chapter reviews the state-of-the-art of reliability oriented thermal modeling, monitoring
and control techniques for power electronic modules.
2.1 Reliability-Oriented Electrothermal Modeling and

Simulation
First, concepts for the efficient electrothermal modeling of power electronic modules are
reviewed. Therefore, typical loss modeling approaches for power electronics are discussed
with a focus on three-phase pulse-width-modulated (PWM) converters. Afterwards, thermal
modeling techniques are reviewed that allow the detailed computation of 3-D temperature
distributions within power modules. Finally, techniques for model order-reduction are re-
viewed with respect to their applicability for the developed 3-D thermal models.
2.1.1 Loss Modeling

The loss modeling of three phase PWM converters is a topic that was widely addressed over
the last three decades. One of the first papers that rigorously studied the loss characteristics
of transistor-based power electronic converters was [250]. It used descriptive equations that
are physically motivated to model the conduction and switching losses over one switching
periodic of PWM modulated converters. Most following work used this modeling format to
compute device loss in simulations and in real-time.
To obtain the average conduction losses of the power switch and the diode over one
excitation period, [208] integrated the conduction loss equation. The result is the well-
known loss equation for operation at a constant modulation index, phase angle and load
current. In the following work, [172] investigated the effect of various modulation techniques
on the conduction losses of a three-phase converter. The first full model that determined the
averaged and instantaneous device losses of a three-phase converter at various modulation
techniques was presented in [57]. Furthermore, [57] also discussed modeling approaches for
the reverse recovery losses of the diode.
The state-of-the-art IGBT empirical switching loss models that use a power law relation-
ship and that are still used today were derived based on prior work in [43]. In consequent
research the developed modeling tools were applied and refined, e.g. in [42, 67, 140, 152]. A
critical aspect in the loss modeling is that the current ripple must be taken into account for
obtaining accurate results. This topic has been investigated in-depth in [337] and showed
that if the current ripple does not become too large, it can be neglected with a negligible
error.
5
This review indicates that a physically motivated empirical device loss model as it has
been firstly used in [250] and refined, e.g. in [43], is perfectly suitable for the device loss
computation within this work.
2.1.2 Thermal Modeling

This section presents state-of-the-art methodologies that are applied for the modeling of
heat transfer processes in power semiconductor modules.
Cauer and Foster models Traditionally, the thermal modeling of power semiconductor
devices and modules is based on thermal equivalent circuits using either Cauer or Foster
models. These were originally developed as tools for the electrical network and impedance
analysis [58, 106]. However, already during the first developments of power semiconductors,
Foster models were used as thermal equivalent circuits that were parameterized using a
thermal impedance test-bench [292]. Foster and Cauer models are very popular even today,
because they exhibit a simple structure and their model parameters are often listed in data
sheets. This makes them easy to use for analysis [205], simulation [67, 300] and also for
monitoring of power modules [11, 213].
Foster models do not reflect the physical structure of an assembly, but only aim to compute
the junction temperature dynamics. They can be easily parameterized using a thermal
impedance test bench, as illustrated in [132, 289, 292]. In comparison, Cauer models aim to
reflect the physical structure of an assembly and provide information on temperature within
the assembly. However, their parameters are difficult to obtain, e.g. via finite element
method (FEM) [200, 346]. Furthermore, their accuracy over a wider frequency range is
limited because it is not possible to accurately reflect the heat transfer characteristic of a
complex 3-D geometry with Cauer models that exhibit a low complexity. As a consequence,
for fast and more detailed 3-D thermal modeling and simulation of power semiconductor
modules other approaches have been pursued.
Analytical models A well-known alternative are analytical modeling approaches. For

power module assemblies that do not exhibit multiple layers, a 2-dimensional (2-D) or
even 3-D analytical solution can be formulated by explicitly solving the heat equation by
separation of the variables. This approach has been used in [159] and [90]. The solution is
typically a Fourier Series whose coefficients can be determined analytically. It allows the
calculation of the transient temperature at arbitrary locations within the solution range.
However, this approach cannot handle power module assemblies that consist of multiple
composite layers.
In [53, 295] this analytical method has been enhanced to overcome the discussed limita-
tion. Multiple problem sets, one for each material layer of the power module, are formulated
as Fourier Series. The Fourier coefficients of each solution region need to be updated each
time step. Within this process, the boundary conditions between the different layers are
enforced by state feedback loops. The feedback gains are to be chosen carefully to achieve
accurate transient simulation results. If they are sized too small, the boundary conditions
do not converge. Otherwise, with large feedback gains, the simulation time increases and
6
2.1 Reliability-Oriented Electrothermal Modeling and Simulation
eliminates the benefit of this modeling method. As a result, the Fourier series-based thermal
model shows desirable properties if the number of different solution regions is limited. How-
ever, this is not the case for most power electronic modules which exhibit multiple material
layers.
Finite element method (FEM) models FEM [235, 297] is an optimal tool to simulate
the temperature distribution in complex inhomogeneous structures with nonlinear material
properties in strong detail [138]. It subdivides the solution into small volumes which often
exhibit a tetrahedral structure. These are called finite elements. Inside each finite element a
shape functions is used to describe its interior temperature distribution. The shape functions
are linearly weighed with the temperatures at the nodes of the finite elements. A solution for
the temperature nodes is obtained by minimization of the total error of the heat equation.
Thus, the calculation of the temperatures is finally achieved by error minimization of an
over-determined system of linear equations. One important advantage of FEM simulations
is their ability to work with very flexible geometry and meshes. This allows addressing
multi-scale models very effectively, as demonstrated in [170]. However, the FEM requires
comparatively high computation effort. In particular, it does not provide a time efficient
simulation environment for long and complex load cycles, which is often required in the
thermal simulation of power converters. As a consequence, FEM simulations are typically
only used to extract parameters for more time efficient lumped parameter thermal models,
which is discussed in the following.
Lumped parameter thermal models A widely spread method for the thermal modeling
of power electronics and drives are lumped parameter thermal models [22, 31, 140, 160,
244, 247, 342]. These are basically Cauer-style models that are enhanced to accommodate
the temperatures within 3-D geometries. Lumped parameter thermal models exhibit signif-
icantly more accuracy than simple 1-dimensional (1-D) Cauer models. Additionally, their
simulation speed is significantly higher compared to FEM models, which has been investi-
gated for example in [22]. Their parameters are determined either by measurements, which
is most popular if the thermal nodes of interests are accessible, e.g. in electrical machines
or large scale heat sinks, e.g. [31, 140, 244]. For integrated power electronic modules this
is usually not an option, because the internal temperature nodes within these assemblies
are not accessible. Consequently, FEM models are used to extract the parameters for the
lumped parameter thermal models, which is discussed in [22, 247]. This FEM based ex-
traction of lumped parameter for a 3-D lumped parameter model exhibits some limitations.
The extraction of the equivalent circuit results in additional simulation errors of up to 1.5 %
according to [22]. Furthermore, the lumped parameter thermal model approach is difficult
to pursue for large scale geometries with fine meshes because the extraction process becomes
increasingly complex and difficult.
Finite difference method model The finite difference method (FDM) [85, 235, 320] is an
alternative thermal modeling method, which provides fast computation times and can work
with a large variety of geometries. The finite difference method basically approximates the
partial derivatives in the heat equation by a Taylor Series truncated after its first order
7
element. It has been successfully applied for power electronic modules in [85, 98, 153, 217,
249, 332]. The major advantage of the FDM simulation is its simple and strait forward
formulation and its time efficient simulation performance. That is the reason why it has
been intensively used for the thermal simulation of power electronics. However, the meshing
of the finite difference method is not at all as flexible as the meshing of the finite element
method. Furthermore, in most FDM simulations, in particular in [98, 153, 249, 332], the
energy conversion equation is not accurately taken in account. This may not necessarily lead
to a large simulation error. Nevertheless, most literature on thermal modeling techniques
e.g. [59] and [6] underlines that the direct discretization with the finite difference method
is often prone to simulation errors.
Finite volume method model The final method to be discussed is the so called FVM
[59, 235]. Its application is demonstrated for general heat transfer problems in [59] and for
heat transfer in battery systems in [334]. It shows a strong similarity to the finite differ-
ence method and indeed the differential equations resulting from both can be identical as
discussed in [59, 235]. This similarity is investigated from a more physics based perspective
in [68], which discusses how changes in the calculation of heat flux density can significantly
improve the accuracy of the finite difference method. The key difference in the derivation
between the finite difference method and the finite volume method is that the FVM directly
uses the energy conversion equation to formulate the differential equation for each temper-
ature node. Thereby, the finite volume method provides a flexible, precise and fast spatial
thermal simulation framework.
2.1.3 Model Order Reduction Techniques

Model order reduction (MOR) has been intensively studied in many domains over the last
decades reaching from structural mechanics, control of large scale systems, microelectronics,
to computational fluid dynamics [36]. There are a huge variety of methods available whose
advantages and disadvantage are illustrated in [38, 122, 124, 181, 265]. In the area of
power electronics and electrical machines model order reduction (MOR) techniques have
been applied for example in [40, 110] for the thermal MOR of electrical machines, in [4] for
the thermal MOR of power devices packages mounted on PCBs and in [217] for the thermal
MOR of four power devices mounted on an aluminum plate. However, despite the enormous
capability of MOR techniques, they are not widely applied in power electronics or drives.
In particular, they so far have not been applied for the effective simulation of large scale
multi-chip power modules.
In [124] various popular MOR techniques have been compared for different application
areas including heat transfer. The compared MOR techniques can be categorized in two
classes. One class consists of the moment matching methods. They try to match the Laurent
Expansion of transfer functions around a point in the complex plane.
• Arnoldi Procedure
• Lanczos Procedure
• Rational Krylov Method
8
2.2 Thermal Monitoring
The other class aims to reduce the model order based on the Hankel singular values (HSV)
of the system, which are related to the energy transfer from the system input to the system
outputs.
• Balanced truncation method (BTM)
• Approximate balanced truncation
• Singular perturbation approximation (SPA)
• Hankel norm approximation
Most moment matching methods like the Arnoldi and the Lanczos Procedure are only
applicable for single-input single-output (SISO) systems. They were not considered in the
context of this work, as the thermal model of large scale power modules is always a multiple-
input multiple-output (MIMO) model. The Rational Krylov Method is a generalized method
of the Lanczos Procedure, which can be applied to higher order MIMO systems. However,
the stability of the resulting reduced order systems is not necessarily guaranteed [38] and
for this method global error bounds do not exist according to [124].
The HSV based methods typically lead to lower error norms compared to the moment
matching methods. In particular, the balanced truncation method (BTM) [210] and the
closely related singular perturbation approximation (SPA) provide exceptional good results
for the truncation of large scale MIMO systems with well-known error bounds [116] over
a wide frequency range. That is why the approximate balanced truncation and the hankel
norm approximation are not further considered for this work.
According to [37, 39, 188] the BTM is the best choice for the approximation of systems
over a wide frequency range. However, the BTM simply truncates unnecessary system
states. This leads to a steady-state modeling error that can become relevant if the model
is very strongly truncated, e.g. from 1000 states to a few states. As a consequence, the
BTM is an optimal choice for the model reduction if the steady-state error is negligible.
However, if the original system is truncated strongly, it is often a better option to use the
SPA, because it corrects the steady state behavior appropriately. The major compromise of
the SPA is that it introduces a feed-through matrix to a state space model to correct the
dc gain. This degrades the model accuracy at high bandwidth.

This section discusses the state-of-the-art of real-time junction-temperature sensing and
thermal monitoring methods for power modules.
2.2.1 Real-time Junction Temperature Sensing of IGBTs

Temperature sensors The most popular module integrated temperature sensor is a simple
negative temperature coefficient thermistor (NTC) resistance that is mounted on the direct
copper bond (DCB) of the power module [146, 319, 333]. It allows tracking the average base
plate temperature of the power module and can prevent the entire converter module from
9
Figure 2.1: Hybridpack2 power module and IR image during operation
over-temperature operation. The drawback of NTC sensors is their limited bandwidth and
the mounting position, which makes it difficult to use them for the dynamic monitoring of
the power devices [146, 269]. The utilization of an IR sensor is an alternative that allows
high bandwidth temperature measurement of power electronic devices [24]. However, it
requires a decapsulated power module to extract thermal information, which is illustrated
in Figure 2.1 Therefore, the utilization of IR sensors is an option to investigate and monitor
power modules in a laboratory environment. Nevertheless, a decapsulated power module is
typically avoided in real applications, because even small impurities can lead to critical arc
discharges that may destroy the power module.
To overcome these drawbacks, an on-chip temperature sensor can be integrated on the
IGBT chip. This concept was investigated in [41, 145, 211]. However, for this approach
special IGBT chips with integrated sensing diodes are required, which are not commonly
used in modern converters. Another limitation of this approach is that the sensing diodes
occupy space on the power semiconductor that cannot be used for active device cells and
thereby reduce the power density of the power devices.
Definition of virtual junction temperature A lot of research effort has been put in the
extraction and processing of temperature-sensitive electrical parameters (TSEPs) for tem-
perature estimation [18, 19, 25, 222]. TSEPs reflect the averaged device temperature referred
to as virtual junction temperature. To understand the origin of this term it is important
to realize that the device temperature is not distributed homogeneously over the device,
as discussed in [92, 267] and can be observed from the IR image in Figure 2.1. Temper-
ature gradients along each of the four paralleled devices, resulting from the large number
of paralleled IGBT cells within each device, can be noticed. Furthermore, the temperature
distributions within the device changes notably over one PWM cycle due to the transient
nature of the switching losses. Therefore, different device temperatures are reflected by
TSEP at specific time instants during the turn-on, turn-off or conduction interval. For this
reason, it is not possible to identify one junction temperature of a device that can be ex-
tracted correctly. Instead one can only define a specific volume averaged temperature of the
device at a specific time instant as a so-called virtual junction temperature. This particular
10
virtual junction temperature can be extracted by one TSEP. As a consequence, the wide
range of proposed TSEP all correctly reflect slightly different virtual junction temperatures.
However, for simplicity, the term virtual junction temperature is abbreviated as junction
temperature in the following.
TSEP based junction temperature estimation of IGBTs The first approaches for IGBT
junction temperature estimation [167] used the temperature sensitivity of the IGBT collector-
emitter voltage uce . This requires a sensing circuit parallel to the device, which can block
the high dc link voltage but amplifies the small collector-emitter voltage when the device is
conducting. For this task various measurement circuits have been proposed [35, 113, 171,
173, 174]. Based on a look-up table, the device current and the collector-emitter voltage can
be used to estimate the junction temperature. Unfortunately, the temperature sensitivity
of the IGBT collector-emitter voltage that is excellent for small and large device currents
rapidly decays to zero for a wide range of medium currents. Due to this effect, that has
been investigated in [91, 157], the forward voltage is widely used in laboratory setups [91,
92] to extract IGBT junction temperatures under defined load conditions [289] but is rarely
used in the field. Furthermore, the sensing method requires an invasive connection to the
power path and is prone to high differential and common mode electro-magnetic interference
(EMI). Alternative temperature estimation methods, which are discussed in the following,
try to avoid this and focus on the temperature sensitive properties in the gate path during
switching transients.
In [177] the temperature sensitivity of the turn-on delay has been identified. In this
context the turn-on delay is defined as the time between the rising edge of the gate voltage
and the time instant, at which the threshold voltage Uth is reached. The later time instant
is found by detection of the rising edge of the collector current ic . This method effectively
uses the temperature dependency of the internal gate resistance, which is caused by the
temperature sensitivity of the electron mobility within the gate. The temperature sensitivity
of the internal gate resistance is also utilized in [26] and [82]. In [26] it is extracted by
measuring the peak of the transient gate current, whereas in [82] it is evaluated after turn-off
of the IGBT by excitation of the gate loop with a small sinusoidal voltage and instantaneous
sensing of the gate current response. A third temperature estimation method, which is
illustrated in [187, 198, 294], detects the length of the gate voltage plateau at device turn-
off. Its working principle is based on the temperature sensitivity of the depletion capacitance
in addition to the internal gate resistance.
A drawback of these methods is that they require the external gate resistance Rg and the
gate supply voltage Us to remain constant. If these parameters change during operation,
for example due to the heat dissipation within the driver circuitry, this can significantly
degrade the temperature estimation as discussed in [154]. Furthermore, for [177] (turn-on
delay) and [294] (length of gate voltage plateau) a sophisticated digital acquisition circuitry
is required to extract temperature information given a temperature sensitivity of 1− 2 ns/K.
In [23] and [291] the junction temperature has been estimated by evaluation of the IGBT
threshold voltage Uth . It shows an excellent temperature sensitivity of 5.9 mV/K. However,
the time triggered measurement of the gate voltage at the rising edge of the current via the
patristic module inductance, which is proposed in [23], requires a complex analog circuitry.
11
Any common and differential mode EMI, which is not taken care of, will result in errors.
To overcome these limitations, it is proposed in [221] to detect the junction tempera-
ture based on the average gate current during turn-on by using an integrator to eliminate
undesired interference. The average gate current shows temperature sensitivity due to the
internal gate resistance, the depletion capacitance and the threshold voltage. Unfortunately,
it also shows sensitivity to changes of the external gate resistance, the gate driver voltage
and the device current. Thus, as discussed in [187] careful decoupling of the operation point
dependent properties is necessary to accurately predict the junction temperature with this
technique. Nevertheless, the averaging technique that is proposed by [221] is a valuable
component that can help to extract TSEP with more robustness towards interference and
timing variations.
2.2.2 Thermal Monitoring

Predictors and observers For the electrothermal monitoring of power electronic modules
predictors and observers that estimate the device losses and distributed 3-D temperatures
within the power module are of great importance. Temperature predictors, which are pro-
posed in [11, 158, 215, 258, 259, 335], estimate the device losses and the temperature at the
junction and at other nodes of interest within the power electronic devices in real time. This
estimation is achieved using a real-time loss- and thermal model. Thermal predictors do not
require any additional temperature sensor and are therefore a rather inexpensive solution.
Unfortunately, they exhibit excessive sensitivity to model inaccuracies for the same reason.
As a consequence, thermal observer structures have been proposed in [93, 141, 213, 323,
325, 327]. They combine temperature measurements from the junction or sensors within
the power module and an electrothermal real-time model to estimate the temperatures of
the power module with nearly zero lag and insensitivity to model inaccuracies.
Real-time models The thermal real-time models, that are nowadays used for monitoring
power electronic modules, are either Cauer or Foster models [213, 324, 327], or matrix based
thermal impedance models [215, 258]. Cauer and Foster models provide a compact model
structure and can be easily be implemented on a digital signal processor (DSP), but they
cannot provide accurate 3-D spatial temperature information throughout the power module.
Matrix based thermal impedance models can provide 3-D spatial temperature information.
For future device monitoring systems this is important, because there is an increasing de-
mand to monitor the thermal stress at specific locations where it causes damage [20, 234].
However, matrix based thermal impedance models require a sophisticated parameter ex-
traction processes and exhibit a large number of transfer functions that are difficult to
implement on a DSP. Ideas to overcome this problem, e.g the application of model reduc-
tion techniques, were discussed in [214], but were neither analyzed nor validated. Also, the
subsequent research, that was published in [93, 94] did not pick up on these ideas.
Observer state feedback with real-time junction temperature All observers intrinsi-
cally require measurement information for state feedback correction of their model-based
estimates. However, only the research approaches in [93, 141, 323, 325, 327] practically
12
implemented observers for junction temperature estimation of power electronics. In [141,

327] temperature sensors placed inside a power module adjacent to the power devices was
used to obtain a measurement. The experimental setup in [323, 325] operated an IGBT that
was permanently turned on at an external current source and used a diode in proximity of
the IGBT as a temperature sensor. Only in [93] the junction temperature was extracted
during converter operation via the temperature sensitive collector emitter voltage of an
IGBT. However, the measurement was very noisy because of the collector emitter voltage
characteristics, the extraction circuitry and the varying temperature coefficient of the IGBT
that it could only be processed with a Kalman filter. As a consequence, in previous work
no approach is documented that used real-time junction temperature information with ap-
propriate accuracy and acceptable noise for state feedback in an observer structure, which
could significantly improve the accuracy and performance of thermal monitoring solutions.
Averaged and instantaneous temperature and loss estimation Thermal monitoring of

instantaneous temperatures and losses at every switching cycle is desired for many applica-
tions, which is realized with a predictor [11] or an observer [93]. However, for the thermal
control of power modules in AC drives [329], typically the average value of the temperatures
and losses over one electrical excitation period are the preferred control variables. Nearly
all investigated methods that estimate averaged temperatures are based on a predictor, e.g.
[260, 329, 335], do not incorporate junction temperature information and therefore suffer
from model inaccuracies. One important reason why previous work did not apply thermal
observers to estimate averaged temperatures of a power module is the problem that aver-
aged junction temperature does not exist physically, cannot be measured and is therefore
not usable for the correction process within the observer. Only the instantaneous junction
can be measured and could be averaged via a low-pass of dynamic length, such that the
harmonics which occur at the excitation period are removed. Unfortunately, the low-pass
filter introduces strong lag, which degrades the bandwidth and thereby the dynamics of any
thermal control loop which makes this option undesirable for thermal management solutions.
State feedback design of thermal observer Another limitation of all identified contribu-
tions that have been made on thermal observers is that there are no guidelines provided that
comprehensively illustrate the tuning of the observer gains and show the resulting design
trade-offs. In [93, 324, 327] a Kalman filter is used and it is argued that the filter tuning
is best achieved via adapting the covariance matrices until the best response is achieved.
For the tuning of the Luenberger Style observer in [327] it is only suggested to place the
poles of the observer via pole placement in the left half plane, such that asymptotic stabil-
ity can be achieved. The same procedure is suggested in [324] with the additional remark
that the observer eigenvalues (EV) should be a magnitude faster than the system eigenval-
ues. These general system theoretical recommendations do not at all include information
on design compromises, e.g. in terms of bandwidth, noise, estimation accuracy (EA) or
disturbance rejection ability, that can be made by selecting proper feedback gains of the
observer structure.
13
Loss prediction and degradation detection In addition to the temperatures estimation,

the closed loop estimation of instantaneous and averaged device losses is another desirable
feature of the observer structure [213], that is not included in the classical Luenberger style
observer structure, e.g. [93, 324, 327]. In the commissioning phase of a power electronic
converter, the loss estimation error, which includes the part of the losses that are not
predicted by the loss model, is a helpful tool to calibrate the device loss model. After
longer term operation of the converter over several years, the observer allows the real-time
detection of bond-wire lift-offs or solder layer delamination, because these are reflected by
a sudden increment of the loss estimation error.
NTC based thermal estimators A typical state-of-the-art monitoring approach for power
electronic modules is the evaluation of the power module negative temperature coefficient
thermistor (NTC) sensor. It reflects the average DCB temperature of the power module and
is often used for over-temperature protection of the power module [34, 146]. If a high base
plate temperature occurs, this can be detected with the NTC and the maximum current
of the converter is either reduced or the converter is deactivated such that the maximum
junction temperature is never exceeded [34, 146].
However, NTC sensor information can also be combined with real-time models to obtain
accurate more detailed power module temperature estimates. As an example, in [146, 269]
and [350] a simple approach is shown that combines an electrothermal real-time model and
NTC information for junction temperature prediction. In this approach, the relative tem-
perature difference between the device and the NTC is computed with a thermal impedance
model and the device losses of the power module and added to the NTC temperature mea-
surement. This improves the accuracy of the junction temperature prediction, in particular
at steady-state, because it implicitly takes into account temporal variations of the coolant
temperature. However, the approach requires the thermal model to be modified such that it
estimates the relative temperature between the devices and the NTC properly. The deriva-
tion of such a model for a multi-device power module is typically associated with large
modeling errors under normal operation conditions. This is even more true, if the thermal
conduction paths within the power module are degraded, e.g. in case of base plate solder
delamination. In that case, the approach can result in large prediction errors and there
is no direct indicator for detecting malfunctions of the power module. Furthermore, the
NTC sensor signal is often superimposed with spikes and high bandwidth noise that result
from the induced converter switching transients. This is injected into the measurement with
the state-of-the-art approach or must be filtered with low pass filters that degrade the fast
detection of NTC temperature rises. As a result, there is a need for a more advantageous ap-
proach to use NTC temperature information for the real-time monitoring of power modules,
in particular junction temperature.
2.3 Condition Monitoring and State of Health Estimation

Condition monitoring and state of health estimation techniques for power electronic mod-
ules have become an important research topic over the last decade [18, 63, 113, 155, 194,
227, 232, 321, 344]. They enable the detection and evaluation of the important degrada-
14
tion mechanisms within the power module based on degradation indicators that are either
directly measured via module integrated sensors or reconstructed by processing sensor in-
formation. Based on the degradation evaluation a lifetime prognosis can be conducted that
enables to schedule predictive maintenance or to reduce the operational stress of the power
converter appropriately enabling safe and reliable converter operation.
2.3.1 Failure Indicators

There is a large range of failure indicators that are discussed in literature, e.g. in [18,
194, 227, 232, 344]. The most in-depth investigated degradation indicators are the device
forward voltage [113], the thermal resistance [255] of the thermal impedance of the power
device [133, 288], which are reviewed in the following.
Forward voltage For the detection of power module degradation due to a reconstruction
of the Aluminum metallization [114, 236, 252] and bond wire lift-offs [63, 113, 154, 293, 341],
the device forward voltage is a widely used failure indicator. There exist various circuits
[112] that precisely extract this voltage during the conduction interval and protect the signal
processing unit from the blocking voltage, e.g. based on clamping and compensation diodes
[35, 113, 114], depletion mode MOSFETs [63, 248], Zener diode based protection [154] and
emitter-followers [171, 174]. The resulting information can be evaluated in a diagnosis unit,
such that if the forward voltage has reached a certain threshold, a maintenance request
is triggered. Its rise indicates that either some bond wires are disconnected or that the
metallization sheet resistance increased to metallization reconstruction. Typically, a step-
wise increment of the forward voltage can be interpreted as a bond wire lift-off [113]. In
contrast, the degradation of the aluminum metallization occurs smoothly over time. Note
that in [176, 341] a reduction of the forward voltage is reported that occurs due to the
degradation of the solder layer and the resulting change of the temperature dependent
conduction characteristic. This underlines, that the primary aging mechanism must be
carefully decoupled to avoid a wrong state of health diagnosis.
Thermal impedance For the detection of solder delaminations at the interfaces of the DCB
to the device and to the base plate, the thermal impedance Zth or the thermal resistance Rth
are either extracted directly [133, 162, 344] or indirectly by detecting a change of measured
operational variables, e.g. current or temperature [83, 339]. The indirect detection of
solder delamination is only based on observations that can potentially be related to the
degradation of the thermal impedance of a power module. The advantage of these indirect
technologies is that they can be easily applied in real-time during the operation of the power
module. Unfortunately, a misinterpretation of these effects can barely be avoided such that
the techniques might mistakenly report relevant degradation.
The thermal characterization of IGBTs under laboratory conditions, e.g. by extraction of
the thermal impedance, are well documented in literature. Typically, a thermal impedance
test bench is used for that purpose [123, 133, 135, 288, 289, 292]. However, the in-situ
estimation of the thermal impedance Zth or the thermal resistance Rth remain a challenge, in
particular if the converter operation must never be interrupted, e.g. in solid state transforms,
15
wind energy conversion system or manufacturing lines. For the in-situ extraction of the static
thermal resistance Rth typically the losses during an induced load transient are estimated
and the resulting temperature change is measured. The thermal resistance is extracted by
division of both variables [255, 338, 344]. A limitation of this approach is that it requires
the precise estimation of the devices losses. One way to overcome this limitation is the
measurement of two temperature gradients via three sensors. It is discussed in [142] how
this information can be used to extract the thermal resistance.
A completely different, slightly unconventional approach is proposed in [176] and can
be supported by the data that is discussed in [341]. It uses the forward voltage at low
load device current for thermal resistance detection and does not require any temperature
measurement. The approach uses the following mechanism: If the thermal resistance Rth
increases, this results in higher IGBT temperatures at constant loading. As a consequence,
if the device currents are small a reduced forward voltage is observed due to the elevated
junction temperature, given the negative temperature coefficient of the IGBT conduction
characteristics. The forward voltage difference ∆Uth between the measurement and an
electrothermal real-time model can be used according to [176] to increase the thermal re-
sistance Rth = Rth,0 + ∆Rth within that real-time model via an integral feedback loop until
the forward voltage difference ∆Uth is compensated. Thereby, the thermal resistance Rth is
indirectly identified.
A strong limitation of the presented approaches is the absence of a reliable method for the
in-situ estimation of the thermal impedance Zth during normal operation of a power con-
verter. In comparison to the thermal resistance, the thermal impedance exhibits frequency
domain information that can be effectively used to distinguish between different deteriora-
tion mechanisms of the thermal interface of the power devices [94, 134, 288]. For example,
the thermal impedance indicates if the die-attach solder-layer, the base plate solder-layer
or the convection process are degraded. In the field of battery diagnosis, methods for ther-
mal impedance spectroscopy [105] have been developed based on the well-known electrical
impedance spectroscopy [127]. However, these concepts have not been evaluated for the
thermal impedance extraction of power modules. A primary reason for this is the strong
variation of the power module temperature, which makes the real-time extraction of a spe-
cific excitation signal difficult.
2.3.2 State-of-Health Diagnosis

With the extracted failure indicators, the state of health can be diagnosed such that at some
point a replacement or maintenance request can be triggered or the thermal loading can be
reduced. This is important to ensure a safe and reliable operation of the power module
over the entire lifetime. For this diagnosis certain thresholds are defined for each failure
indicator [18], e.g. the forward voltage or the thermal resistance, that correspond to the
end-of-life criterion. Typical thresholds for the forward voltage are 5 % to 10 % according to
[131, 137, 143, 266, 268, 299]. For definition of a power module failure due to solder voids
or delamination in [142, 262, 271, 299] a thermal resistance of 20 % is used whereas in [268]
a 10 % and in [143, 180] a 50 % increment is preferred. With more detailed information
from thermomechanical characterizations of degraded power modules, e.g. as presented in
[162], the increment of the thermal resistance can be related to the size of the void, which
16
is created by the delamination. Note that the diagnosis thresholds must be individually
selected for each application and that their applicability must be carefully validated with
experiments for each technology.
2.3.3 Lifetime Prognosis

Besides the diagnosis of the state health, another important aspect is the state of health
prognosis. It aims to predict when the end-of-lifetime of a converter system is reached and
how much remaining operation time under at rated stress capability or at reduced stress
capability there is left.
Thermal stress profile based prognosis The lifetime prognosis with least implementation
effort is based on simulations of the power module over mission profiles that are used to
evaluate the thermal stress that occurs during the operation. This information is processed
based on descriptive aging laws to derive a lifetime prognosis [69, 143, 263, 299]. Unfortu-
nately, this method is very sensitive to any deviation of the electrothermal converter model,
to minor changes of the load data as well as to inaccuracies of the descriptive aging model.
As a consequence, the results are rather inaccurate and should preferably be used for com-
parative studies. There exist research efforts to improve this method by online-extraction
of the thermal load during operation of the converter [84, 216]. Thereby, the sensitivity
to deviations of the electrothermal converter model and to minor changes of the load data
can be eliminated. However, the method still relies on the accuracy of the descriptive aging
model.
Failure criterion based lifetime prognosis More advanced approaches aim to make a
lifetime prognosis based on the introduced failure indicators. These can provide actual
feedback from the degradation process and are therefore a much more robust solution [18].
For example, [128, 251, 281] investigate how the forward voltage information of power devices
can be processed for the online-estimation of the device degradation and a lifetime prognosis
with improved accuracy. A method for separated detection of failure mechanisms whose
effects on failure indicators are cross coupled is proposed in [326]. This is an interesting
research path, because a decoupled quantified estimation of different failure mechanisms at
minimal sensing effort is the ultimate goal for future condition monitoring systems. Another
important research path is opened by the remarkable experiments and modeling efforts that
are presented in [178, 179]. Both papers investigate in-depth how the thermal resistance
increases over the lifetime of a power module for different thermal loading. A key finding of
their work is that until a certain degradation status, which is potentially correlated with the
time of crack initiation, only large thermal cycles contribute to solder degradation. If this
defined degradation status is reached, which can potentially be detected with the extracted
thermal resistance, the durability of the solder interfaces changes such that also minor
thermal cycles have a relevant impact on the degradation. This underlines that monitoring
the thermal integrity of the power module can significantly help to continuously identify
the state of health along the nonlinear degradation process and to adapt the thermal stress
when it becomes necessary.
17
2.4 Active Thermal Control Techniques
According to a recently published industry survey [103] the thermally induced strain within
power electronic modules is identified as the dominant stressor that limits the lifetime of
power converters. Thermally induced strain [20, 204, 234] occurs primarily due to load
fluctuations of power converters. Descriptive models of the fatigue phenomenons were de-
rived in power cycling experiments, e.g. in [69, 131, 179] and [64]. They reflect that the
cycles to failures of power electronic modules Nf increase with larger junction temperature
cycles ∆Tj . As a consequence, active thermal control techniques that reduce thermal cycles
became attractive research topics [9, 10, 27, 213, 321] in recent years. They allow safe and
reliable operation of converters at thermal limits and enhance the power module lifetime
[10, 12, 27, 321, 330].
2.4.1 Reference Generation
Control concepts for active thermal cycles reduction, which were proposed in literature,
range from linear state feedback control [29, 212, 213, 239, 335], hysteresis control [100,
158, 184, 329, 331], model predictive control (MPC) [101, 102, 283, 284] to region based
control algorithms [213, 237, 239]. They all aim to control the junction temperature such
that thermal cycles are effectively reduced. Nevertheless, a key question that needs to be
raised for all active thermal control concepts is the derivation of feasible, stress relieving
references for the junction temperature.
In most research contributions, e.g. [9, 158, 213, 237, 239, 330], the measured junction
temperature is fed to a low-pass filter to obtain a temperature reference with reduced thermal
cycles. Similarly, in [184, 243, 335, 336] a temperature reference is constructed based on
the junction temperature measurement by limiting the slope of the reference if the junction
temperature decays. In case of open loop active thermal cycle reduction concepts, the
trajectory is intrinsically generated within the control action. This is typically achieved by
adjusting the control variable, e.g. the gate resistance [199], the reactive power [203], the
operation strategy [186], the modulation scheme [169] or the switching frequency [331] as a
function of the load to compensate thermal cycles. However, most concepts do not take into
account the limits of the loss manipulation process. This can deteriorate the active thermal
cycle reduction. Furthermore, in case of closed-loop control algorithms, it either requires
operation in the linear loss manipulation range or anti-wind up schemes to avoid instability.
This problem is addressed in [101, 102] with a model predictive control (MPC) approach that
takes into account loss manipulation limits by including them in a cost function. However,
a limitation of the MPC is its high computation effort, which is avoided especially in price
driven applications. Furthermore, the derivation of an appropriate cost function remains a
difficult task.
As a consequence, there is a demand for innovative concepts that create stress relieving
and feasible trajectories within active thermal control structures of power modules.
18
2.4 Active Thermal Control Techniques
2.4.2 Active Thermal Control of AC Applications
For the realization of closed loop active thermal control, the accurate and parameter insen-
sitive estimation of the control variable with zero lag is of great importance. Typically, the
junction temperature itself is used as a control variable, e. g. in [213, 237, 243, 324]. Its
estimation process is addressed in [11, 93, 94, 213, 215, 325, 327], which propose various
promising temperature estimators. However, for the active control of power modules in
AC applications, the averaged junction temperature over one electrical excitation period is
preferably used a control variable [260, 335]. This is because it does not reflect the thermal
cycles caused by the alternating nature of the current that can barely be manipulated in
IGBT based converters. Instead, the averaged temperature only extracts load dependent
thermal information. In prior work, thermal predictors were used to estimate averaged junc-
tion temperature based on an electrothermal model, e.g. [260, 329, 335]. Unfortunately,
this model-based prediction is strongly sensitive to model inaccuracies. Thus, there is a
demand for active thermal control with averaged junction temperature estimators that are
less sensitive to model inaccuracies.
2.4.3 Device Loss Modulation Techniques
A final aspect, that is discussed in this work, is the minimal invasive thermal manipulation of
a multi-device power module. The most popular manipulated inputs for thermal control are
the converter switching frequency [9, 158, 184, 213, 237, 330, 331], load current manipulation
via reactive power injection or flux-linkage level manipulation [184, 203, 335], adjustment
of the pulse width modulation (PWM) scheme [125, 169, 328, 336] and manipulation of the
convection process [156, 185, 324, 345]. The summarized loss manipulation techniques [9,
125, 169, 184, 203, 213, 237, 328, 330, 331, 336] have an impact on the converter operation,
such that they can only be used with certain restrictions. In comparison, the convection
manipulation strategies [156, 185, 324, 345] do not impact the converter operation, but
can only barely achieve the bandwidth of loss manipulation techniques. All summarized
technologies only enable the thermal manipulation of the entire converter module but do
not allow the thermal manipulation of individual devices. For this reason, gate drive based
loss manipulation techniques are a promising alternative that have been explored recently
[10, 321]. In [199, 283, 284] it has been shown that thermal cycles can be reduced by
switching from low to high gate resistance if the load decreases. Various step wise gate
drivers have been proposed [97, 120, 195, 242, 243] that allow the smooth manipulation
of switching losses which can be utilized for active thermal control. In [322] a turn-off
trajectory adjustment circuit and in [285] a controlled shot through have been investigated
with respect to their potential for active thermal cycle reduction. However, gate driver
based loss manipulation techniques have not yet been used for model-based closed-loop
active thermal cycles reduction. The utilization of these techniques for this purpose can
make future active thermal cycle reduction algorithms much more effective.
19
2.5 Summary of Identified Research Opportunities

The state-of-the-art review led to the identification of the following research opportunities
that are addressed by this thesis:
Derivation of compact 3-D spatial electrothermal models for fast simulations and real-
time applications The state-of-the-art indicated that there is a demand for time efficient
detailed thermal simulation of power modules. Previous work identified the combination of
large scale 3-D thermal models obtained by FDM or FVM techniques and model reduction
techniques as a possible solution. However, this has not yet been applied to an existing multi-
device power module. In this context, it is important to investigate the compromise between
model accuracy and compactness of the developed models. Furthermore, there exists the
opportunity for deriving ultra-compact models for estimating 3-D distributed temperatures
of power modules in real time. This would enable the development of 3-D electrothermal
real-time monitoring systems that provide detailed information of the thermal stress that
occurs in power modules during regular operation.
Identification and sensitivity analysis of IGBT temperature-sensitive electrical param-

eters (TSEPs) that allow minimal invasive junction temperature sensing over a wide
operation range In recent work, various TSEPs have been identified and their junction
temperature sensitivity has been demonstrated at exemplarily operation points. However,
the vast majority of TSEPs were neither experimentally evaluated over a wide operating
range, nor were they systematically analyzed for temperature sensitivity and insensitivity
to interference. Thus, there is the opportunity to explore TSEPs with a strong focus on
their accurate and minimal invasive extraction in the presence of noise and interference.
It is important to develop and calibrate physics-based models that identify the key TSEP
mechanisms. Based on these models, the temperature sensitivity and insensitivity to mea-
surement errors and model deviations of the TSEPs must be evaluated over a wide operation
range to evaluate their potential for future converters.
Monitoring of switching- and excitation-period averaged 3-D temperature distributions

and device losses based on junction and NTC temperature insensitive to model errors
Only very few prior research addressed the advantages of observer technology for thermal
monitoring of power modules. Consequently, there is the opportunity to combine real-
time NTC and junction temperature information with 3-D electrothermal models in an
observer structure. This can estimate device losses and 3-D distributed temperatures in
power modules with optimized accuracy over a wide bandwidth. To operate the observer
with the best possible performance there is the need for a state feedback design methodology
for the strategic design of thermal observers. A final opportunity lies in the improvement of
the loss estimation within thermal observers that needs time consuming calibrations. This
can potentially be avoided using adaptive control techniques to estimate the loss model
coefficients in real time.
20
2.5 Summary of Identified Research Opportunities
Identification and quantification of localized degradation mechanism via in-situ mon-

itoring the thermal interface of power modules Recent research impressively demon-
strated that the thermal interface of power modules reflects degradation, e.g. delamination
of the power devices or the substrate and deterioration of the convection process. Neverthe-
less, there is neither a method to reliably assess these quantities during operation of a power
converter nor a systematic approach to quantify individual degradation modes. Thus, there
is the opportunity to explore methods for the in-situ thermal system identification that
can either use the operational load for diagnosis or manipulate the loss behavior of the
power devices in a self-sensing mode. Furthermore, the degradation detection, separation
and quantification via thermal interface data can potentially be improved by the utilization
of neural networks that have been widely applied for the categorization of data in other
domains.
Application of feasible and stress relieving thermal trajectories to power modules by

controlling averaged junction temperature via gate resistance manipulation Despite
the wide range of approaches for the active thermal cycle reduction of power modules that
were presented in recent years, yet no consistent methodology was developed that addresses
the key limitations of this technology: There is no approach that addresses the thermal
manipulation of individual devices in a multi-device power module. The presented junction
temperature control techniques for AC applications, which are based on estimated averaged
junction temperature, were all operated open-loop and consequently suffer from model in-
accuracies and disturbances. The limitation of the manipulated input in the derivation of
feasible junction temperature trajectories was either not considered at all or achieved with
high computation effort. Thus, there is the opportunity to develop technologies that can
overcome these limitations. The model-based manipulation of gate resistances in real-time
could ideally address loss manipulation of individual devices in a large scale power module.
Observer technology can potentially enable the estimation of averaged junction temperature
without lag and reduced sensitivity to modeling errors and disturbances. The derivation of
optimal junction temperature trajectories could be enabled by trajectory filters that emulate
a desired thermal behavior and take into account the limits of the manipulated input.
These research opportunities were individually addressed in the following publications

[118, 304, 305, 308–315] that were developed as a part of this thesis. This work combines
the technologies developed to address these research objectives into a methodology that
shall promote safer and more reliable operation of future converter systems.
21
22
3 Methods for Electrothermal and Degradation
Modeling
The key factor that drives the degradation of power electronic modules is thermally induced
strain [8, 33, 70, 131, 218]. For this reason, it is of great interest to evaluate the ther-
mal stress within an insulated-gate bipolar transistor (IGBT) power module during realistic
load cycles based on accurate spatial electrothermal models. Consequently, this section dis-
cusses effective concepts that enable a fast computation of device losses, 3-dimensional (3-D)
temperature distributions and the resulting degradation within power electronic modules.
The developed modeling techniques can be used for fast and time-efficient electrothermal
simulations. Furthermore, they can be applied in real-time applications, e.g. for thermal
estimators and observers, which will be examined in detail in a following chapter on moni-
toring technologies.
This chapter begins with a discussion of the loss modeling for power electronic modules.
Then, methods for 3-D thermal modeling of the power modules are presented that take
into account conduction, convection and transportation mechanisms. The loss model and
the thermal model are linked with each other to realize an effective spatial electrothermal
model. To increase the simulation speed and allow the models to be integrated as real-time
models in observer structures, model reduction techniques are an effective tool. For this
reason, the fundamentals of the balanced truncation method and the singular perturbation
approximation method, two effective model reduction techniques, are introduced and their
potential and limitations are appropriately discussed. Finally, a framework for the lifetime
estimation and degradation modeling is developed that allows determining the impact of
thermal stress on the power module degradation.
3.1 Loss Modeling

This section presents a generic empirical loss model for the semiconductor devices of a three-
phase IGBT based power converter. It calculates the instantaneous device losses for every
switching period as well as the averaged device losses over one electrical excitation period.
The loss model can easily be calibrated based on data-sheet information and measurements,
such that it can predict the conduction and switching losses of the IGBTs and the diodes.
3.1.1 Conduction Loss Modeling

This section addresses the modeling of power semiconductor conduction losses. First, a
model for the instantaneous conduction losses of the IGBT and the diode is discussed. In a
subsequent step, an averaged loss model is developed on the basis of the instantaneous loss
model, which determines the averaged losses over an electrical excitation period.
23
3 Methods for Electrothermal and Degradation Modeling
Collector-emitter voltage uce in V
IGBT Diode
Forward voltage uT in V
1.5 1.5
1 1
IGBT at 25°C Datasheet Diode at 25°C Datasheet

0.5 IGBT at 25°C Least square fit 0.5 Diode at 25°C Least square fit
IGBT at 125°C Datasheet Diode at 125°C Datasheet
IGBT at 125°C Least square fit Diode at 125°C Least square fit
0 0
0 100 200 300 400 500 600 700 0 100 200 300 400 500 600 700
Current in A Current in A
Figure 3.1: Conduction loss model extracted from data sheet parameters [107] of the Hy-
bridpack2 power module
3.1.1.1 Instantaneous Loss Modeling
The instantaneous conduction losses of an IGBT pIGBT Diode

cond and a diode pcond are a function
of the collector-emitter current of the IGBT ice , the device current of the diode iT , the
collector-emitter voltage of the IGBT uce and the forward voltage of the diode uT according
to equation (3.1) and (3.2).
pIGBT
cond = ice · uce (ice ,Tj
IGBT
) (3.1)
pDiode
cond = iT · uT (iT ,TjDiode ) (3.2)
The collector-emitter voltage of the IGBT uce and the forward voltage of the diode uT depend
on the device junction temperature Tj and the device currents ice and iT . In application
manuals [319, 333] and literature [42, 104] typically temperature-dependent offset voltages
Uce,0 and UT and ohmic resistances Rce and RT are used to estimate the device voltage
during conduction. However, the device characterization in data sheets, as illustrated in
Figure 3.1, show a strong square-root shape characteristic. For this reason, an alternative
loss model is proposed in this thesis, making use of an additional square-root term that is
scaled with a factor of Sce or ST for the IGBT and the diode, respectively. The resulting
forward voltage equation of the IGBT and the diode are given by equations (3.3) and (3.4).
√
uce (ice ,TjIGBT ) = Uce,0 (TjIGBT ) + Rce (TjIGBT ) · ice + Sce (TjIGBT ) · ice (3.3)
Diode Diode Diode Diode
√
uT (iT ,Tj ) = UT (Tj ) + RT (Tj ) · ice + ST (Tj ) · ice (3.4)
It is important to model the temperature dependency of the conduction loss model coef-
ficients in (3.3) and (3.4). In most data-sheets, e.g. as illustrated in Figure 3.1, the forward
voltage characteristics of the devices are depicted for temperatures of 25 ◦C and 125 ◦C.
Consequently, the conduction loss model coefficients Uce,0 , UT , Rce , RT , Sce and ST can be
extracted for both temperatures. Within this work, a linear interpolation according to (3.5)
is applied to all coefficients of the conduction loss model to approximate their temperature
dependency. Thereby, the device voltage and thus the conduction losses of the IGBT and
diode can be estimated for every operation point of the devices.
◦ ◦ ◦
X(Tj ) = X 25 C + X 125 C − X 25 C · (Tj − 25 ◦C) (3.5)
24
3.1 Loss Modeling
IGBTA DiodeA
+
s s
ir r
Udc Cdc is s
it t
- + - +
- IGBTB DiodeB
Figure 3.2: Topology of a three-phase converter and surface image of the Hybridpack2
power module from Infineon indicating the device locations and the commu-
tation paths
In a next step, the conduction loss model is used to determine the losses of a half bridge,
which is operated with a phase current ix at the phase x and the duty cycle dx . The
topology of a three-phase converter is depicted in Figure 3.2 next to surface images that
indicate the device location and the commutation path. Based on Figure 3.2 it is discussed
in the following in which devices losses occur as a function of the converter operation. In
case of a positive current ix > 0, the upper IGBT (IGBTA) and the lower diode (DiodeB)
are conducting the current. Each switching period Tsw the current flows through the upper
IGBT for a time interval of dx · Tsw . During the remaining time of the switching period
(1 − dx ) · Tsw the current flows through the lower diode. The conduction losses in the two
other devices remain zero for positive currents ix . When the current direction is reversed
ix < 0, losses occur in the upper diode (DiodeA) and the lower IGBT (IGBTB) whereas the
other two devices do not exhibit any conduction losses. As a consequence, the conduction
losses of a half bridge can be calculated according to equation (3.6) to (3.9).
(
pIGBT x
cond (i ,Tj
IGBTA
) · dx for ix ≥ 0
pIGBTA
cond = (3.6)
0 for ix < 0
(
pDiode x
cond (i ,Tj
DiodeA
) · dx for ix ≤ 0
pDiodeA
cond = (3.7)
0 for ix > 0
(
pIGBT x
cond (i ,Tj
IGBTA
) · (1 − dx ) for ix ≤ 0
pIGBTB
cond = (3.8)
0 for ix > 0
(
pDiode x
cond (i ,Tj
DiodeB
) · (1 − dx ) for ix ≥ 0
pDiodeB
cond = (3.9)
0 for ix < 0
3.1.1.2 Averaged Loss Modeling

Based on the introduced instantaneous conduction loss model, an averaged loss model of a
single half bridge is developed. It extracts the averaged loss over one electrical excitation
25
period. As discussed in [57, 208], the averaged conduction loss model is obtained by inte-
grating over one excitation period T0 of the load current according to (A.3), assuming an
ideal sinusoidal current.
ˆ T0 ˆ T0
avg,IGBT 1 IGBT 1
Ploss,cond = p (ice ,Tj )dt = ice · uce (ice ,Tj )dt (3.10)
T0 t=0 cond T0 t=0
In case of a simple sine-triangle pulse-width modulation that modulates a sinusoidal voltage
with the modulation index M = Ûx /(udc /2) and the phase angle φ0 , the following IGBT
and diode loss models are derived:

avg,IGBT 1 M · cos(φ0 ) 2 1 M · cos(φ0 )
Ploss,cond = Uce,0 · Î x · + + Rce · Î x · +
2π 8 8 3π
3
+ Sce · Î x2 · (0.139 + 0.1144 · M · cos(φ0 ))
(3.11)

avg,Diode 1 M · cos(φ0 ) 2 1 M · cos(φ0 )
Ploss,cond = UT · Î x · − + RT · Î x · −
2π 8 8 3π (3.12)
3
2
+ ST · Î x · (0.139 − 0.1144 · M · cos(φ0 ))
For both devices, (3.11) and (3.12) determine the averaged losses as a function of the peak
phase current Î x , the modulation index M and the phase angle φ0 . Note that the same loss
equation holds for both IGBTs and both diodes of one half bridge as the average loss model
assumes ideal symmetric operation of the half bridge. A precise derivation of the model
equations can be found in appendix A.1.
3.1.2 Switching Loss Modeling

After the derivation of a compact conduction loss model in the previous section, an analytic
model of the switching losses model is proposed in the following.
3.1.2.1 Instantaneous Loss Modeling

IGBT switching energy loss model Switching loss models for IGBTs in literature, e.g.
[43, 57], assume that the switching loss energies are growing nearly linear with the current.
However, double pulse experiments have shown that this linear relationship does not hold
for small currents. For this reason, an empirical switching loss model has been developed in
this work that exhibits a linear current dependency with an offset term. The dependency
of the IGBT switching losses on the gate resistance and the dc-link voltage are modeled
with exponential terms and the temperature dependency is included by an additional linear
term, as this allows a good matching of model and investigated data. The resulting model
is given by (3.13).
α β
IGBT udc Rg
+ TjIGBT − Tjref · KT

Esw = E0 + K0 · ice · · (3.13)
uref
dc
ref
Rg
26
3.1 Loss Modeling
For the utilization of the model, the coefficients E0 , K0 , α, β and KT are typically obtained
from double pulse data via fitting, e.g. with the method of least squares. Note that this
switching loss model is formulated for a reference operation point that is given by the
operation point dc-link voltage uref ref
dc , the operation point resistance Rg and the operation
point temperature Tjref .
Diode switching energy loss model Similarly, a switching loss model for the diode turn-
on losses was derived according to (3.14).
α −β !
Diode u dc R g
= E0rec (udc ) + K0rec · ice · IGBT ref rec

Esw · · 1 + Tj − Tj · K T
uref
dc Rgref
(3.14)
Note that there are some typical differences between the switching loss models of most diodes
and IGBTs, e.g. for power modules with IGBTs and diodes of generation 3 [107]. Typically,
the switching energies of the diode are significantly smaller than the switching energies of
the IGBT. Different from most IGBTs, the diode losses decay with increasing gate resistance
Rg , resulting in a polarity change of the exponent β. The offset energy loss E0rec typically is a
voltage dependent property according to (3.15) to correctly reflect experimentally obtained
loss data at low currents. Furthermore, as the temperature behavior of the diode slightly
differs, it is modeled with an additional multiplier in (3.14).
udc
E0rec (udc ) = E0rec uref
dc · ref (3.15)
udc
Switching loss calculation The introduced model allows estimating the switching loss
IGBT Diode
energies of IGBTs and diodes. The total switching losses of the devices Psw,loss and Psw,loss
IGBT Diode
depend on these switching loss energies Esw and Esw and the switching frequency of
the converter fsw according to equation (3.16).
IGBT IGBT Diode Diode
Psw,loss = Esw · fsw Psw,loss = Esw · fsw (3.16)
This results in the instantaneous switching loss model for a half bridge at a current ix .
(
IGBT x
IGBTA Esw (i ,TjIGBTA ,udc ,Rg,A ) · fsw for ix ≥ 0
psw = (3.17)
0 for ix < 0
(
Diode x
DiodeA Esw (i ,TjDiodeA ,udc ,Rg,B ) · fsw for ix ≤ 0
psw = (3.18)
0 for ix > 0
(
IGBT x
IGBTB Esw (i ,TjIGBTB ,udc ,Rg,B ) · fsw for ix ≤ 0
psw = (3.19)
0 for ix > 0
(
Diode x
DiodeB Esw (i ,TjDiodeB ,udc ,Rg,A ) · fsw for ix ≥ 0
psw = . (3.20)
0 for ix < 0
27
In these equations, udc is the dc-link voltage of the half bridge, Rg,A and Rg,B are the gate
resistances of the upper and lower IGBT of the half bridge and TjIGBTA ,TjDiodeA ,TjIGBTB and
TjDiodeB are the junction temperatures of the four devices.
3.1.2.2 Averaged Switching Loss Model

The presented switching loss model allows estimating the switching losses of the devices
every switching period. However, for many applications the averaged switching losses over
one excitation period of the current T0 = f10 are of interest. For that purpose, it is shown
in the following how the loss model can be used to predict the averaged losses over one fun-
damental period of a sinusoidal load current, assuming sine-triangle pulse-width-modulated
(PWM) modulation. The switching losses of the diode and the IGBT which have been
derived in (3.17) to (3.20) must be integrated over one period of the load current. This is
can be done for the upper IGBT (IGBTA) according to (3.21).
ˆ t0 +T0
avg,IGBT
Ploss,sw = pIGBTA
sw (ix ,TjIGBTA ,udc ,Rg,A ) dt with ix (t) = Î x · sin (ω 0 · t)
t0
(3.21)
This results in the averaged losses model according to (3.22) which can be used for both
IGBTs (IGBTA and IGBTB) by using the appropriate gate resistance Rg and junction
temperature TjIGBT .
α β !
avg,IGBT E 0 K0 udc Rg K T
+ TjIGBT − Tjref ·

Ploss,sw = + · Î x · · · fsw (3.22)
2 π uref
dc
ref
Rg 2
Similarly, an averaged loss model for the diodes can be developed via (3.23) leading to
(3.24).
ˆ t0 +T0
avg,Diode
Ploss,sw = pDiodeA
sw (ix ,Tjer ,udc ,Rg,A ) dt with ix (t) = Î x · sin (ω 0 · t) (3.23)
t0
α −β !
E0rec (udc ) K0 rec

udc Rg
· 1 + TjIGBT − Tjref · KTrec · fsw

= + Î x ·
2 π uref
dc
ref
Rg
(3.24)
3.1.3 Discussion
The introduced loss models are suitable for the averaged and instantaneous loss calculation of
IGBT-based three-phase converter systems. Their empirical and simple structure allows fast
calculation and easy parameterization. However, their accuracy is limited to applications
with moderate current ripple, as the current ripple is entirely neglected in the modeling
approach. If the current ripple exceeds 20 % to 30 % of the rated current, the model must
be refined according to [337] to ensure a good accuracy. This means that the loss model
accuracy is typically degraded when the converter is operated at very low or zero load
28
3.2 Thermal Modeling
current. Fortunately, the losses in this operation range are small as well, such that the
inaccuracy in this operation range is not a problem for system simulations and real-time
loss estimation.

In the following, various techniques for 3-D thermal modeling of power modules are dis-
cussed. First, the fundamental mechanisms of heat transfer in solids are reviewed using
analytical equations [138]. By discretization of the derived heat transfer equations a numer-
ical modeling framework based on the finite volume method (FVM) modeling framework is
derived. The proposed approach is ideally suited for the development of 3-D thermal models
of typical power module geometries.
3.2.1 Fundamental Mechanisms of Heat Transfer

For this review of heat transfer mechanisms in solids, the thermal behavior a generic solid
body, as depicted in Figure 3.3, is considered. The dimensions of the body are selected to
be small enough such that its heat transfer behavior can be assumed homogeneous with
constant density ρ, heat capacitance cρ and thermal conductivity kth . Also the temperature
gradients within the body are assumed to be negligible in comparison to the temperature
gradients between the body and its environment. The environment of the body can exhibit
an arbitrary inhomogeneous temperature distribution.
Most important for modeling the heat transfer between this body and its environment
is the formulation of an energy balance between the solid body and its environment. The
thermal energy Uheat of the solid body with the volume V , the density ρ and the specific
heat capacitance cρ is given by (3.25) as a function of its temperature T .
Uheat = T · cρ · ρ · V (3.25)
It can only change due to a heat flux Qheat directed inside or outside the body or due to heat
generation Gheat inside the volume, which is expressed by the continuity equation (3.26).
∂Uheat
= Qheat + Gheat (3.26)
∂t
The net heat flux, which enters the body, can be determined by the surface integral of the
flux density qheat according to (3.27). Thereby, the heat fluxes through all parts of the body
surface A are accumulated. The heat generation inside the body can be determined by a
volume integral over the heat generation density gheat according to equation (3.28).
‹
Qheat = ~
~q heat dA (3.27)
˚A
Gheat = gheat dV (3.28)
V
29
r, Cr, kth constant
dA
qheat
dV
Figure 3.3: Heat flux through a solid object
The rate of change of the thermal energy Uheat of the body can only result in a rate of
change of the temperature T , as the other parameters in (3.25) are assumed to be constant.
Inserting (3.27), (3.28) and (3.25) in (3.26) leads to the energy conservation equation (3.29).
‹ ˚
∂T ~
cρ · ρ · V · = ~q heat dA + gheat dV. (3.29)
∂t
A V
In this expression, the heat flux density ~q heat can be further specified in terms of the
temperature T by making use of the Fourier equation (3.30).
~q heat = −kth · grad (T ) (3.30)
The Fourier equation states that any temperature gradient results in a heat flux in the
opposite direction of the gradient. This heat flux is proportional to the temperature gradient
with the factor of kth , which is the thermal conductivity of the material. By combining the
energy conservation equation (3.29) and the Fourier equation (3.30), the heat equation in
its integral form (3.31) is derived.
‹ ˚
∂T ~
cρ · ρ · V · − kth · grad (T ) dA = gheat dV. (3.31)
∂t
A V
In a final step, this equation can be transformed to an equivalent partial differential

equation (PDE). Therefore, the entire expression is first divided by the volume V of the
solid body.
‚ ˝
~
kth · grad (T ) dA gheat dV
∂T A V
cρ · ρ · − = (3.32)
∂t V V
By decreasing the volume V until it is infinitesimally small V → 0, the surface of the body
A simultaneously approaches zero, so that both integral terms can be eliminated. With the
definition of the divergence operator according to (3.33), the surface integral can be replaced
30
by the divergence of its integrand.

‚
~
xdA
A
lim = div (x) (3.33)
V →0 |V |
The volume integral approaches its argument. Thereby, the heat equation in its differential
form (3.34) is derived. It describes the temperature T of the solid body as a function of the
given material.
∂T
cρ · ρ · − kth · div (grad (T )) = gheat (3.34)
∂t
To simplify the heat equation and its solution, the material constants are often summarized
in literature to the thermal diffusivity α as defined in (3.35).
kth
α= (3.35)
cρ · ρ
Finally, the sequentially applied gradient and divergence operator are often represented by
the Laplace operator ∇2 , which can be expressed in Cartesian coordinates according to
(3.36).
∂ 2T ∂ 2T ∂ 2T
div (grad (T )) = ∇2 T = + + (3.36)
∂x2 ∂y 2 ∂z 2
This results in a parabolic PDE, as given in (3.37), that generally describes the heat con-
duction processes in solids.
∂T gheat
− α · ∇2 T = (3.37)
∂t cρ · ρ
It is important to understand that this equation, typically referred to as heat equation, is

applicable for any arbitrary solid state heat transfer problem. The reason for this is that
the homogeneous solid body has been made infinitesimally small in the derivation process
of equation (3.37). Thereby, the limitation of homogeneity, which was formulated in the
beginning of this process, has become obsolete. More details about the fundamentals of
heat transfer mechanisms can be found in117 [138, 219].
3.2.2 Numerical Modeling of Heat Transfer in Solids

For the numerical modeling of heat conduction mechanisms, FVM is applied in this work.
The main idea of the FVM is to split a given geometry into little finite volumes such
that each volume exhibits approximately homogeneous material properties and temperature.
This spatial discretization allows formulating and solving the energy conservation equation
(3.31) for each finite volume separately. Thereby, a system of equations can be derived to
determine the thermal behavior for the given geometry.
An example geometry is shown in Figure 3.4. The 3-D solution area is parametrized in
31
z
x Dxm-1 Dxm Dxm+1
y p+2
p+1
p
p-1
1
2
Dyn-1
Dyn
n-1 Dyn+1
n+1
nmax-1 Dzp+2
Dzp+1
nmax Dzp
Dzp-1
1 2 3 m-1 m m+1 mmax -2 mmax -1 mmax
Figure 3.4: Development of a numerical model for the heat transfer in solids
Cartesian coordinates with x-, y- and z-axes. Each finite volume can be addressed with
the indices (m,n,p) along the three axes. The width ∆xm , the height ∆y n and the depth
∆z p of each row of volumes can be set arbitrarily. The material properties kth , cρ and ρ of
each volume, the initial temperature T m,n,p (t = 0) and the heat generation rate gheat (t) can
be set independently for every finite volume. It is the final goal of the numerical modeling
process to compute the transient temperature profiles of all volumes T m,n,p (t) over time as
a function of the thermal loading, which is given by the transient heat generation rate in
each volume gheat (t).
3.2.2.1 Spatial Discretization of the Heat Equation
In the following, the governing thermal equations of the finite volume, with the indices
(m,n,p), which marked red, is derived as an example. To model the heat transfer charac-
teristic of this finite volume, the heat equation (3.31), which is fundamentally an energy
conservation equation, must be solved. For that purpose, the three components of the heat
equation, which is repeated for convenience in (3.38), are discretized in the following.
‹ ˚
∂T ~
cρ · ρ · V · = ~q heat dA + gheat dV (3.38)
∂t
A V
32
• Thermal energy storage

First, the left term of the energy conservation equation that represents the thermal
energy storage capability of the volume is discretized according to (3.39).
m,n,p
∂T m,n,p dT m,n,p
cρ · ρ · V · ≈ Cth with Cth = cm,n,p
ρ ρm,n,p · ∆xm ∆y n ∆z p (3.39)
∂t dt
In this expression the locally continuous temperature T is replaced by the constant
temperature of the volume T m,n,p , assuming a homogeneous temperature within each
finite volume. The material and geometric properties of the volume with the indices
m,n,p
(m,n,p) are summarized to the thermal capacitance Cth of this volume.
• Heat generation
In a next step, the integral of the heat generation density within the considered finite
volume is replaced by the total loss dissipation within the volume Qm,m,p
loss according to
(3.40).
˚
gheat dV = Qm,n,p
loss (3.40)
V
• Heat fluxes
Finally, all heat fluxes between the volume and all its adjacent neighbors, which are
marked in blue in Figure 3.4, must be determined to solve the surface integral. It can
be seen in Figure 3.4 that there are six heat fluxes between the volume (m,n,p) and
its left (l), right (r), upper (u), lower (d), front (f) and rear (r) neighbor. These heat
fluxes, resulting from the product of heat flux densities qheat,k and the corresponding
surface area ∆A, must be summarized according to (3.41).
‹ X X
~ =
~q heat dA qheat,k · ∆Ak = Qheat,k (3.41)
A k=r,l,u,d,f,r k=r,l,u,d,f,r
The heat flux between one volume and another can be determined by integrating over
the Fourier Equation (3.42).
~q heat = −kth · grad (T ) (3.42)
This integration is illustrated in the following for the x-axis of the Cartesian coordinate
system. The integration process and the result along the y- and z-axis can be derived
analogously. According to (3.42) the heat flux in the direction of the x-axis is given
by (3.43).
dT (x)
qheat (x) = −kth (3.43)
dx
One dimensional (1-D) heat flux calculation To make this equation applicable for a spa-
tially discretized geometry of material composites, the Fourier equation is solved analytically
for an exemplary 1-D problem, which is depicted in Figure 3.5. Note that the temperatures
33
0 x1 x2
x
ktha kthb
Dy
qheat qheat
Dxa Dxb Dz
T(x = 0) T(x1) T(x2)
T(x)
T0 ktha < kthb
T1
T2
x
0 x1 x2
Figure 3.5: Stationary heat transfer of two composite materials a and b

T0 = T (x = 0) and T2 = T (x2 ) in Figure 3.5 represent the temperatures of two adjacent
volumes along the x-axis of the overall geometry of Figure 3.4. The Fourier equation can
be solved for the temperature T along the x-axis by integration of (3.43), leading to (3.44).
ˆ x
qheat (x0 ) 0
T (x) = − dx + T0 (3.44)
0 kth (x0 )
In the example depicted in Figure 3.5, the heat flux density stays constant along the x-axis,
because there is no heat flux component perpendicular to the x-axis and there are no heat
sinks or sources. The heat flux densities in the y- and z-axis directions do not need to be
considered here, because they are taken into account in the orthogonal components of the
heat flux vector ~q heat . If the volume is selected small enough, the modeling error that results
from this approximation is negligible.
A second approximation must be made to simplify the solution process: The heat gener-
ation within each finite volume is assumed to occur only at the center of the volume. That
neglects the local impact which the heat generation has on the heat flux density within one
cube. This effect has been discussed for the thermal modeling of electric machines in [245].
However, heat generation within a thermal model of a power electronic module only occurs
in the semiconductor devices. These have very small dimensions in comparison to the entire
power module geometry, such that the error that is made by neglecting the distributed heat
generation is practically negligible. Consequently, it can be assumed that the heat flux
density does not change along the x-axis and remains constant according to (3.45).
qheat (x) = qheat = const (3.45)
With this information, the integral (3.44) can be solved to determine the temperature T2 at
x2 leading to (3.46).
qheat qheat
T (x = x2 ) = T2 = − a
· ∆xa − b · ∆xa + T0 (3.46)
kth kth
34
Note that the superscript a and b in this equation indicate the material layer of each property.
By reshaping (3.46) the heat flow Qheat can be derived as a function of the temperature
difference T0 − T2 as well as of the geometry and the thermal conductivities of the materials
a b
kth and kth .
∆y∆z
Qheat = qheat · ∆y∆z = ∆xa ∆xb
· (T0 − T2 ) (3.47)
k a + k b
th th
To simplify (3.47), the geometry and material constants can be interpreted as a thermal
ab
resistance Rth , which has been done in (3.48).
a
∆xb

T0 − T2 ab ∆x 1
Qheat = ab
with Rth = a
+ b (3.48)
Rth kth kth ∆y∆z
ab
This thermal resistance Rth describes the constant heat flux Qheat between x0 = 0 and x2
as a function of the temperature difference T0 − T2 .
Generalization of the discretized heat flux equation As a result, the heat flux compo-
nents towards the volume with the indices (m,n,p) in direction of the x-axis in Figure 3.4
can be calculated by determining the thermal resistance towards the neighboring left and
right volumes. The resulting fluxes can be expressed by (3.49) and (3.50). Note that the
distances ∆xa and ∆xb need to be replaced by ∆xm /2 and ∆xm±1 /2 because the heat flux
from one volume to another only needs to pass half of each neighboring volume’s width.
T m−1,n,p − T m,n,p ∆xm ∆xm−1

m,n,p 1
Qheat,th,l = m,n,p with Rth,l = m,n,p + m−1,n,p · (3.49)
Rth,l kth kth 2∆y n ∆z p
T m+1,n,p − T m,n,p ∆xm ∆xm+1

m,n,p 1
Qheat,th,r = m,n,p with Rth,r = m,n,p + m+1,n,p · (3.50)
Rth,r kth kth 2∆y n ∆z p
The heat fluxes towards the adjacent y-axis and z-axis volumes can be calculated the same
way. The results are summarized in equations (3.51) to (3.54).
T m,n−1,p − T m,n,p ∆y n ∆y n−1

m,n,p 1
Qheat,th,u = m,n,p with Rth,u = m,n,p + m,n−1,p · (3.51)
Rth,u kth kth 2∆x ∆z p
m
T m,n+1,p − T m,n,p ∆y n ∆y n+1

m,n,p 1
Qheat,th,d = m,n,p with Rth,d = m,n,p + m,n+1,p · (3.52)
Rth,d kth kth 2∆x ∆z p
m
T m,n,p−1 − T m,n,p ∆z p ∆z p−1

m,n,p 1
Qheat,th,f = m,n,p with Rth,f = m,n,p + m,n,p−1 · (3.53)
Rth,f kth kth 2∆x ∆y n
m
T m,n,p+1 − T m,n,p ∆z p ∆z p+1

m,n,p 1
Qheat,th,b = m,n,p with Rth,r = m,n,p + m,n,p+1 · (3.54)
Rth,r kth kth 2∆x ∆y n
m
Discretized heat equation Making use of the discretized terms for the thermal energy
storage equation (3.39), the heat generation equation (3.40) and the heat flux equations
(3.49)-(3.54), the heat equation in (3.38) can be transformed into its spatially discretized
35
form in (3.55) for the volume (m,n,p).

m,n,p
m,n,p dT
X
Cth = Qheat,k + Qm,m,p
loss T m,n,p (t = 0) = T0 (3.55)
dt k=r,l,u,d,f,b
By repeating this process to every finite volume of the geometry in Figure 3.4, the spatial
discretization process transforms the PDE into a system of first order ordinary differential
equations with constant coefficients and initial conditions. Note that the resulting system
of ordinary differential equations are still energy conserving, as it is directly derived from
the energy conversion equation (3.29).
3.2.2.2 Modeling Thermal Boundary Conditions

For all finite volumes interfacing a thermal boundary, the introduced modeling process must
be modified.
• Isothermal boundary
In case the volume (m,n,p) forms an isothermal boundary (Dirichlet boundary con-
dition), the time derivative of the temperature is set to zero. The temperature of
the boundary Tb is included in the initial condition T m,n,p (t= 0) of the differential
equation of the volume.
m,n,p dT m,n,p
Cth =0 T m,n,p (t = 0) = Tb in case of isothermal boundary (3.56)
dt
• Isoflux boundary
If the volume (m,n,p) forms an isoflux boundary (Neumann boundary condition) in a
direction q, which means that the flux Qheat is entering the volume from this direction,
m,n,p
the thermal resistance to the side of the boundary Rth,q is set to infinite. Furthermore,
the given flux Qheat is added to the total loss dissipation Qm,m,p
loss of the volume (m,n,p).
m,n,p
Rth,q →∞ Qm,m,p
loss = Qm,m,p
loss + Qheat in case of isoflux boundary (3.57)
• Mixed boundary
Finally, a volume (m,n,p) of a solid can form a mixed boundary (Robin boundary
condition) in a direction q. This happens for example due to a convection process if
the volume (m,n,p) at temperature T m,n,p faces a passing coolant fluid at its surface
∆Aq with a temperature Tconv . The convection process results in a heat flux Qconv
that is directed from the volume (m,n,p) towards the fluid and is proportional to the
temperature difference between the volume and the fluid according to (3.58).
Qconv = −∆Aq · heff · (T m,n,p − Tconv ) (3.58)
The strength of the convection heat flux Qconv depends on the heat transfer coefficient
heff that must be calculated analytically or numerically for the given geometry and
convection conditions, e.g. as discussed in [313].
36
To take into account this convection process in the numerical model, the interfacing
layer of the fluid must be modeled in a dedicated node, e.g. (m+1,n,p). This dedicated
node of the fluid must exhibit the constant temperature Tconv that can be established
by a isothermal boundary condition according to (3.59)
m+1,n,p dT m+1,n,p
Cth =0 T m+1,n,p (t = 0) = Tconv (3.59)
dt
m,n,p
Furthermore, the thermal resistance Rth,q that determines the heat flux between the
solid volume (m,n,p) and the fluid volume (m + 1,n,p) must consider the convective
heat flux that transitions into the conductive heat flux at the boundary. This is
appropriately considered in equation (3.60)
m,n,p 1 ∆xm 1
Rth,q = + m,n,p · (3.60)
heff ∆A kth 2∆y n ∆z p
This equation ensures that both the heat convection process on the fluid side and the
heat conduction process on the solid side of the boundary through half of the volume
(m,n,p) are taken into account accurately.
With the presented modification of the differential equations and initial conditions (3.55)
of all finite volumes that are located at a thermal boundary, a wide range of heat transfer
problems can be addressed. The resulting FVM modeling technique is in particular suit-
able to create thermal models of typical power module geometries, which is more in-depth
discussed in the next chapter.
3.2.2.3 Model Representation as a Thermal Equivalent Circuit

The FVM provides a very formal way to solve a 3-D heat transfer problem numerically
by setting up a discretized heat equation (3.55) for each volume (m,n,p) of the geometry.
However, the derivation of the FVM and the model equations are not very insightful from
a physical perspective.
For a better reflection of the physical mechanisms that are represented by the model equa-
tions, they can be interpreted in a thermal equivalent circuit, which is in depth discussed in
[31, 32, 140, 160, 219, 244]. In Figure 3.6 the thermal equivalent circuit of an exemplarily
finite volume and its neighbors are depicted. The temperature T m,n,p of its thermal capac-
m,n,p
itance Cth represents the thermal energy, which is stored in its volume. The thermal
resistances interconnecting the considered finite volume with adjacent volumes determine
the heat fluxes between the volume and its neighbors. Finally, the losses generated inside
the volume Qm,n,p
loss is represented by an equivalent heat source.
It is important to understand that the thermal equivalent circuit is only a method to
provide insight into the model structure. The utilization of large scale thermal equivalent
circuits for thermal simulation of power modules in a circuit solver, although proposed
in literature e.g. in [22], does not lead to a very time efficient simulation. A far better
approach is the formulation of the system of differential equations as a state-space model
and the consequent application of state-space methods that allow fast and precise thermal
37
Tm-1,n-1,p Tm,n-1,p Tm+1,n-1,p

Dyn-1
Rth,ub
a
Rth,b
T m-1,n,p
T m,n,p
Rth,ua Tm+1,n,p
a
R th,l
b
R th,l
a
R th,r Rth,rb
Dyn
a
Cth
Rth,f
Qloss
Rth,da
b
Tm-1,n+1,p Tm,n+1,p Rth,d Tm+1,n+1,p
Dyn+1
p
z
Dz x
Dxm-1 Dxm Dxm+1
y
Figure 3.6: Thermal equivalent circuit of the FVM model
simulations. The optimal use of state-space modeling techniques for the time discretization
and model reduction is illustrated in the following.
3.2.2.4 State Space Modeling
By combination of the discretized heat equations, a state-space model can be obtained

according to (3.61).
dT
= A · T + B · Qloss T (t = 0) = T 0 (3.61)
dt
The state-space model is characterized by the two matrices A and B, the temperature vec-
tor T , the loss vector Qloss and the initial temperatures of all volumes T 0 . The temperature
vector T consists of the temperatures of all volumes and is
max ,1,1 max ,nmax ,1 max ,1,2 max ,nmax ,pmax T
T = T 1,1,1 T 1,2,1 ... T m T 1,2,1 ... T m Tm ... T m
(3.62)
38
The loss vector, given by (3.63), exhibits all loss sources Q1loss to Qmax
loss , which can be con-
nected with scaling to all volumes of the discretized geometry.

Qloss = Q1loss Q2loss ... Qmax loss (3.63)
This state-space model allows computing the rate of change of all temperature states dTdt
as a function of the loss generation Qloss and the initial temperature distribution T 0 . It
requires the correct state transition matrix A and input matrix B. They can be directly
computed by inserting the individual terms of the discretized heat equation (3.55) at the
right column and row of the matrix A or B. The advantage of creating a state-space model
is not only that the model equations are put in a very simple framework. It also allows
applying a huge variety of mathematical tools to analyze, simulate or simplify the modeled
heat transfer problem. The application of these tools will be addressed in the following.
3.2.2.5 Time Discretization

Based on the derived spatial thermal state-space model in (3.61), the temperature vector
T can be calculated over time for any finite volume in the spatially discretized geometry.
In principle, this can be realized by any numerical integration algorithm, e.g. the Euler,
Runge-Kutta or Adams–Bashforth algorithm which are introduced in [5, 60, 76].
In general, the matrices A and B must be updated regularly, as the thermal material
characteristics change with temperature. However, one significant advantage of the heat
transfer problem given by a power semiconductor module is that it exhibits only small non-
linearities. The main nonlinearity is caused by the temperature sensitive heat conductivity
of the silicon, but the sensitivity is small enough that it can be neglected for many calcula-
tions according to [200]. As a result, one set of system matrices A and B can be used for
the thermal simulation over the entire operation range.
For the resulting linear system, it is possible to develop a discrete-time state-space model
of the continuous-time model represented by (3.61). The discrete-time model allows the
calculation of the temperature distribution T D (k) as a function of the loss generation QD
loss
(k)
at discrete time steps k with the sampling period Ts based on the following matrix difference
equation:
T D (k + 1) = AD · T D (k) + BD · QD
loss
(k) (3.64)
In case of a linear state-space system, the transition matrices of the discrete time system
AD and BD can be determined precisely for a piece-wise constant input over each sampling
period Ts . For this zero-order-hold discretization the matrices AD and BD can be determined
by (3.65).
ˆ Ts
D D
A = exp (A · Ts ) and B = B · exp (A · τ )dτ (3.65)
t=0
This method is commonly used for the modeling of control systems [15, 149, 307]. If the
input does not change significantly over one sampling instant, the zero-order hold discretiza-
tion provides excellent results. Thus, for the accurate electrothermal simulation of a power
39
module, the sampling period Ts must be selected such that the zero-order-hold approxima-
tion of the losses does not result in relevant inaccuracies. This is achieved by selecting Ts
such that it is at least a decade smaller than the period of the electrical excitation frequency.
3.3 Model Order Reduction

The thermal modeling technique that was presented allows the derivation of detailed spatial
thermal models of power modules. The 3-D spatial thermal models typically exhibit at
least a few thousand states. This huge number of states makes a simulation over a mission
profile with a duration of some minutes to one hour at a sampling frequency of 1 kHz on
a conventional computer difficult, if not unfeasible. Furthermore, such a large-scale model
cannot be implemented as a real-time model on a digital signal processor (DSP). To address
these limitations, the following section discusses model order reduction (MOR) methods
for linear time-invariant systems. It illustrates the fundamental principles of the balanced
truncation method (BTM) and the singular perturbation approximation (SPA) that are
effective tools to derive compact 3-D spatial thermal models of power electronic modules.
3.3.1 Balanced Truncation Method (BTM)

The balanced truncation method is illustrated in the following for a generic state-space
model G (3.66) with the state vector x, the input vector u and the output vector y. The
state-space model G is characterized by the transition matrix A, the input matrix B and
the output matrix C.
dx
G: =A·x+B·u y =C·x (3.66)
dt
The basic idea of the balanced truncation method is to map the state-space system G via
a linear base transformation γ (3.67) to an equivalent system G̃ (3.68).
γ : θ =M·x x = M−1 θ (3.67)

dθ
G̃ : = Ã · θ + B̃ · u y = C̃ · θ (3.68)
dt
The system G̃ is characterized by the matrices Ã, B̃ and C̃ as defined in equation (3.69),
which results directly from the base transformation γ.
Ã = M · A · M−1 B̃ = M · B C̃ = C · M−1 (3.69)
It provides the same eigenvalues, system dynamics and input-output characteristics as the
original system. Only the system states have changed from x to θ. The new states θ are not
physically meaningful anymore, but can be directly related to the original system states x
via the base transformation γ in (3.67).
To reduce the system order effectively, the BTM requires a transformation γ with a
suitable transition matrix M such that the new system states θ are sorted according to
40
their importance for the energy transfer between input and output of the system. This
particular system representation is called balanced realization. The balanced realization of
the system can be split in two parts, as shown in equations (3.70) and (3.71).

d θ1 Ã11 Ã12 θ1 B̃1
= + u (3.70)
dt θ2 Ã21 Ã22 θ2 B̃2
θ
1
y = C̃1 C̃2 · (3.71)
θ2
All major energy transfers between input u and output y are taken into account by the
state vectors θ1 , whereas the energy transfers that are realized by θ2 are negligible. Thus,
the system can be truncated leading to a more compact realization G̃t according to (3.72).
dθ1
G̃t : = Ã11 θ1 + B̃1 u y = C̃1 · θ1 (3.72)
dt
3.3.2 Singular Perturbation Approximation (SPA)

The balanced truncation method aims to bring the system into a balanced realization and
eliminates all states which do not contribute to the dominant energy transfer between input
and output. Unfortunately, the truncated states also have an impact on the system gain
between inputs and outputs which is changed by the truncation process. If a large-scale
model with a few thousand states is truncated to a model with one hundred states, typically
this effect is negligible. However, if a large-scale system model shall be approximated by a
system model of very small order, this is an unwanted effect that needs to be compensated.
The SPA, which is introduced in [188], addresses this limitation by ensuring that the dc
system gain is maintained after the model reduction process. It determines the steady-state
solution of the states θ2 to be truncated, which is given via (3.73).
dθ2
= 0 → Ã21 · θ1 + Ã22 · θ2 + B̃2 · u = 0 (3.73)
dt
By rearranging (3.73), the steady-state value of θ2 can be determined as a function of the
input vector u and the retained states θ1 according to (3.74).
θ2 = −Ã−1 −1
22 B̃2 · u − Ã22 Ã21 · θ 1 (3.74)
If this equation is used as a steady-state approximation of θ2 in the balanced realization

(3.70) and (3.71), the resulting realization maintains the dc-gain of the original system. The
resulting realization G̃s given by (3.75) and (3.76) is referred to as singular perturbation
approximation (SPA).
dθ1
G̃s : = Ã11 − Ã12 Ã−1
22 Ã 21 θ 1
+ B̃1 − Ã 12 Ã −1
22 B̃ 2 u (3.75)
dt
y = C̃1 − C̃2 Ã−1 −1
22 Ã21 · θ 1 − C̃2 Ã22 B̃2 · u (3.76)
41
The resulting reduced-order model is based on the balanced realization of the original sys-
tem, like the balanced truncation equation in (3.71). For this reason, the SPA and the
balanced truncation method have a lot of common features, e.g. the same error bound [37,
188]. However, the SPA maintains the dc-gain of the original system model, which is not
achieved by the balanced truncation. To do so, it needs to introduce a feed-through matrix
D = C̃2 Ã−1
22 B̃2 that results in a reduced system accuracy at high bandwidth. As an exam-
ple, in case of a power module this feed-through matrix D changes the thermal impedance
such that its magnitude at high bandwidth settles at non-zero and the phase does not decay
to 90° but recovers to 0°. However, this is the cost for the corrected dc-gain and good low
and medium bandwidth accuracy.
As a result, one must carefully consider whether the balanced truncation method or the
closely related SPA method yield better results for the desired model order reduction.
3.3.3 System Gramians and Hankel Singular Values (HSVs)

For the balanced truncation and the SPA, it is essential to bring the original system into
a balanced realization with a suitable base transformation M. To find M one must have
a look at the energy transfer from the input vector u(t) to the state vector x(t) and from
the state vector x(t) to the output vector y(t). This energy transfer is characterized by the
system Gramians, whose nature will be illustrated in the following.
Controllability Gramian If the system G introduced in (3.66) is asymptotically stable,

controllable and exhibits an initial state x0 , it can be shown that the control law (3.77)
transfers the system state x = x0 to the zero state x = 0 with minimal input energy.
u(t) = −BT exp (−At)T P−1 x0 (3.77)
The term P is referred to as the Controllability Gramian and is defined by (3.78).

ˆ ∞
exp (Aτ )BBT exp AT τ dτ

P= (3.78)
t=0
A derivation and proof of (3.77) is given in [108] and [228]. The input energy associated
with the transition from x0 to the zero state can be determined according to (3.79).
ˆ ∞ ˆ ∞
||u||2 = T
u(τ ) u(τ )dτ = xT0P
−T
exp (−At)BBT exp (−At)T P−1 x0 dτ (3.79)
t=0 t=0
This expression can be reshaped according to (3.80) and (3.81).

ˆ ∞
T −T T
||u||2 = x0 P exp (−At)BB exp (−At) dτ P−1 x0
T
(3.80)
ˆ ∞ t=0
ˆ ∞
T
P= T
exp (−At)BB exp (−At) dτ = exp (At)BBT exp (At)T dτ (3.81)
t=0 t=0
42
As the Controllability Gramian P is a symmetrical matrix and the inverse of a symmetrical

matrix remains symmetrical, the expression in (3.82) can be derived.
−T −1
||u||2 = xT
0P x0 = xT
0 P x0 (3.82)
It can be seen from (3.82) that the Controllability Gramian P directly provides a measure
for the input energy required to realize a state transition from any state to the zero state.
Without proof it is underlined that this can be generalized for any state transition from one
state to another.
Observability Gramian Similarly, one can determine the energy that is transferred from a
state x = x0 to the output y. For this purpose, an observable and stable system G with an
initial state x0 is assumed, whose input is zero for all times u(t) = 0. The system response
is given by (3.83).
y(t) = C exp (At)x0 (3.83)
As a result, the output energy can be determined based on (3.84) and (3.85).
ˆ ∞ ˆ ∞
T T T
T
||y||2 = y(τ ) y(τ )dτ = x0 exp A τ C C exp (Aτ )dτ x0 (3.84)
t=0 t=0
||y||2 = xT
0 Qx0 (3.85)
This leads directly to the definition of the Observability Gramian Q according to (3.86).
ˆ ∞
exp AT τ CT C exp (Aτ )dτ

Q= (3.86)
t=0
The Observability Gramian provides a measure for the energy, which is transferred from
the states to the output. Note that for an observable system the Observability Gramian is
symmetrical and positive definite.
Lyapunov equations Both Gramians P and Q can be directly obtained from the two
Lyapunov equations of the system (3.87) and (3.88) [75].
AP + PAT + BBT = 0 (3.87)
AT Q + QA + CT C = 0 (3.88)
To proof the identities (3.87) and (3.88) one must only insert the integral definition of
the Gramians (3.78) and (3.86) into the Lyapunov equations. The Lyapunov equation
allows the effective algebraic derivation of the Gramians and reflects that both Gramians
are symmetrical matrices. In case of a controllable and observable system they are also
positive definite.
43
Hankel singular values (HSV) The controllability and observability Gramians change
under the base transformation γ defined in (3.67) according to (3.89), which can be derived
by applying the transformation to the Lyapunov equations.
P̃ = MPMT Q̃ = M−T QM−1 (3.89)
However, the product of both Gramians in (3.90) is transformed by any base transformation
M such that its eigenvalues w1 ,w2 ,w3 , ...,wn remain unchanged according to (3.91).
P̃ · Q̃ = MPQM−1 (3.90)

λ P̃ · Q̃ = λ (P · Q) = {w1 w2 w3 ... wn } (3.91)
Thus, the eigenvalues w1 ,w2 ,w3 , ...,wn of the product of both Gramians are unique properties
of the system G. The square roots of the eigenvalues are the so-called Hankel singular values
(HSV) of the system G.
√
σnHSV = wn (3.92)
There exists one unique base transformation M̃ for the system G, which transforms the
controllability Gramian and the observability Gramian to one identical diagonal matrix Σ.
Its derivation for the balanced realization of a system is described in the appendix A.4. The
diagonal entries of Σ are the Hankel singular values (HSV) of the system (3.93), which are
typically ordered from the largest to the smallest HSV:
Q̃ = P̃ = diag σ1HSV ,σ2HSV ,σ3HSV , ...,σnHSV = Σ

σ1HSV > σ2HSV > σ3HSV > ... > σnHSV (3.93)
The HSVs on the diagonal of the transformed Gramians P̃ and Q̃ represent the amount of
energy transferred by each state of θ in (3.70). This becomes very plausible by reviewing
the energy transfers between input vector, state vector and output vector, which resulted
from (3.82) and (3.85).
Truncation error To reduce the system complexity one can simply truncate the full order
system by leaving out states θ2 which led to (3.72). The error made by this truncation of all
states of higher order than r is bounded by the following identity (3.94) according to [116,
188].
n
!
X
||y − ỹ|| ≤ 2 σi ||u||2 (3.94)
i=r+1
Note that this is true for the balanced truncation as well as for the SPA. This allows
controlling the truncation individually for each application, such that the system complexity
is reduced sufficiently but without losing too much precision of the system model.
44
3.4 Review and Modeling of Degradation Mechanisms
Bondwires (Al)
Power semiconductor (Si)
Solder layer (SnAg3,5)
Copper (Cu)
Ceramic substrate (Al2O3)
Sold layer (SnAg3,5)
Heat sink (Al)
Cooling liquid
Figure 3.7: Structure of a power module with bond wires and solder interconnects
25
Al
in 10 -6/K
20 Cu
15
10 Al2O3
CTE
SnAg3,5
5 Si
0
Aluminium Silicon Solder Copper Substrate
Material
Figure 3.8: Comparison of the coefficient of thermal expansion (CTE) of the various power
module components [8]

This section introduces thermo-mechanically induced degradation mechanisms of power elec-
tronics modules and provides generic modeling tools for degradation and lifetime estimation.
First, degradation mechanisms that occur in power modules with silicon (Si) devices, alu-
minum (Al) bond wires, direct copper bond (DCB) and solder interfaces are introduced.
After reviewing the experimental assessment of these degradation mechanisms via thermal
cycling test, empirical lifetime models are presented that estimate the number of cycles
to failure for simple periodic load cycles. For the evaluation of complex load profiles, the
concepts of cycle counting and load accumulation that generalize the application of the
empirical lifetime models are discussed.
3.4.1 Degradation Mechanisms

The dominating degradation processes that lead to failure of power devices occur at material
interfaces in the power module and are driven by thermo-mechanically induced strain. To
locate the interfaces where the degradation processes occur, first, the typical lateral structure
of an automotive power module is reviewed [319, 333], which is depicted in Figure 3.7.
The electric interconnects of the power semiconductors are realized with Al bond wires
on the top side and a solder connection on the bottom side. The power semiconductors are
45
s
Purely elestic s3
Shakedown s2
Low-cycle fatigue
s1
e
0
- s1
- s2
- s3
Figure 3.9: Stress-strain characteristics for external excitation magnitudes σ 1 < σ 2 < σ 3
mounted with a solder layer on a DCB. This ceramic substrate ensures the electric isolation
of the power semiconductor and provides a heat conduction path from the semiconductor
to the pin-fin heat sink. The interface between the DCB and heat sink is a solder layer in
many state-of-the-art power modules [333].
The dynamical loading of a power module leads to strong thermal cycling including time
varying temperature gradients of the devices but also of the entire power module assembly.
These thermal cycles result into the thermal expansion of the material compounds that are
used in the power module [8, 333]. The CTE of individual material layers of the power
module is illustrated in Figure 3.8.
As a consequence of the large differences in the CTE of adjacent materials in the power
module, thermo-mechanical strain is induced by the thermal cycles. This is especially true
for the material interface between the silicon devices and the aluminum bond wire and the
aluminum metallization, the solder connection between silicon devices and DCB as well as
the solder connection between the DCB and the Al heat sink [8].
3.4.1.1 Thermo-Mechanically Induced Strain

In principle, the mechanism that leads to degradation is similar for all the material interfaces
[88] described above. A periodic thermo-mechanically induced strain leads in combination
with the plastic deformation properties of the material to stress at the material interconnect,
e.g. the solder layer or the aluminum bond. This can result in the stress-strain characteristics
according to [61] that are illustrated in Figure 3.9, e.g. at the most critical place of the
material interface. If the thermal ∆T cycle is small, the thermally induced strain is small
as well, such that the strain ε is always proportional to the applied stress σ. For this purely
elastic loading, no plastic deformation occurs. However, if the amplitude of the thermal cycle
∆T increases such that the stress excitation overcomes the yield stress, plastic deformation
occurs. This means that fatigue, slowly but also irreversibly, changes the micro structure
of the material or the material interface. This effect can be observed in the stress-strain
diagram in Figure 3.9 as small hysteresis which transiently move towards a steady-state.
During this plastic deformation energy is brought into the material, which can be determined
46
via the curve integral (3.95).

˛
∆w = σdε (3.95)
S
The excitation can lead to two steady-state characteristics, depending on the amplitude
of the excitation, which are depicted in Figure 3.9. For smaller excitations, the plastic
deformation may decrease as the material yields, such that after some time the excitation
only results in an elastic behavior. This transient plastic deformation process which decays
over time is referred to as shakedown. Alternatively, the excitation settles and results in
a continuous plastic deformation process that can be observed as a hysteresis in the stress
strain diagram of Figure 3.9. This permanent plastic deformation process is referred to as
low-cycle fatigue. The energy that is brought into the material ∆w, which is proportional
to the hysteresis area, is a good indicator of the fatigue that is induced in the material.
3.4.1.2 Fatigue Process

Low-cycle fatigue changes the microstructure of the material slowly, producing dislocations
that result in low-energy, stable structures to absorb the irreversible slip processes. The
result is strain that is localized in small regions. This strain localization can lead to crack
initiation after long term loading, which is the first phase of fatigue based material degra-
dation. After the crack is initiated, the cyclic thermal excitation leads to the second phase
of fatigue, the crack propagation within the material, which is discussed for power module
components in [88, 179, 180, 257, 343]. The propagation of the crack can be identified in
micro-sections of the power module, e.g. as shown in Figure 3.9. The crack propagation
leads to partial failures of power module components, e.g. because a power device is delam-
inated or bond wire lift-off occurs. Typically, the failure of one power module component
results in a high operational stress of other components, such that their degradation is accel-
erated. Thus, if these effects are not monitored and the power module is kept in operation
for too long, the process results in a catastrophic failure of the power module, e.g. due to a
short circuit, thermal runaway or over-voltage breakdown.
The key degradation processes that occur due to thermo-mechanical strain within the
power module are the following:
• Bond wire lift-off
• Reconstruction of the Aluminum metallization of the semiconductor
• Crack and void propagation of the die-attach solder layer
• Delamination of the DCB base plate solder interface
Bond wire lift-off There is a strong CTE mismatch between the aluminum bond wire and
the Si devices, as can be seen from Figure 3.9. This mismatch leads to excessive stress,
especially at the periphery of the bond contact. As a consequence, according to [8, 74,
117, 266] and [71], cracks are typically initiated between the aluminum bond wire and the
aluminum metallization of the Si device at the periphery of the bonded area and propagate
47
©2010 VDE Verlag GmbH ©2010 VDE Verlag GmbH

Figure 3.10: Cross section of cracks growing Figure 3.11: Crack grows 15 µm above the
from the ends towards the cen- bond interface (Magnification
ter of the bond [117] of Figure 3.10) [117]
towards its center. This can be observed in Figure 3.10. At closer inspection, it can be seen
in Figure 3.11 that the crack does not propagate at the bonding interface, but within the
bond wire structure itself. In a more in-depth discussion of this effect, which is presented
in [117], it is argued that this occurs due to the grain boundaries that result from the
metallization and bonding processes.
After the crack has grown along the entire bonded area, the bond wire lifts off. Conse-
quently, the device current that was conducted by the bond wire must be conducted through
the remaining bond wires. For this reason, the forward voltage of the power module is step-
wise increased [8, 35, 183, 233] and the remaining bond wires experience a stronger thermal
stress and higher rate of degradation. This leads to a self-accelerated process that finally
causes the failure of the device and the power module. Note that bond wire lift-offs do mostly
occur at the interface between the bond wire and the Si power semiconductor. Degradations
at the interface between the bond wire and the DCB are typically not observed due to the
lower thermal excitation and smaller CTE difference [8]. Also, according to [8, 70, 71], heel
cracks rarely occur due to thermal cycling, but are primarily caused by heavy endurance
tests, especially in case of vibrations that occur during the bonding process.
Reconstruction of the aluminum metallization Thermal cycles also induce stress in the
thin metallization layer on top of the Si devices due to the different CTEs of the aluminum
and of the silicon devices [8]. This thin metallization layer is not depicted in the power
module structure, because it exhibits a layer depth of only a few microns. However, the
Aluminum metallization layer is of great importance to enable an ultrasonic bond connection
between the power semiconductor and the bond wires.
The thermally induced strain at the metallization typically results in diffusion creep, grain
boundary sliding or plastic deformation leading to either extrusion of the aluminum grains
or to cavitation effects at the grain boundaries of the metallization [71, 114, 236]. This effect
can be observed by comparison of the metallization of a moderately device with a device
after extensive thermal cycling which is illustrated in Figure 3.12.
As a consequence, the sheet resistance of the aluminum metallization rises, which can be
observed as a linear rise of the devices forward voltage. This degradation of the metallization
layer typically does not directly lead to failure, but promotes crack initiation [252] that later
can propagate through the material and e.g. trigger bond wire lift-offs. Furthermore, the
cavitation can lead to higher current densities and thereby to strong thermomechanical
induced strain.
48
©2010 VDE Verlag GmbH

Figure 3.12: Metallization (magnification 3000Ö) after 29000 cycles at moderate stress
0,47J/cycle (left) and severe stress 1,15J/cycle (right) [236]
Crack and void propagation of the die-attach solder-layer Due to the CTE mismatch
between the DCB and the Si devices, thermally induced strain initiates cracks in the solder
layer which attaches the device to the DCB. The cracks occur either at the border of the
solder pads, where shear stress reaches its maximum, or at existing voids or locations of
maximum stress within the solder, as discussed in [77, 137]. The cracks propagate afterwards
within the brittle copper intermetallic phase of the solder layer and lead to large voids
or partial delamination of the device, as it loses contact to the DCB. This effect can be
observed in Figure 3.13, which shows a scanning acoustic microscopy (SAM) image of a
power module excerpt before and after excessive power cycling. A potential consequence of
the cracks and is a locally increased thermal resistance between the device and the DCB.
This leads to higher temperatures at these locations due to the deteriorated heat dissipation
and accelerates the crack propagation. The entire process can be observed with monitoring
systems that track the growing thermal resistance [77, 162, 179, 180] or transient thermal
impedance measurements [135, 288] of the power devices. If the thermal resistance grows to
a level at which the power module cannot be operated anymore within its specified operation
range, e.g. at its rated current, because it reaches its temperature limit, this rapidly leads
to a full failure of the power module caused by a thermal runaway. In that case the power
module fails directly as a consequence of the solder delamination. However, as discussed
in [137], in most modules the crack propagation in the die attach solder leads to increased
temperature cycling of the bond wires, such that bond wire lift-offs are triggered leading to
the failure of a device. In this last mentioned case, the solder delamination indirectly leads
©2013 IEEE
Figure 3.13: SAM images, before (left) and after (right) power cycling tests - The power
cycling results in strong solder degradation at the tested IGBTs [268]
49
©2014 IEEE
Figure 3.14: Scanning Acoustic Microscopy (SAM) images of the DCB base plate solder
joint during thermal cycling ∆T = 80 K, Tmax = 105 ◦C, tcycle = 300 s [271]
to the failure of the power module.
Delamination of the DCB attach solder interface The thermal cycles that result from
the load profile of the power module have typically fast dynamics. Therefore, they only
cause minor thermal cycles of the solder interface between the base plate and the DCB.
However, the cooling fluid also exhibits temperature variations, which result in a passive
thermal cycling of the DCB attach solder layer. As a consequence of these cycles and the
CTE mismatch between the DCB and the copper heat sink, thermal stress is induced [8,
71, 136]. According to [144], this leads to crack initiation that occurs at the corners of the
substrate solder layer. The cracks propagate towards the center of the solder layer in the
vicinity of the intermetallic layer and lead to partial delamination, as it can be observed
in the SAM images that are depicted in Figure 3.14. The delamination leads to higher
temperatures at the devices and thereby accelerates the degradation of the bond wires, the
metallization and die attach solder. If the delamination reaches a certain stadium, it limits
the operation range of the power module, because at peak loading the maximum device
temperature is exceeded which can destroy the devices in a catastrophic failure.
3.4.2 Experimental Assessment of Degradation
For the experimental assessment of degradation, thermal cycle tests under periodic loading
are carried out, which generate significantly stronger thermal cycles at defined amplitudes
than in real operation [202, 333]. This enables the degradation of the power module in
shorter time [69, 131]. The thermal cycling tests are stopped when a defined end-of-life
criterion is reached. By extrapolating the data that are obtained by these tests, empirical
aging models can be derived that estimate the number of cycles to failure as a function of
the temperature cycle and the operation conditions.
In the following, end-of-life criteria that are typically used for accelerated aging test are
discussed. Afterwards, two typical thermal cycling tests that are used for the empirical
characterization of power module degradation are reviewed.
50
3.4.2.1 End-of-Life Criterion

There are two accessible indicators that reflect the degradation of a power module and are
repetitively evaluated during thermal cycling tests: The forward voltage drop of the devices
uce at a defined low current, which is typically in the range of 100 mA, is used to evaluate
primarily the state of degradation of the bond wires. The thermal resistance Rth of the
devices is used as an indicator of the state of degradation of the die attach and DCB attach
solder layers.
To define the end-of-life of a power module, it is obviously not a viable solution to wait
for a catastrophic failure of the power module, which is the malfunction of the device as an
electric switch e.g. a permanent open circuit or short circuit of the device. As an alternative,
thresholds are defined for the failure indicators in order to have a proper definition of the
end-of-life of a power module. If these thresholds are reached, the power module can still
operate, but its degradation has reached a point where its functionality cannot be guaranteed
for any longer operation under worst case operation conditions, e.g at very high load and
ambient temperatures. In literature multiple thresholds can be found from various research
groups. A bond wire failure is defined in [131, 137, 266, 268, 299] by a 5 % increment of the
forward voltage of the devices uce . However, in [143] it is argued that for a better detection
the threshold should be increased to 10 %. For definition of a power module failure due to
solder voids or delamination in [262, 271, 299] a thermal resistance of 20 % is used whereas
in [268] a 10 % and in [143, 180] a 50 % increment is preferred. As in the progress of this
work an empirical degradation model based on the data from [299] is used, a uce increment of
10 % and an Rth increment of 20 % defines the end-of-life of a power module in the following.
3.4.2.2 Thermal Cycling Tests

Thermal cycling tests are carried out to characterize the number of cycles to failure of a
power module for various loadings [202, 333]. They create severe thermal stress at the
critical module interfaces and evaluate the end-of-life criteria repetitively after a specified
number of cycles to detect a possible end-of-life. There exist two widely used thermal cycling
tests, which are described in the following:
Power cycling In a power cycling test setup a dc-current Iheat is injected in the power
device to heat it up for a specified heating time ton , as illustrated in [131, 202, 282, 333].
Afterwards, no load is applied such that the temperature of the device can decay. This
process is repeated periodically to apply a high number of cycles. The temperature change
∆T that is induced to the device is typically adjusted by the heating current Iheat , whereas
the heat sink temperature is regulated to adjust the maximum temperature of the device.
Power cycling tests are used to evaluate the cycles to failure due to degradation of the bond
wires, the metallization and the die-attach solder. They are typically conducted with a
specified temperature change ∆T , maximum temperature Tmax and heating time ton .
Passive cycling As power cycling tests rarely induce thermal cycles into the entire module
structure, passive cycling tests are used to emulate heating and cooling caused by variation
of the coolant [299, 301], e.g. due to operation and standstill or day and night change. For
51
automotive power modules with liquid cooling this can easily be achieved by sequentially
injecting cold and hot coolants. Passive thermal cycling tests allow the quantitative analysis
of degradation phenomena of the large area solder interface between DCB and base plate.
A detailed review of recent developments of thermal cycling tests is provided in [62, 347].
3.4.3 Lifetime Estimation and Degradation Analysis

The empirical lifetime estimation of a power electronic module that is stressed by thermo-
mechanically induced strain is typically achieved in multiple steps, which are illustrated e.g.
in [72, 143, 204] and are addressed in the following.
First, an electrothermal simulation of the power electronic module is conducted over a
defined mission profile. The resulting junction temperatures are categorized in thermal
cycles that are characterized by their temperature amplitude, average temperature and
duration. This categorization is typically done with a rain-flow counting algorithm [16], e.g.
as discussed in [81, 216]. Afterwards, the damage that is caused by the various cycles is
evaluated with empirical aging models, e.g. [33, 131], that are developed based on thermal
cycling test data. Finally, the degradation that is caused by all cycles is accumulated
following the Palmgren-Miner rule, e.g. as illustrated in [143] and [175]. Thereby, it can be
estimated how many repetitive mission profiles the power module can statistically endure
before an end-of-life criterion is reached.
In the following, these steps are addressed in more detail by providing a framework that
can predict the number of mission profiles to failure and identify the thermal cycles that
contribute most to the degradation. As the empirical lifetime model is the most important
tool in this context, it is addressed first.
3.4.3.1 Empirical lifetime estimation

The first well known publication that proposed a lifetime model based on power cycling
data for standard power modules with Al2 O3 ceramic substrate was published by Held as a
part of the LESIT project [131]. The proposed lifetime model is therefore often referred to
as the LESIT model and is given according to (3.96):

γ Ea
Nf = A · ∆Tj · exp (3.96)
kb · Tj
It determines the cycles to failure Nf based on the thermal cycle depth ∆Tj and the average
device temperature Tj using a Coffin-Manson model based empirical equation [175]. The
coefficients in equation (3.96) are the Boltzmann constant kb , the activation energy of the
process Ea and a technology parameter A which depends on the power module. In [131] the
limitations of the proposed model were clearly identified. It is a purely descriptive model
that neither considers the physical structure of the power module nor the actual failure
mechanisms of reconstruction or crack growth. However, it was argued that the model
exhibits a certain physical relevance, as the plastic deformation is related to the thermal
cycle depth ∆Tj and the material properties are expressed with an Arrhenius approach due
to the thermally activated nature of the process. Similar lifetime models like the LESIT
52
model were proposed by other researchers, e.g. [69, 70] and [73], at the same time, which
has given the approach a strong legitimacy that it still has today.
In the paper [33], published by Bayerer at the CIPS 2008 conference, the LESIT model
was enhanced by adding the effect of the heating time ton , the current per bond wire Ib , the
voltage class of the device U and the bond wire diameter D resulting into (3.97).

−β1 Ea
Nf = A · ∆Tj · exp · tβon2 · Ibβ3 · U β5 · Dβ6 (3.97)
kb · Tmax
The so called CIPS2008 model also replaces the average temperature Tj that was used in
(3.96), by the maximum temperature Tmax to allow the independent change of the thermal
cycles and the temperature related activation energy of the process. The model is based
on a purely statistical analysis, as it was developed from a high number of power cycling
tests for different module geometries. A similar model was introduced by Scheuermann in
[264] addressing the lifetime estimation of power modules that replaced solder interfaces by
sintering technology. This demonstrates that these types of lifetime models are applicable
for the lifetime estimation of most state-of-the-art power modules.
However, these models all have in common that are purely descriptive and are not based on
the physical assessment of the degradation process, that was illustrated in 3.4.1. That means
they must be used with care and cannot be easily used for generalizations. Nevertheless,
they are useful to roughly estimate the cycles to failure of a power module and are a good
metric to compare and evaluate thermally induced stress that occurs for different loadings.
For these reasons, a descriptive model that derived from the CIPS2008 model is used in this
thesis for comparing the power module degradation that results from different operation
and control strategies. This model is introduced in the next chapter.
3.4.3.2 Degradation Modeling of Complex Load Profiles

The empirical lifetime models, which were introduced in the previous section, allow the
estimation of the number of cycles to failure Nf for one load cycle, defined by the thermal
cycle depth ∆T , the maximum temperature Tmax and the heating interval Ton , that is
periodically applied. This periodic operation is only realistic for thermal cycling tests used
to generate the failure data on which the lifetime models are based. However, under realistic
load conditions a uniform periodic operation hardly occurs. Thus, it is of great importance
to decompose realistic thermal load profiles of power modules into simple sub-cycles that can
be evaluated with the discussed empirical lifetime models. This is addressed in the following
by the introduction of the rain current counting method and the principle of linear damage
accumulation.
Rain-flow counting algorithm Various methods exists to decompose a stress cycle into
periodic sub-cycles to evaluate fatigue as discussed in [16] and [81]. The most popular
method is the rain-flow counting (RFC) algorithm, which was first proposed in [206] and
is standardized in ASTM E-1049 [16]. It was originally developed for the analysis of stress
variations causing material fatigue. However, it has been widely applied for the decom-
position of thermal cycles that occur in power converters, e.g. in [52, 81, 143, 216, 301,
53
Stress
1
Upward half cycle Termination
Downward half cycle 1 End of time trace 1,2,4,6
Full cycle 2 Merge with higher peak flow 2,3,5,5
Opposite peak is higher 1,3,4
2
Cycles
3 Full cycle
3 [1,2],[3,3],[4,5],[4,5]
Half cycle 1,2,6
4
4
5
5
6
Time
Figure 3.15: Exemplary application of the rain-flow counting (RFC) algorithm for the
cycle extraction of a complex stress profile
321]
The reason for its popularity is that the counted thermal cycles correspond to the closed
hysteresis curves in the stress-strain diagram [89]. In particular, cycles that encircle large
areas in the stress-strain diagram are properly extracted by the RFC algorithm, which is
not achieved by other cycle counting algorithms [81].
In the following, the basic sequence of the RFC algorithm, which includes four steps, is
summarized.
1) Extraction of peaks and valleys of the input data and construction of linear connections
2) Rotation of the time axis by 90°, such that the plot has the shape of pagodas
3) Plotting of virtual water traces, whose origins are each peak and valley and whose
termination occurs under the following conditions:
• Reaching the end of the time trace
• Merging with a virtual water trace from a higher peak / lower valley
• Reaching a peak whose opposite peak is higher / valley is lower
4) Pairing of half cycles to full cycles if possible
The individual steps are illustrated in the example that is depicted in Figure 3.15. For the
extracted and categorized sub-cycles, empirical lifetime models can determine the number
of cycles to failure.
54
Linear damage accumulation After the cycles that occur have been identified, the num-
ber of load cycles to failure shall be calculated. This allows comparing multiple load cycles
that were obtained, e.g. with other control algorithms or input data. For this purpose,
the concept of linear damage accumulation is reviewed, which is often referred to as Palm-
gren–Miner Rule [88]. This concept is widely applied in the descriptive degradation modeling
of power electronic modules [52, 143, 216, 321].
If only one single thermal cycle i, which is characterized by the cycle depth ∆T i , the
i i
maximum value Tmax and heating time Ton , is applied to the power module, the number
i
of cycles to failure Nf that result from this cycle can be estimated with empirical lifetime
models and used to determine the degradation ∆η i which is caused by this cycle according
to (3.98)
1
∆η i = (3.98)
Nfi (∆T,Tmax ,Ton )
In this context, a degradation of ∆η i = 0 conceptually means that the cycle does not cause
any degradation, whereas a degradation of ∆η i = 1 means that the cycle has fully degraded
the power module, such that its end-of-life is reached. Of course in reality the degradation
that results from one single cycle is very small. However, this concept allows determining
the small amount of degradation of all sub-cycles that occur over a complex mission profile.
By linear accumulation of the degradation that is caused by all occurring sub-cycles, the
state-of-degradation (SOD) can be obtained according to (3.99).
n
X
SOD = ∆η i (3.99)
i=1
Initially, if the power module has not been degraded at all, the SOD is set to 0. If after
extensive operational stress the SOD reaches 1, the power module has reached its end-of-life,
at least according to the empirical life-time model. As this typically does not happen over
one single mission cycle, it is of great interest to determine the number of complex mission
cycles Nf,cycle that the power module can withstand until it reaches its end-of-life. This
number of mission cycles to failure can be calculated by (3.100) based on the SOD after one
mission cycle.
Nf,cycle = 1/SOD (3.100)
The application of linear damage accumulation should be treated with caution, because
it assumes that the mechanisms for wear-out occur linearly throughout the life of a power
module, as argued in [52]. However, with this limitation in mind, it allows the estimation
of a single value that provides an indication about the accumulated damage over a given
mission profile.
With the introduced concepts, namely the empirical lifetime model, the RFC algorithm
and linear load accumulation, the number of mission cycles to failure for a power module
can be estimated. In addition, the degree of degradation of different parts of a mission
profile can be analyzed.
55
3.5 Summary
In this chapter, methods for the reliability-oriented electrothermal modeling of power elec-
tronic modules have been presented. First, a procedure for precise instantaneous and av-
eraged loss modeling has been introduced. Then, a methodology for efficient 3-D thermal
modeling of the power module structure has been derived. For the reduction of the developed
large-scale electrothermal models, mathematical model reduction techniques were reviewed.
They allow the formulation of compact and detailed models for fast simulations and real-
time applications. Finally, typical degradation mechanism that occur in power modules
due to thermo-mechanically induced strain were reviewed and a fundamental framework for
the empirical lifetime estimation and degradation analysis of the power modules has been
introduced.
56
4 Electrothermal Simulation and Lifetime
Estimation over Mission Cycles
This chapter presents the application and implementation of the modeling techniques that
were introduced in the previous chapter by developing a compact electrothermal model for
the Hybridpack2 power module (HP2), which has already been depicted in Figure 1.1 and is
repeated for convenience in Figure 4.1. The model is suitable for time-efficient simulations
and real-time applications. To demonstrate its applicability for time-efficient simulations, a
simulation framework for a trolleybus is developed. With this framework it is shown that
the electrothermal model can simulate 3-dimensional (3-D) temperature distributions of the
power module extremely fast over long-term mission profiles. Consequently, the introduced
life-time estimation framework is used to predict the number of mission cycles to failure and
analyze the roots of degradation for this example.
Important aspects of this chapter have been investigated as a part of this work and were
published in [118, 246, 305, 310, 312, 313, 316].
Figure 4.1: Automotive power module Hybridpack2 (HP2) from Infineon [107]
4.1 Electrothermal Modeling of the Hybridpack2 Power

Module
This section shows how the modeling techniques developed in chapter 3 can be used to
develop a compact 3-D thermal model of the HP2 power module.
4.1.1 Loss Model Parametrization

First, the parameterization of the device loss model is discussed.
Conduction loss model parametrization The conduction loss model is parameterized

based on data-sheet parameters. In the data sheet of the HP2 [107] the forward charac-
teristics of the insulated-gate bipolar transistor (IGBT) and diodes are provided for device
temperatures of 25 ◦C and 125 ◦C. Based on these forward characteristics the parameters
of the conduction loss model, which was introduced in 3.1.1, can be extracted with the
57
4 Electrothermal Simulation and Lifetime Estimation over Mission Cycles
Table 4.1: Conduction loss parameter of the HP2 extracted from data-sheet [107]
Tj Uce,0 Rce Sce UT RT ST
25 ◦C 542 mV 0Ω 0.03 V/A0.5 334 mV 0Ω 0.0634 V/A0.5
125 ◦C 307 mV 0.17 mΩ 0.041 V/A0.5 222 mV 0Ω 0.06 V/A0.5
Analytical loss model Double-pulse data
-10 °C 400 V -10 °C 400 V

0 °C 0 °C
200 V 200 V
1 °C 1 °C
102 10 °C 102 10 °C
20 °C 20 °C
30 °C 30 °C
32 °C 32 °C
40 °C 40 °C
Loss energy in mJ
Loss energy in mJ
50 °C 50 °C
60 °C 60 °C
70 °C 70 °C
80 °C 80 °C
101 101
Rgate = 2.2 W
100 100
102 102
-10 °C 400 V -10 °C 400 V

0 °C 0 °C
200 V 200 V
1 °C 1 °C
102 10 °C 102 10 °C
20 °C 20 °C
30 °C 30 °C
32 °C 32 °C
40 °C 40 °C
Loss energy in mJ
Loss energy in mJ
50 °C 50 °C
60 °C 60 °C
70 °C 70 °C
80 °C 80 °C
101 101
Rgate = 6.8 W Rgate = 6.8 W

100 100
102 102
Figure 4.2: IGBT switching loss energies - Comparison between analytical model and dou-
ble pulse data
method of least squares for both temperatures. The resulting parameters are summarized
in Table 4.1.
Switching loss model parametrization The loss coefficients of the switching loss model
are extracted from double pulse measurements, which were in-depth discussed in appendix
A.2. They have been conducted within a wide operation range that included dc-link voltages
58
4.1 Electrothermal Modeling of the Hybridpack2 Power Module
Table 4.2: Switching loss parameters of the HP2 based on double-pulse measurements
Parameters E0 K0 α β KT E0rec K0rec KTrec
Value 1.2 mJ 0.1 mJ A−1 1.75 0.82 µ
1 J K−1 0.5 mJ µ
4.4 J A−1 0.02 K−1
from 200 V to 400 V, currents from 20 A to 400 A, gate resistances of 2.2 Ω, 6.8 Ω and 15 Ω
and base-plate temperatures from −10 ◦C to 80 ◦C. The experimental extraction of the
device voltages and currents during the synthesized switching event and also the calculation
of the resulting switching energies is in-depth discussed in appendix A.2. The coefficients
of the switching loss models of the IGBT and the diode, which were introduced in 3.1.2,
are estimated with the method of least squares based on the obtained loss data. They are
summarized in Table 4.2. In Figure 4.2 the IGBT switching loss energies of the loss model
are depicted for a wide operation range in comparison to the experimental data obtained
with double-pulse tests. The comparison of the experimental data and the estimated loss
energies demonstrates that the proposed empirical loss model can estimate the measured
IGBT switching losses over a wide operation range with a maximum error of 10 % to 20 %.
The diode switching energy losses, which are illustrated in Figure 4.3, occur primarily
during the turn-on transition of the IGBT. They are significantly smaller than the IGBT
losses which makes their accurate measurement as well as the development of an accurate
model is far more difficult. However, deviations of the diode switching loss model do not
have a strong influence on the loss estimation of the diode, since the conduction losses of
the diode are much larger than its switching losses.
Discussion of the loss model accuracy Overall, the developed device loss model is ex-
pected to provide an accuracy of approximately ±20 %. An even more accurate model that
is valid over the entire operation range of the devices is difficult to obtain. This is because
a precise loss characterization is difficult [7, 46]. A calorimetric loss measurement, as il-
lustrated in [340], can improve the accuracy of the measurement. However, it requires an
enormous measurement effort to characterize a device with this technology over its entire
operation area in terms of current, voltage, gate resistances and temperature. An even
stronger practical limitation for a precisely calibrated device loss model is that the model is
only valid for one specific converter. Another power module, even if it is of the same type,
contains devices with slightly different characteristics due to the semiconductor manufactur-
ing process. Furthermore, if the power module is used in a different converter the resulting
commutation stray inductance differs. As a result, its loss characteristics will slightly devi-
ate. This means that a very precise loss model cannot be developed for normal applications,
because the individual calibration for each power module and converter is not economically
feasible.
4.1.2 Software Framework for Numerical Thermal Modeling

As a next step, the implementation of the finite volume method (FVM), which was intro-
duced in 3.2 for 3-D thermal modeling of power modules, is addressed. For this thermal
modeling process, a software framework has been developed in MATLAB as a part of this re-
59
Analytical loss model Double-pulse data

-10 °C 400 V -10 °C 400 V
10 1 0 °C 10 1 0 °C
200 V 200 V
1 °C 1 °C
10 °C 10 °C
20 °C 20 °C
30 °C 30 °C
32 °C 32 °C
40 °C 40 °C
Loss energy in mJ
Loss energy in mJ
50 °C 50 °C
60 °C 60 °C
70 °C 70 °C
80 °C 80 °C
10 0 10 0

10 -1 10 -1
10 2 10 2
-10 °C -10 °C
400 V 400 V
10 1 0 °C 10 1 0 °C
1 °C 200 V 1 °C 200 V
10 °C 10 °C
20 °C 20 °C
30 °C 30 °C
32 °C 32 °C
40 °C 40 °C
Loss energy in mJ
Loss energy in mJ
50 °C 50 °C
60 °C 60 °C
70 °C 70 °C
80 °C 80 °C
10 0 10 0

10 -1 10 -1
10 2 10 2
Figure 4.3: Diode switching loss energies - Comparison between analytical model and dou-
ble pulse data
search. It allows formulating a 3-D geometry in Cartesian coordinates and to define material
properties and boundary conditions. Based on this information it automatically calculates
the transient model equations of the corresponding 3-D thermal FVM model. It provides
the state-space model matrices A and B of the thermal model, introduced in (3.61), as
an output. The software implementation of the FVM algorithm is achieved in three steps,
which are illustrated in the following using the HP2 as an example.
• Heat transfer problem formulation

First, the heat transfer problem must be properly formulated. This means that the
geometry, the material properties, mesh sizes and boundary conditions of the heat
transfer problem must be defined. Since the algorithm is specifically designed to
generate a thermal FVM for power modules, first the depth and material properties of
each material layer must be specified. These properties are summarized for the HP2
60
Table 4.3: Lateral material layers for the thermal model of the HP2 power module
Material Depth in m µ kth in W m−1 K−1 Cth in J K−1 ρ in kg/m3
Silicon 67 130 700 2329
Sn965/Ag35 120 57 288 9000
Copper 300 400 385 8700
Al2 O3 350 24 880 880
Copper 300 400 385 8700
Sn965/Ag35 300 57 288 9000
Copper 8000 400 385 8700
power module in Table 4.3. The lateral layers are created along the horizontal y-axis.
Then, the geometry mesh lines in direction of the vertical axis, x-axis and y-axis, need
to be defined. The geometry mesh must be small enough to accommodate the smallest
geometrical constructions which shall be embedded in the model. This results in a
large quadratic solution space. Any volume of this solution space can be processed if
needed. It can either be deleted, its material properties can be changed, or it can be
defined as an area connected to a heat source. In a next step, the geometry mesh, which
was used to create the geometrical structure, can be refined to a simulation mesh that
defines the finite volumes for the simulation. If no explicit boundary conditions are
provided all exterior boundaries of the solution space are by default set to isothermal
boundaries. In a last step, any of these boundaries can be changed or other boundaries
inside the solution area can be introduced. To enable an efficient problem formulation,
a framework of functions has been developed that allows a straightforward and flexible
problem formulation of typical power module structures.
This heat transfer problem formulation is the only step that requires the interaction
of the user. All next steps are executed automatically by the program.
• Model creation
After the formulation of the problem, the solution space is created in an intermediate
step. For this purpose, large 3-D arrays are created, which represent the geometrical
and material properties of each solution volume (m,n,p). The structure of the arrays
enables to directly address the properties of each volume (m,n,p) by its geometrical in-
dices m, n and p. This direct addressability is very important for the fast computation
of the state-space equations for a large-scale problem in the next step.
This importance of direct addressability is emphasized by reviewing other modeling
approaches in which the direct addressability cannot be used, e.g. due to a complex
non-Cartesian geometry. For example, in [244] a thermal lumped parameter model for
an electric machine has been developed. Due to the complex structure of the machine
a direct addressability cannot be realized without strong limitations with respect to
the geometry of the model. As a result, in [244] the model construction is done for
each solution volume separately, such that all solution volumes must be identified one
by one. This process requires additional time leading to a total time of 15 min that
are required to create a model structure with 324 temperature nodes. However, for
the spatial thermal model of the power module, a model with significantly more than
61
Figure 4.4: Software created geometrical structure of the HP2
300 temperature nodes is envisaged. To avoid a time-consuming model construction,

it is therefore important to avoid any additional overhead. The direct addressability
of each solution volume is an important measure on this path.
After this computation step, the geometry of the created problem can be visualized
by the developed software framework. The visualized 3-D model structure of the
Hybridpack2 power module is depicted in Figure 4.4. Note that in this illustration
each of the 9142 depicted finite volumes reflects one temperature node, whose thermal
equivalent circuit was depicted in Figure 3.6.
• State space matrix derivation

In a last computation step, the state-space matrices of the spatially discretized heat
transfer problem are derived. First, the dimensions of the matrices A and B are
determined based on the temperature vector T and the loss vector Qloss . In a next step,
the coefficients of the discretized heat equation of each volume (m,n,p) are inserted
at the correct column and row of the matrices A and B to generate the full system
of equations that is given by (3.55) in chapter 3.2.2. This most important step is
implemented very efficiently, because all required information on each node and all its
neighbors are stored in the created arrays and are directly addressable. In addition
to the matrices, which are required to solve the heat transfer problem transiently,
matrices which allow calculating directly the stationary solution are determined.
After the system matrices have been created, they are used to create a state-space model
in MATLAB using the Control System Toolbox (CST). The CST allows naming all states,
inputs and outputs, such that arbitrary transfer functions and state-space models for sub-
models can be derived by specifying desired inputs and outputs. Thereby, the thermal model
of any desirable subsystem can be efficiently extracted. The realizable subsystems can have
inputs and outputs, which are either a subset of the existing inputs and outputs or a linear
combination of those. Finally, the CST can be used to discretize the thermal model using
the zero-order hold method discussed in 3.2.2.5 or to reduce its order using model reduction
techniques, as illustrated in 3.3.
62
Figure 4.5: Exemplary applications of the thermal modeling software
4.1.3 Flexible Application of the Thermal Modeling Software

The thermal modeling software was exemplarily introduced for the HP2 power module.
However, it is flexibly applicable for the thermal modeling of power electronic converter
systems. In the following, a few example applications are provided, which are depicted in
Figure 4.5, for which the thermal modeling software was used to derive 3-D thermal models.
• A transient thermal 3-D model was derived for the Hybridpack2 inverter module ex-
plicitly for this work.
• For a GaN-based electric-vehicle charger, which is presented in [270, 290], a thermal
model was developed to explore its thermal capability.
• Within the publicly funded project ”InTeLekt” [304] the thermal model of one half
bridge of a traction inverter was developed.
• For the thermal design of a dc-dc converter, which was presented in [275, 290], a
thermal model was developed for a SiC three phase power module.
• To investigate degradation effects based on the thermal impedance frequency response
function in [240], a thermal model of a buck converter with a TO274 Si device, intro-
duced in [241], was developed.
63
L
DA Tm+1,n,p+1conv
m+1,n,p R th
T
p+1
Dz
conv
SD Rth Tm,n,p+1Rconv
m,n,p th
ST T
Dzp
W D H conv
Rth Tm-1,n,p+1
Rth
conv
x Tm-1,n,p
SL
Dzp-1
conv
r Rth m+
1
Ta,ua m Dx
Dym Dx
Figure 4.6: Structure of the pin-fins (left) and FVM convection model (right)
Table 4.4: Geometry of the HP2 power module pin-fin heat sink
H D L W ST SL SD NL NT
8 mm 2.3 mm 190 mm 52 mm 1.6 1.4 1.6 50 12.5
Table 4.5: Properties of Ethylene-Glycol Water at 20 ◦C [226]

Solution kth in W m−1 K−1 ρ in kg/m3 η in mPa s Pr
50/50 0.36 1070 4 40
• A thermal model was developed for evaluation of thermal imbalance between the
devices of a 3-level neutral-point clamped (NPC) converter, introduced in [55].
This wide range of application shows that the thermal software framework is easily ap-
plicable to a wide range of typical power module geometries.
4.1.4 Convection Modeling

This section addresses the modeling of the convection interface of the HP2 power module,
which is a pin-fin heat sink depicted in Figure 4.1. The geometrical dimensions of a section
of the pin-fin heat sink are illustrated on the left side of Figure 4.6 and are summarized in
Table 4.4. It consists of a pin-fin array over a length L and a width W . It exhibits a number
of NT rows with NL pin fins along the stream. Each pin-fin has a height H and a diameter
D. The distances between the fins ST , SL and SD given are normalized by the diameter D.
The coolant that is used for this work is an ethylene-glycol water mixture, whose properties
at a temperature of 20 ◦C are summarized in Table 4.5.
The goal of the convection model is to reflect the impact of the pin fins on the average
heat flux outside the bulk of the heat sink over a range of flow rates ua of the coolant.
Therefore, the effective heat transfer coefficient heff (ua ), which characterizes the convection
process, must be derived for the given geometry and flow rates ua . It is used to calculate the
convective thermal resistance for each finite volume of the convection model with a surface
64
5
4.5
heff in W/(Kcm )
3
4
3.5
3
2.5
2 Analytical model
COMSOL
1.5
0 5 10 15 20
Flow rate ua in l/min
Figure 4.7: Simulation results of an analytical and an FEM convection model for the pin-
fin array of the HP2 power module characterized by Table 4.4 and Table 4.5
area ∆A = ∆xm · ∆z p according to
conv 1
Rth = . (4.1)
heff (ua ) · ∆A
All convection resistances are included as mixed boundary conditions in the FVM model
via (3.60), as discussed in chapter 3.2.2. The illustration on the right side of Figure 4.6
shows how the pin-fin geometry of the power module is replaced by convection resistances
in the model that take into account the convective heat flux from each finite volume to the
coolant.
To obtain an expression for heff (ua ), an analytical model and a finite element method
(FEM) model have been used in this work that were introduced in [312, 313]. The resulting
heat transfer coefficient heff that was obtained with these models for the HP2 pin-fin array
is illustrated as a function fo the coolant flow rate in Figure 4.7
The simulations indicate that for a flow rate of ua = 10 L/ min assumed for this work an
approximate convective heat transfer coefficient of heff = 4 W K−1 cm−3 should be used.
For further detailed information on the convection modeling of pin-fin heat sinks it is
referred to [164, 165].
4.1.5 Optimized Meshing of Power Module Structures

An important aspect in the spatial numerical simulation of a power electronic module is
the selection of an appropriate simulation mesh. If the mesh size is selected too small, the
discretized heat transfer problem will exhibit a lot of temperature nodes, each representing
one volume of the solution space. As a result, the computation will take a large amount of
time. However, if the mesh size is selected too large, the solution will have poor precision.
For this reason, it is crucial to find a good compromise in the selection of the mesh size.
To find this compromise, a small representative demo structure, very similar in its struc-
ture to the HP2 power module, has been created. Its geometry is depicted in Figure 4.8.
The 1 cm2 surface area of the silicon power device represents typical dimensions of an IGBT
chip. The lateral structure below the power device, which is summarized in Table 4.3, has
65
Silicon
Solder
Copper a
Aluminium Oxide
a
Copper
b
Solder
Copper
Figure 4.8: Demo geometry for mesh size selection with a = 1 cm and b = 3 cm
been set up to match the lateral structure of the HP2.

The width of the overall structure has been set to 9 cm2 in order to leave enough space
such that a typical heat spreading can evolve. The vertical mesh has been designed such
that the silicon, solder and oxide layer each exhibit three temperature nodes, whereas the
copper layers within the direct copper bond (DCB) exhibit four layers and the copper
layers forming the heat sink exhibit six layers. The thee temperature nodes in the material
layers with comparatively weak thermal conductivity shall guarantee that there are enough
temperature nodes to clearly indicate all temperature gradients. The copper layers exhibit
a comparatively high thermal conductivity. As a result, the copper layers in the DCB and
heat sink ensure heat spreading. To accurately model this heat spreading effect, additional
nodes are added to the copper layers in comparison to the other layers.
Evaluation of the horizontal mesh size First, a study is presented that investigates
the effect of different horizontal mesh sizes. In this study, a constant heating power was
injected equally distributed in the power device. The temperature distributions resulting
from different mesh sizes are depicted in Figure 4.11.
To provide an insightful comparison of the five simulations with different mesh sizes, the
temperature along the symmetry axis below the power device has been extracted. It is
plotted normalized by the heating power in Figure 4.10 together with the relative error of
all simulations in comparison to the simulation with the finest mesh.
From this study some important observations can be made. The finer the mesh is selected,
the smaller is the resulting relative error along the vertical axis. This shows that the error
converges towards zero for small mesh sizes. It can be seen that for a horizontal mesh
size between 5 mm and 3.3 mm the maximal simulation error along the symmetry axis is
kept below 5 %. This is an appropriate error bound, because other modeling inaccuracies
resulting from deviating material or geometry parameters, material voids and neglected
contact resistances result in similar or larger simulation errors.
Evaluation of the vertical mesh size In a second step, the effect of different vertical mesh
sizes is investigated. The horizontal mesh size has been set to 3.3 mm, as this is identified as
a mesh size with a tolerable error bound. In this study, the reference mesh that is used along
the vertical axis is identical to the mesh used in the previous study. To evaluate whether
66
Figure 4.9: 3-D evaluation of different horizontal mesh sizes
Number of vertical nodes Number of vertical nodes

3 3 4 4 4 3 6 3 3 4 4 4 3 6
Si Sd Cu Iso Cu Sd Cu Si Sd Cu Iso Cu Sd Cu
0.35 35
Mesh size Mesh size
10 mm 30 10 mm
0.3 5 mm 5 mm
3.3 mm 3.3 mm
25
Thermal impedance Z th in K/W
2.5 mm 2.5 mm
0.25 2 mm
20
Relative error in %
0.2 15
0.15 10
5
0.1
0
0.05
-5
0 -10
10-1 100 101 10-1 100 101
Y-axis distance in mm Y-axis distance in mm
Figure 4.10: Evaluation of different horizontal mesh sizes along the symmetry axis
more or less simulation nodes in vertical direction provide a better compromise, some nodes
are either taken away or added to each material layer.
The resulting 3-D mesh and temperature distribution is depicted in Figure 4.11. Again,
the temperatures along the symmetry axis below the power device have been extracted
and are plotted normalized with the injected power together with their relative error in
Figure 4.12. It can be seen that the relative error for the reference setup and also for
a slightly coarser mesh do not exceed an error bound of 5 %. As a result, the vertical
reference mesh is by far fine enough and could even by slightly coarsened.
Evaluation of mesh sizes for transient simulations Finally, the impact of different mesh
sizes is evaluated for thermal transients. For this reason, the thermal step response has
been extracted using various mesh sizes for the average device temperature and the average
substrate temperature. The resulting thermal impedances and the resulting relative errors
between each impedance with a different mesh size and the impedances with the finest
67
Figure 4.11: 3-D evaluation of different vertical mesh sizes

Number of vertical nodes in reference setup Number of vertical nodes in reference setup
3 3 4 4 4 3 6 3 3 4 4 4 3 6
Si Sd Cu Iso Cu Sd Cu Si Sd Cu Iso Cu Sd Cu
0.35 20
Change of Change of
vertical nodes vertical nodes
0.3 -2 -2
15
-1 -1
Ref Ref
0.25 +1 +1
Relative error in % 10
0.2
5
0.15
0
0.1
-5
0.05
0 -10
10-1 100 101 10-1 100 101
Y-axis distance in mm Y-axis distance in mm
Figure 4.12: Evaluation of different horizontal mesh sizes along the symmetry axis
mesh size have been plotted in Figure 4.13. It can be seen that there is nearly no benefit in
reducing the vertical mesh size. However, the horizontal mesh size must stay below 5 mm
to keep the relative error close to the 5 % bound.
As a result, a horizontal mesh size of 3.3 mm and a vertical mesh size of 3-4 temperature
nodes per material layer seem to provide reasonable results for the FVM model of IGBT-
based power electronic modules that have the presented lateral structure. The 3-D thermal
model of the HP2, which is used in this work, has been meshed with this knowledge, to
ensure that an error bound of 5 % due to the spatial discretization is not exceeded. This
resulted into the model structure for the HP2 that is illustrated in Figure 4.4 and Figure 4.14.
4.1.6 Compact State Space Modeling for 3-D Real-Time Models

With the developed thermal FVM modeling software and the knowledge about the appro-
priate meshing for typical IGBT-based power modules, a detailed 3-D thermal model of the
68
0.3
Horizontal mesh Vertical mesh
5 mm Original mesh
3.3 mm 1 additional vertical

0.25
2.5 mm node per layer
2 mm
0.2
Temperature node
Junction temperature
Substrate temperature
0.15
0.1
0.05
0
10-3 10-2 10-1 100
Time in s
15
Vertical mesh
Original mesh
1 additional veritcal
node per layer
Temperature node
Relative error in %
10 Junction temperature
Substrate temperature
Horizontal mesh
5 mm
3.3 mm
5 2.5 mm
0
10-3 10-2 10-1 100
Time in s
Figure 4.13: Transient evaluation of different mesh sizes
HP2 power module was developed. However, for real-time applications investigated in the
following parts of this thesis, an additional ultra-compact thermal real-time model is derived
from the detailed 3-D thermal model of the HP2. The temperature nodes that are included
in this compact model are illustrated in Figure 4.14 for one half bridge only, as all three
half bridges are constructed identically. In the following, the structure and development of
this model is discussed.
The compact thermal model of the HP2 allows the calculation of the spatial temperatures
at the most interesting nodes within the power module from a monitoring and reliability
perspective. These include the device temperatures T j , the temperature of the solder in-
terconnect below each device Tsd,up , the interconnect temperature between the DCB and
the base plate T sd,down below each device, the base plate temperature Tb and the module
temperature at the location of the negative temperature coefficient thermistor (NTC) TNTC .
69
AC
DC+ DC-
Si
Sd
Cu
Al2O3
Cu
Sd
Cu
H 2O
Temperature nodes of the thermal model
Device Area IGBTA DiodeA DiodeB IGBTB NTC
Device
Upper Sd Layer
Upper Cu Layer
Lower Sd Layer
Figure 4.14: Visualization of the HP2 power module elements that are included in the
thermal state-space model
All temperatures are concentrated in the following output vector of the thermal state-space
model (4.2).
T
T out = T j T sd,up T sd,down Tb TNTC (4.2)
The temperatures of all finite volumes of the 3-D power module model that belong to the
particular elements are averaged. A graphical illustration of all temperature nodes that are
averaged to the introduced temperature states is given in Figure 4.14. Note that the vector
components of (4.2) exhibit four elements structured according to (4.3), as these critical
components of the power module are evaluated below all four devices of a half bridge.
T
T x = TxIGBTA TxDiodeA TxIGBTB TxDiodeB (4.3)
The state-space model that calculates the output vector T out can be realized based on the
discrete time model (3.64) that has been developed in 3.2.2.5. Only the appropriate output
matrix C must be determined to select and average the desired temperature states of the
original model. The resulting state-space model is given according to (4.4).
T D (k + 1) = AD · T D (k) + BD · QD
loss
(k) T out (k) = C · T D (k) (4.4)
The temperature vector T D (k) represents the temperatures T m,n,p of all nodes throughout
70
Thermal impedance Zth in K/W

10-1
IGBT measurement
Diode measurement
IGBT datasheet
10-2 Diode datasheet
IGBT model
Diode model
10-3 10-2 10-1 100 101

Time in s
Figure 4.15: Comparison of the transient thermal impedances Zth (t) that are derived with
a model, via measurements and based on data-sheet information
the power module at discrete time steps k, whereas the loss vector QD
loss
(k), given by equation
(4.5), represents the losses of all IGBTs and diodes within one half bridge.
T
Qloss = P D IGBTA
loss = Ploss
DiodeA
Ploss IGBTB
Ploss DiodeA
Ploss (4.5)
The resulting model exhibits an ideal format to investigate the thermal characteristic of
the device and the solder layers during the operation of the power module in real-time.
However, the model structure must be truncated such that it can be used as a real-time
model to monitor the temperatures at critical spatial spots within the HP2 power module
during operation. The truncation of both the detailed and compact model of the HP2 is
discussed in section 4.1.8.
4.1.7 Experimental Thermal Model Validation

This section aims to experimentally evaluate the thermal model that is derived for the
Hybridpack2 power module. For this purpose, the transient thermal impedance Zth (t) is
extracted from the derived model and is compared with transient thermal impedance data
from a measurement and from the data sheet [107]. The transient thermal impedance
measurement was conducted with a test bench that is reviewed in appendix A.3.
The three transient thermal impedances Zth (t) of the IGBT and the diode are depicted
in Figure 4.15. It can be seen that the thermal impedance of the thermal model lies over a
wide frequency range between the thermal impedance obtained from the measurement and
from the data sheet. The model seems to provide good result, because the transient thermal
impedance measurement tends to underestimate the Zth (t) and the manufacturer tends to
provide a Zth (t) that is slightly overestimated. Reasons for the small differences between
model, data sheet and measurement results are deviations in the material or geometry
parameters, differences in the definition of the virtual junction temperature and limitations
of the measurement circuitry.
The first and most obvious source of deviations between the transient thermal impedance
71
from the model and from the measurement are modeling errors, e.g. deviations in the model
geometry, in the material properties of the power module or in the convection conditions. In
this context, it is important to mention that the electrothermal model of the power module
does not take into account nonlinearities, as this would lead to an enormous complexity in-
crease of the model. A second source of deviations is that the transient thermal impedance
of the model is calculated using the spatially averaged device temperature, whereas the
junction temperature is intrinsically measured in the distributed intrinsic region of the de-
vice. Thus, the result of both cannot be identical. This is a fundamental problem of the
comparability of temperature-sensitive electrical parameter (TSEP) based measurements
that is excellently addressed in [348]. A final source of errors lies in the transient thermal
impedance characterization procedure. The commutation of the heating current does not
occur instantaneously but requires a minimal commutation time. As a consequence, the
measured transient thermal impedance shows an error at small time constants and under-
estimates the static thermal resistance.
However, the fact that the transient thermal impedance of the model shows a deviation
of approximately 10 % to the measurement and the data sheet information underlines the
appropriate precision of the modeling approach.
4.1.8 Model Reduction via Singular Perturbation Approximation (SPA)

The singular perturbation approximation (SPA) method, which was introduced in chapter
3.3, is an efficient tool for the model-order reduction of the large-scale thermal models. In
the following, it is demonstrated how this method can be practically applied to reduce the
order of the two thermal models that have been derived via FVM for the HP2 power module,
whose properties and application areas are summarized below:
• Full 3-D thermal model of all temperature nodes
• 9142 spatially distributed output temperature nodes, depicted in Figure 4.4
• For the 3-D thermal simulation of the entire HP2 module
• Compact state-space model of selected 3-D distributed temperature nodes
• 14 output temperatures at critical spots of the HP2, depicted in Figure 4.14
• Real-time model for thermal monitoring and failure diagnosis
The two models have a significantly different number of output variables. Nevertheless,
each model exhibits the identical 9142 states and the same input matrix B and transition
matrix A. Based on the truncation of these models, it is exemplarily discussed, how thermal
models can be strongly truncated without losing the model precision required for specific
simulation and monitoring tasks.
Analysis of the model truncation error The balanced system equation given by (4.6)
with the order n can be truncated resulting in a reduced order system with the order r
according to chapter 3.3.

d θ1 Ã11 Ã12 θ1 B̃1
= + u (4.6)
dt θ2 Ã21 Ã22 θ2 B̃2
72
10 0
Original number of states n = 9142 10 2
10 -1
Relative truncation error e in %

Hankel singular values (HSV)
10 1
3.5 % error 50 states
10 -2

10 -3 0.35 % error 100 states
10 0
10 -4
Full model (9142 output variables) -1 Full model (9142 output variables)
10
Compact model (14 output variables) Compact model (14 output variables)
10 -5
20 40 60 80 100 120 140 20 40 60 80 100 120 140
System states States of the reduced model r
Figure 4.16: HSV plot for the full model and the compact model (left)
Relative truncation error as a function of the states r that remain after the
truncation process for the full model and the compact model (right)
The error, made by the truncation is bounded by the Hankel singular values (HSV) of the
truncated states according to (4.7), which is shown for example in [122].
n
!
X
||y − ỹ||2 ≤ 2 σi · ||u||2 (4.7)
i=r+1
Thus, a plot of the HSVs for the discussed thermal systems, which is depicted in the left
of Figure 4.16, provides insights in the options and limitations of the truncation process.
The HSV plot reveals that the energy transfers between all inputs and outputs of both
systems, which each exhibit 9142 states, are primarily realized via the first 10-100 states of
the balanced system representations. This result can be even better highlighted with a plot
of the relative truncation error ε(n) in Figure 4.16 (right). The relative truncation error,
given by (4.8), expresses the ratio between the truncated n − r HSVs and all n HSVs.
Pn
σi
ε(n) = Pi=r+1
n (4.8)
i=1 σi
A second important observation that can be made based on Figure 4.16 is that the compact
model, with just 14 output variables, requires significantly less states of the reduced order
model r to achieve a similar precision. If, for example, a relative error of 0.35 % should not
be exceeded, the full model requires a truncated model with 100 states whereas the compact
model only requires 24 states. If even a relative error of 3.5 % is tolerable, the full model
requires 50 states, whereas the compact model can be truncated to 14 states. Despite the
fact, that a model with more output variables requires more states for achieving a given
precision, the little amount of additional states that are required to compute a large-scale
(full) model is remarkable.
73
Thermal impedance |Zth(jw)| = |Tj()(jw)/Ploss(jw)| in K/W
10 -1
10 -2
10 -3
Model order Relative error Thermal impedance

10 -4
Original e = 0.0 % IGBT
34 states e = 0.035 % Diode
24 states e = 0.35 %
10 -5 14 states e = 3.5 %
10 -2 10 -1 10 0 10 1 10 2 10 3 10 4 10 5 10 6
Frequency in Hz
Figure 4.17: Comparison of the thermal impedance Zth (jω) of DiodeA and IGBTA for
different truncation orders
Frequency response function based analysis of the truncation error In the following,
the effect of the SPA on the dynamic and static characteristics of the compact model is
investigated. The findings for the investigation of the compact model can later be generalized
for the full model. First, the frequency response function (FRF) magnitude of the thermal
impedance Zth (jω) of the diode and the IGBT, which are defined according to (4.9), are
illustrated in Figure 4.17 for different truncation orders.
IGBT
TjIGBT (jω) Diode
TjDiode (jω)
Zth,j (jω) = IGBT Zth,j (jω) = Diode (4.9)
Ploss (jω) Ploss (jω)
The thermal impedances of the truncated models deviate from the thermal impedances of
the original model at high bandwidth. The deviation is visible as a constant magnitude for
high bandwidth that is caused by the introduction of the feed-through matrix D, which was
introduced by the SPA to maintain the dc-gain of the system. Note that if the balanced
truncation method (BTM) was used instead of the SPA, the magnitude of the truncated
model would continuously decay even when it deviates from the original model at high
bandwidth.
The frequency range in which the truncated model matches the original model depends
on the number of states of the truncated model. A higher order model allows the precise
modeling over a larger frequency range than a lower order model. As a result, the SPA tries
to eliminate the states that model the high bandwidth behavior of the system and maintains
the states that model the medium and low bandwidth system behavior.
In the previous discussion of the SPA, the relative truncation error (4.8), was used as
a precision metric. However, this is a theoretical approach and does not intuitively relate
to the accuracy of the model over the frequency range. To overcome this limitation, a
74
link between the relative truncation error and the accuracy of the truncated model in the
frequency domain is created in the following. In a first step, the thermal impedances of
the original and the truncated model, that were plotted in Figure 4.17, are evaluated and
compared to the relative truncation error depicted in Figure 4.16. The evaluation reveals for
model orders of 14, 24 and 34 that ten additional states lead to a reduction of the relative
truncation error by a factor of 10. Furthermore, they increase the bandwidth, in which
the truncated model matches the original model, by two decades. This can be observed
in Figure 4.17 for a model orders of 14, 24 and 34, which achieve accurate behavior for
approximate bandwidths of 100 Hz, 10 kHz and 1 MHz. Comparing both metrics suggests
that a reduction of the truncation error by a factor of 10 increase the bandwidth, in which
the truncated model matches the original model, by two decades at least for this example.
Obviously, for most thermal simulations and real-time applications an accurate model
bandwidth up to 100 Hz or 1000 Hz is sufficient. That is why a model with 34 states
must not be considered further. However, this simple analysis only evaluates the impact
of the SPA on the accuracy of the junction temperature estimation. Additionally, also the
truncation errors of the other temperature nodes of the model introduced in Figure 4.14
need to be investigated. The FRF is not an optimal metric to evaluate the accuracy of
the models, as it uses a logarithmic scale making the analysis of the model differences over
a wide frequency range difficult. Thus, the estimation accuracy (EA) is introduced in the
following.
Estimation accuracy (EA) based analysis of the truncation error EA, which is given
according to (4.10), is the ratio of the temperature at a specific location in the power
module that is estimated by the truncated model and the temperature at the same location
determined by the original model.
−1
T̂x (jω) T̂x (jω) Tx (jω)
EA(jω) = = IGBT · IGBT
(4.10)
Tx (jω) Ploss (jω) Ploss (jω)
The EA has been plotted in Figure 4.18 for the thermal model of the power module that
is truncated to either 14 or 24 state. It shows the temperature accuracy of the IGBTA
junction, the DiodeA junction, the solder layer between the devices and the DCB (SdUp),
the solder layer between the DCB and the heat sink (SdDown) and the temperature at the
NTC over a wide bandwidth. The excitation of the temperature nodes is only due to losses
in the IGBTA device. Note that the temperatures and the excitation have been selected
representatively. Thus, any other combination of excitation and output temperature variable
will result in an estimation accuracy that is similar to one of the presented examples.
Ideally, the estimation accuracy exhibits unity gain magnitude and zero phase lag. In
that case the truncated model perfectly matches the original model. If the model and the
truncated model start to deviate, a magnitude and phase error can be observed. Thus,
the EA allows the effective analysis of the truncation error for a given input and output
of the system over a wide bandwidth on a linear scale. However, it should be considered
that the EA of a temperature location that is only weakly excited by an input starts to
deviate significantly at high bandwidth. As the weak excitation only leads to very small
temperatures, it is tolerable to abort the EA at a given evaluation limit. To determine this
75
arg(Tx(jw)/Tx(jw)) in ° |Tx(jw)/Tx(jw)| in pu
States: n = 14
2
0
30
-30
10-2 10-1 100 101 102 103
Frequency in Hz
arg(Tx(jw)/Tx(jw)) in ° |Tx(jw)/Tx(jw)| in pu
2 States: n = 24
0
30
-30
10-2 10-1 100 101 102 103
Frequency in Hz
10-1
(jw)| in K/W
10-2 IGBTA
DiodeA
IGBT
|Tx(jw)/PlossT
SdUp IGBTA
Evaluation
10-3 SdUp DiodeA
limit
SdDown IGBTA
SdDown DiodeA
NTC
10-4
10-2 10-1 100 101 102 103
Frequency in Hz
Figure 4.18: Estimation accuracy of truncated thermal models with 14/24 states evaluated
at various nodes illustrated in Figure 4.14 for loss injection at IGBTA (top)
Frequency response plot of the identical temperature nodes for loss injection
at IGBTA (bottom)
limit, the FRF of the analyzed temperature nodes is plotted below the EA plot. In this
work the EA plot has been aborted when the FRF has decayed to 0.001. That means if
an excitation of 1 kW only results in a tiny temperature magnitude of 1 K, a possible error
between the original model and the truncated model is considered as negligible.
The EA plot shows that within a bandwidth of 10 Hz all temperatures can be estimated
with a truncated model of 14 states with a maximum magnitude error of 30 % and a max-
imum phase error of 15°. If a model with 24 states is chosen, the temperature estimation
76
is very accurate up to 1 kHz with a maximum magnitude error of 5 % and a maximum

phase error of 5°. As a result, the model with 14 states and a relative truncation error of
ε = 3.5 % provides good estimates within a bandwidth of 10 Hz and moderate estimates
within a bandwidth of 200 Hz. This model is an ideal candidate for real-time applications,
for example in thermal monitoring structures that are used to estimate the temperature at
3-D distributed locations inside the power module. Because of its comparatively small size,
the model can be implemented and executed with an appropriate update frequency on many
signal processors with limited computational power. If a more accurate model is required,
that allows temperature estimation within a wider bandwidth, the model with 24 states is
an excellent candidate.
Finally, a model for the time efficient simulation of the temperature distribution within
the entire power module must be selected. In this case the full model with 9142 output
temperatures is used. The previous analysis of the FRF and EA of the compact model
indicates that a relative truncation error of 0.35 %, which was achieved with 24 states in case
of the compact model provides satisfying results. Thus, the large-scale model is truncated
such that the same relative truncation error of 0.35 % is obtained. This results in a reduced
order model with 100 states. This should ensure that all 9142 temperature nodes of the
3-D thermal model have an appropriate accuracy up the frequency range between 100 Hz
and 1 kHz. The bandwidth in which this model is accurate should allow the calculation
of the transient 3-D temperature distribution within the power module that is caused by
load cycles and the sinusoidal excitation of the fundamental current. However, the model
will not be able to predict the thermal cycles that are caused by the current ripple at the
switching frequency of the devices. The performance boost of the thermal simulation that
can be achieved with this truncated model in comparison to the original model with 9142
states is analyzed in section 4.3.2.
Model reduction of linear parameter varying models For some electrothermal simula-
tions of power modules it is essential to model a variation of the coolant flow rate. This
results in a change of the convection heat transfer coefficient and consequently leads to a
linear parameter varying model. However, the model reduction via balanced truncation
or SPA is also feasible for such a linear parameter varying model. This has been studied
exemplarily for an electric machine in [246].
4.1.9 Lifetime and Degradation Modeling

The fundamental techniques for lifetime and degradation modeling were in-depth introduced
in the previous chapter 3.4. However, for the HP2 power module a descriptive aging model
is used in this work that was presented by the power module manufacturer Infineon in [299].
As it exhibits some specific variations to state-of-the-art models, it is briefly introduced in
the following.
The degradation model of the HP2 that is presented in [299] is based on power cycling data
and passive thermal cycle data, whose derivation was discussed in 3.4.2.2. Consequently,
two different degradation models have been introduced in [299] for the HP2. A power
cycling based degradation law takes the degradation mechanisms of the bond wires, the
77
Table 4.6: Coefficients of the empirical aging model from [299]

a1 a2 b1 b2 Ea,1 Ea,2 kb c
5.4 · 1014 2 · 109 7 3.7 0.215 eV 0.215 eV µ
86 eV/K 4.5
metallization and the die attach solder into account. A passive cycling based degradation
law takes the degradation of the DCB to base plate solder interface into account.
The power cycling based degradation law estimates the cycles to failure based on the
junction temperature swings that are caused by power cycling. This part of the model is
given according to (4.11) and (4.12).
 −b1
a1 · ∆Tj

· exp Ea,1
max · f (ton ) if ∆Tj ≤ 45 K
1K k T
Nf = −b2 b j (4.11)
a2 · ∆T

1K
j
· exp Ea,2
k b Tjmax · f (t on ) if ∆Tj > 45 K

2.25
 if ton < 0.1 s
ton −0.3
f (ton ) = 1.5 s
if 0.1 s ≤ ton ≤ 60 s (4.12)

0.33 if ton > 60 s

The aging model is based on the CIPS2008 model that was introduced in (3.97). To
achieve a better accuracy at small and large thermal cycles, different coefficients are used
for thermal cycles of ∆Tj ≤ 45 K and ∆Tj > 45 K. Furthermore, the effects of the heating
time ton are included by (4.12). This takes into account the duration of plastic deformation
due to temperature gradients and the creep of the die-attach solder.
The passive cycling based degradation law evaluates the thermal cycles of the power
module case temperature Tcase and is given according to (4.13). It estimates the cycles to
failure Nf as a function of the power module case temperature cycles ∆Tcase .
−c
∆Tcase
Nf = 25000 · (4.13)
80 K
The simulations, which are carried out in this thesis, assumed a constant coolant tempera-
ture. Hence, the degradation of the solder interface between DCB and base plate is not an
issue. For this reason, (4.13) is not further utilized.
The empirical aging laws for the junction and for the case temperature are illustrated in
Figure 4.19. Their coefficients have been extracted via the method of least squares from [299]
and are summarized in Table 4.6. It can be seen from Figure 4.19 that temperature cycles
are by far the dominant driving factor for the aging of the power module. The aging process
is slightly accelerated by a higher maximum temperature and significantly accelerated by
cycles of higher heating time. However, both factors are by far not playing a role that is as
dominant as the depth of the thermal cycle ∆Tj .
78
4.2 Simulation Environment
1016 2.5 1012

T max
j
= 50 °C
2
T max = 100 °C
1014 j
1010
Number of cycles to failure Nf
Number of cycles to failure Nf

T max
j
= 150 °C 1.5
1012
108
f(T on) in pu
1
1010
106
8
10
0.5
6 104
10
104 102
102 100 102 102
a) Thermal cycle TJ in K b) Ton in s c) Thermal cycle TC in K
Figure 4.19: Empirical lifetime law according to [299] a) Cycles to failure due to junction
temperature cycles , b) Aging acceleration factor including heat-up times, c)
Cycles to failure due to case base plate temperature cycles

This section introduces a simulation environment that generates electrical load profiles such
as occur in traction applications. It is used in this work to derive load profiles for the elec-
trothermal simulation of the HP2 power module. The simulation environment requires the
speed and slope information of a mission profile as an input and calculates the operational
variables, e.g. currents and voltages, that are required to drive a vehicle with a specified
drive-train.
The input data of the simulation environment are the following:
• Velocity profile v(t)

• Slope profile α(t)
Based on this information the following operational variables are computed by the simulation
environment:
• 3 phase current (amplitude Î and instantaneous current i(t))

• 3 phase voltage (amplitude Û and instantaneous voltage u(t))
• Duty cycles d(t)
• Modulation index M (t)
• Fundamental frequency f (t)
• Phase angle φ(t)
• DC-link voltage udc (t)
79
• Switching frequency fsw (t)

• Gate resistances Rg (t)
The entire simulation environment is implemented as a discrete time simulation in MAT-

LAB Simulink with a constant sampling time of Ts = 1 ms. The advantage of a discrete
time simulation is the fast computation time in comparison to a continuous time simulation
with similar average step size ∆t ≈ Ts .
In the following, the structure of the discrete time simulation frame work is introduced.
First, the vehicle and driver model are discussed. Then the drive train model including the
electric motor and the control algorithm are briefly described. Finally, the mission cycles
that are used as an input of the simulation environment are discussed.
4.2.1 Vehicle and Driver Model

The complete structure of the vehicle and driver simulation is depicted in Figure 4.20. Based
on the velocity v and slope vector α, which are provided as an input from the mission cycle,
it computes the torque reference Telref and the angular velocity ωr for the electrical drive
train, whose structure is discussed later.
Driver model The driver model consists of a motion controller with a proportional and
integral feedback loop on the vehicle velocity. This is a typical state-of-the-art approach to
model the behavior of a driver [274]. The controller amplifies the error between the reference
velocity v ref and the actual velocity v. The feedback gains have been designed according to
[191] via equation (4.14) and (4.15) using the effective mass m of the vehicle such that they
have a bandwidth of fp and fi respectively.
Kp,v = 2π · fp · m (4.14)
Ki,v = 2π · fi · Kp,v (4.15)
The bandwidths are determined according to (4.16) based on the torque dynamics of the
electrical drive train which are characterized by the time constant τT .
1 fp
fp = and fi = (4.16)
2π · τT 10
Thereby, it is guaranteed that the motion controller bandwidth does not exceed the band-
width of the torque modulation process and the entire system simulation exhibits appropri-
ate damping. In order to avoid overshoots, the integration process of the integrated feedback
loop is deactivated if the torque requirements of the driver model cannot be met.
Vehicle model The vehicle model receives the force command F ref from the driver model.
It determines the resulting torque Telref command via the gain Kg = rw · kg as a function of
the gear ratio kg and the wheel radius rw . The torque command Telref is first limited to the
maximum feasible torque of the drive train Telr . In a second step, it is low-pass filtered with
τT such that it does not exceed the bandwidth of the electrical driver train. This command
80
a
cos(a) mg
Tsz-1
Ki,v
1 - z-1 Stop Fa
Low-pass
Electrical T v
v ref F* T* (1- e-Ts/t)z-1 T ref Teref e Fd 1 Tsz-1 wr
Kp,v Kg Drive Kg-1 Kg-1
1 - z-1e-Ts/t m 1 - z-1
Train Tb
v T max 1 rc A
T max wr w sign(v) v 2
2
Tbref Mechanical
Brake
Figure 4.20: Block diagram of the driving cycle simulation
81
filtering is used to ensure that the torque command Telref , which is passed to the electrical
drive train, is feasible.
During motor operation the electrical drive train realizes the complete torque command.
However, during breaking operation it is supported by a mechanical breaking system. After
max
the maximum permissible electrical breaking torque Tel,b is reached, any further torque
command is passed to the mechanical breaking system that is considered as an ideal com-
ponent in this simulation. The torque command is processed by the electrical drive train
model and the mechanical break and passed to the wheels of the vehicle that transfer the
torque into a traction force. The load forces are primarily the dragging force Fd and the
inclination force Fi . These are given by equation (4.17) and (4.18).
1
Fd = · ρcW Av 2 · sgn (v) (4.17)
2
Fi = mg · sin (α) (4.18)
More details about this aspect can be found in [49, 109]. The dragging force Fd is a function
of the density of air ρ, the dragging coefficient cW , the front surface area of the vehicle and
the velocity of the vehicle v. The inclination force depends on the mass of the vehicle m,
the gravitation constant g and the cosine of the inclination angle α. Note that the slip
dynamics of the tire have not been modeled in this work to keep the simulation compact.
The traction force and load forces, which are applied to the vehicle, sum up and accelerate
the vehicle with the effective mass m. Note, that according to [80], the effective mass includes
the mass of the vehicle mveh as well as the moment of inertia of the drive train Jdrive and
the wheel Jw which is reflected via the wheel radius rw and the gear ratio kg .
Jw Jdrive
m = mveh + + (4.19)
2
rw (rw · kg )2
The resulting velocity of the vehicle v is passed to the driver model, whereas the angular
velocity is passed to the electrical drive train model.
Example: Trolleybus The vehicle that was selected as an example for this work is a
trolleybus, the Trollino 12 from Solaris, which is exemplarily depicted in Figure 4.21. The
vehicle data of the Trollino 12 is summarized in Table 4.7.
Typical modeling approaches for a trolleybus or battery electric bus can be found in
[126] [30, 109]. For this work, the geometrical measures of the bus were extracted from
[302], information on the drive train and the operational parameters are based on [51] and
properties of the wheels were estimated based on [193]. The effective mass m was estimated
according to (4.19) based on the wheel inertia Jw , that has been extracted from [318],
and the maximum permissible mass of the trolleybus. Based on the effective mass of the
trolleybus and the time constant of the drive train the feedback gains of the driver model
were selected using (4.14) and (4.15). These are summarized in Table 4.8.
82
©2011 Szater
Figure 4.21: Trolleybus ”Trollino 12” from Solaris, Photo from [296]
Table 4.7: Vehicle model - Data extracted from [51],[193],[109] and [302]
Vehicle dynamics Trolleybus ”Trollino 12”
Manufacture Solaris
Mass of the loaded bus m 16 000 kg
Length 12 m
Width 2.55 m
Height 3.41 m
Drag area Ad 8.7 m2
Drag coefficient cw 0.5 N m−1 s
Wheel radius rw 0.45 m
Wheel inertia Jw 0.51 m
Gear ratio kg 0.167
Rated torque Telr 1000 N m
Peak speed v max 70 km h−1
max
Electrical breaking torque Tel,b 500 N m
Torque time constant τ 0.2 s
4.2.2 Drive Train Model

For the realistic simulation of the electric loading, which would occur if a Trollino 12 trol-
leybus was operated with a HP2 power module, a synthetic machine model is derived based
on [224, 225]. This is necessary, because the trolleybus Trollino 12 is typically operated with
a drive train that exhibits a dc-link voltage of 600 V and an induction machine with a rated
voltage of 400 V. However, in this work it is the goal to investigate the performance of the
HP2, which needs to be operated at 400 V dc-link voltage. As the HP2 does not properly
scale to the original machine in the Trollino 12, a synthetic machine model is derived in ap-
Table 4.8: Driver model

Velocity feedback gain Kp,v 67.8 kN m−1 s
Position feedback gain Ki,v 102.3 kN m−1
Position feedback bandwidth fp 1.2 Hz
Position feedback bandwidth fi 0.24 Hz
83
800
Maximum torque in Nm
Stator curent in A
1000 600
400
500
200
Q-axis current limit
D-axis current reference
0 0
0 1000 2000 3000 0 1000 2000 3000
Rotor speed in 1/min Rotor speed in 1/min
Figure 4.22: Current limits and maximum feasible torque in field weakening operation
pendix A.5 whose parameters are summarized in Table A.4. The synthetic machine model
and the HP2 model create an appropriate virtual drive train that can be used to derive
representative load profiles.
The dynamic modeling and control of the induction machine is realized based on [50,
80, 166, 223]. A classical indirect rotor field orientation (IFO) control algorithm is used
that operates the induction machine within the base speed range at rated flux. Above the
base speed range, a field weakening control algorithm is implemented following [166]. The
resulting torque-speed curve as well as the operation point d-current and the q-current limits
are illustrated in Figure 4.22.
4.2.3 Mission Cycles

Finally, realistic mission cycles for the trolleybus simulation are selected. According to [115],
typical mission cycles that aim to emulate representative driving conditions in urban areas
for heavy-duty vehicles and engines are:
• FIGE (Forschungsinstitut für Geräusche und Erschütterungen) cycle

• European transient cycle (ETC)
• Braunschweig cycle
• Paris ADEME cycle
• Lublin cycle
The FIGE cycle and the ETC are cycles that were developed for emission testing of general
heavy-duty vehicles and engines. Only the Braunschweig cycle, the Paris ADEME cycle and
the Lublin cycle have been developed for realistic emulation of bus loads. The Braunschweig
cycle has been developed based on the driving conditions in German cities in the 70s. Thus,
it does not provide representative mission cycle data for nowadays. The Paris ADEME cycle
has been developed based on a bus line in Paris that exhibits a very high number of stops
with very short driving sequences and harsh accelerations and decelerations. The so called
”Lublin cycle” was developed in Lublin, Poland, based on actual data from a trolleybus line
within a research project, whose results are published in [277].
For this work, the Paris and the Lublin cycle have been chosen, because they represent two
typical application areas for a trolleybus: The operation in a metropolitan area is represented
84
4.3 Simulation of the Power Module over Mission Cycles
70
Paris cycle
60 Lublin cycle
Speed in km/h
50
40
30
20
10
0
0 200 400 600 800 1000 1200 1400 1600 1800
Time in s
Figure 4.23: Lublin cycle according to [277] and Paris cycle according to [115]
Table 4.9: Lublin cycle characteristics Table 4.10: Paris cycle characteristics
Distance 12.4 km Distance 5.677 km
Duration 1400 s Duration 1898 s
Number of stops 7 Number of stops 40
Average speed 28.8 m s−1 Average speed 15.5 m s−1
by the Paris cycle, whereas the operation in an average European town is represented by
the Lublin cycle. The speed profiles of both cycles are illustrated in Figure 4.23 and their
characteristics are summarized in Table 4.9 and Table 4.10.

Finally, the introduced components of the system level simulation and the electrothermal
model are combined in a simulation environment in MATLAB Simulink. A state block
diagram that illustrates the simulation framework is depicted in Figure 4.24. The simulation
is fed with the Paris and the Lublin mission cycle as examples to evaluate the electrothermal
stress that occurs over these mission profiles. Therefore, firstly, the combined models of the
driver, the vehicle and the drive train are fed with the mission cycle information to compute
ref
rst
iconv Electrothermal Model
vref Tm
Mission Driver ref
Control Tbreak
aslope -
Cycle Udc fsw Rgate
Tspatial
v qload
rst Loss Ploss Thermal
Vehicle Tm Drive dconv Model Model Tj
Vehicle and Drive Train Model Tj
Figure 4.24: Electrothermal simulation of power modules over a mission cycle
85
the electric load profile. In a next step, the electric load profile is fed into the loss model
that estimates the device losses of the power module. Finally, the device losses are used
to determine the transient 3-D thermal temperature distribution within the power module.
The key parameters of the simulations, whose results are discussed in the following, are
summarized in Table 4.11.
Table 4.11: Simulation properties and parameters

Solver Fixed-step
°
Time step 1 ms
Slope αslope 0
DC-link voltage udc 400 V
Switching frequency fsw 10 kHz
Gate resistance Rg 6Ω
Initial temperature Tinit 40 ◦C
Coolant temperature Tf 40 ◦C
4.3.1 Drive Train Simulation

The following section presents the electrothermal simulation of the trolleybus operated on
the Lublin cycle. Analogously, within this work the Paris cycle has been simulated. However,
to keep the discussion short, the electrothermal simulation results of the Paris cycle are not
discussed in this section. Nevertheless, the simulation results of the Lublin and the Paris
cycle are analyzed in the next section to estimate the number of cycles to failure and to
empirically characterize the degradation that occurs in case of both cycles.
Mechanical load profile In the upper trace of Figure 4.25 the mechanical load profile,
which has been derived via the simulation environment, is illustrated. The speed of the
trolleybus is controlled by the driver model to follow the reference speed provided by the
mission cycle. Note that the torque of the drive train is limited by the maximum acceleration
torque of 1000 N m. During breaking, the maximum electrical torque that is applied is
500 N m. Any additional breaking torque Tm that is commanded by the driver and illustrated
in Figure 4.25 is realized by the mechanical breaking system.
Electrical load profile The machine and control model, which were derived in 4.2.2, cal-
culate the steady-state and transient electric load variables. First, the steady-state load
variables are discussed, which are illustrated in the second and third trace of Figure 4.25.
The stator current amplitude trace reveals that the induction motor is operated with a mag-
netizing current of 220 A, that is commanded during base speed operation. During peak
torque, the stator current amplitude is increased up to a maximum current of 650 A. In
the base speed range, the phase voltage amplitude grows nearly proportional to the speed
of the machine due to the dominant back-emf voltage. Above the base speed, the field
oriented control algorithm drives the machine into field weakening. It ensures that in all
operation modes a maximum terminal voltage of 180 V is not exceeded such that the HP2
power module with a 400 V dc-link voltage can source the commanded PWM voltage. As
86
200 1000
Torque T in Nm
Torque
Speed in m/s
Vehicle speed
0 0
-200 -1000
0 200 400 600 800 1000 1200 1400
Voltage amplitude in V Current amplitude in A
800 160
Excitation frequency
Frequency in Hz
600 Torque 120
400 80
200 40
0 0
0 200 400 600 800 1000 1200 1400
200 Load angle 200
Load angle in °
Voltage
100 100
0 0
0 200 400 600 800 1000 1200 1400
Phase r
500 Phase s
Current in A
Phase t
-500
21.5 22 22.5 23 23.5 24

100
Phase r
Voltage in V
Phase s
Phase t
0
-100
21.5 22 22.5 23 23.5 24
Time in s
Figure 4.25: Electromechanical load resulting from the Lublin cycle
a consequence, the voltage amplitude remains constant above the base speed of 60 Hz. The
excitation frequency is nearly proportional to the machine speed, as the slip frequency is
small in comparison to the machine speed. A rapid alternation of the power factor reflects
how the drive train accelerates and decelerates the trolleybus along the driving cycle.
The transient voltages and currents are depicted for a 2.5 s excerpt of the simulation in
the two last traces of Figure 4.25. Initially, dc currents are applied to the induction motor
to maintain the flux in the direct axis of the motor. As soon as the torque command is
87
applied, a quadrature current is commanded leading to an augmented current amplitude

and the acceleration of the motor. The electrical frequency increases due to the commanded
slip and the speed of the motor. This results in a back-emf voltage that is reflected as a
speed dependent terminal voltage. After a short acceleration, the machine is operated briefly
at constant speed. As there is not torque applied during this time, the current amplitude
decays nearly entirely to its original value that is required to maintain the flux in the direct
axis of the machine.
4.3.2 Thermal Simulation

The electrical load profile that exhibits the operational current irstconv and the duty cycles
rst
dconv of each phase, the dc-link voltage udc , the switching frequency of the converter fsw , the
gate resistances of each device Rg and the junction temperature of all devices T j is passed
to the electrothermal model of the power module, as illustrated in Figure 4.24. First, the
electrical load profile is processed by the loss model. It determines either the dynamic or
the averaged losses of the devices and passes them to the 3-D spatial thermal model of the
power module. The instantaneous and averaged losses as well as the spatial power module
temperatures that result from the electric load profile are depicted in Figure 4.26. Note that
the location of the temperature nodes, which are discussed in the following, were illustrated
in Figure 4.14.
Device loss and junction temperature It can be observed that the losses show the form
of sinusoidal half-waves. This occurs, because either IGBTA and DiodeB or IGBTB and
DiodeA are conducting the load current depending on the polarity of the current. Mean-
while, the other device pair does not conduct current and, therefore, does not dissipate
any losses. Consequently, the instantaneous junction temperatures reflect these loss pulsa-
tions at the electrical excitation frequency, which are particularly strong at low excitation
frequencies. At higher excitation frequencies, this effect decays because of the thermal low-
pass characteristic of the power module. The averaged losses over one excitation period,
which is also shown in Figure 4.26, do not exhibit this loss pulsation and reflect only the
averaged dynamic behavior of the losses and temperatures of the power module. The re-
sulting averaged temperature traces are located exactly in the center of the instantaneous
temperature pulsation. In Figure 4.26, at very low excitation frequencies the averaged losses
are not computed anymore but are replaced by the instantaneous losses. This is important
because at dc- excitation the averaged loss model does not provide insightful information,
as it assumes a sinusoidal excitation.
Temperature at critical material interfaces The temperature at the upper solder layer
of the DCB is only slightly reduced in comparison to the junction temperature. This is
because the upper solder layer is located directly below the devices with only a thin solder
layer in between. In contrast, the temperature of the lower solder layer of the DCB is
significantly reduced and exhibits much less temperature variations at excitation frequency.
These differences occur due to the thermal impedance of the DCB. At the base plate, as well
as at the NTC, the temperature level is further decreased and the pulsation of the losses
88
1500
Losses in W
Model Device loss

Average model
1000 IGBTA IGBTA
DiodeA DiodeA
500 IGBTB
DiodeB
0
21 21.5 22 22.5 23 23.5 24 24.5 25
Temperature in °C
Average model
Model Junction
80
IGBTA IGBTA
DiodeA DiodeA
60 IGBTB
DiodeB
40
21 21.5 22 22.5 23 23.5 24 24.5 25
Temperature in °C
Model Upper solder layer

Average model
80
IGBTA IGBTA
DiodeA DiodeA
60
IGBTB
DiodeB
40
21 21.5 22 22.5 23 23.5 24 24.5 25
Temperature in °C
Average model
Model Base plate solder layer
80
IGBTA IGBTA
DiodeA DiodeA
60 IGBTB
DiodeB
40
21 21.5 22 22.5 23 23.5 24 24.5 25
Temperature in °C
NTC
80
Base plate
60
40
21 21.5 22 22.5 23 23.5 24 24.5 25
Time in s
Figure 4.26: Excerpt of the instantaneous and averaged loss- and temperature-profile of
the HP2 power module operated with the Lublin cycle
can hardly be observed. The reason for this is the enormous heat spreading effect of the
copper base plate.
89
600
Losses in W
Device loss
400 IGBTA
DiodeA
200
0
0 200 400 600 800 1000 1200 1400
Temperature in °C
80 Junction
IGBTA
DiodeA
60
40
0 200 400 600 800 1000 1200 1400
Temperature in °C
80 Upper solder layer

IGBTA
DiodeA
60
40
0 200 400 600 800 1000 1200 1400
Temperature in °C
80 Base plate solder layer

IGBTA
DiodeA
60
40
0 200 400 600 800 1000 1200 1400
Temperature in °C
80 NTC
Base plate
60
40
0 200 400 600 800 1000 1200 1400
Time in s
Figure 4.27: Averaged loss- and temperature-profile of the HP2 power module over the
Lublin mission cycle
Analysis of the entire mission cycle via averaging The presented simulation results only
cover a small excerpt of the driving cycle. Note that it is easily possible to compute the
losses and temperatures over the entire driving cycle in very short time, as shown in the
90
Figure 4.28: Simulation of the 3-D and 2-D temperature distributions of the Hybridpack2
power module at tsim = 50 s
next section. The instantaneous temperatures and losses are difficult to analyze for a long
simulation time. Thus, for the entire driving cycle only the averaged losses and temperatures
are shown in Figure 4.27. The resulting loss and temperature profiles in this figure allow
the analysis of the load dependent thermal behavior of the power module. It can be seen
that the acceleration and breaking torque causes loss and temperature fluctuations during
the motion of the trolleybus. However, the strongest loss and thermal cycles occur due to
the stops of the vehicle. During this time, the maximum acceleration or deceleration torque
is applied which requires to inject large currents into the induction machine that heat up
the power module. Furthermore, the excitation frequency is zero such that the current
remains constant and is either conducted by one IGBT and its freewheeling diode or the
other IGBT and its freewheeling diode. The device pair that conducts current generates
extensive losses, whereas the other device pair operates lossless. This operation mode can
only be observed in Figure 4.26, which shows the instantaneous power module temperatures
at one acceleration instant exemplarily.
Overall, the temperatures that were determined with the presented compact state space
model are well suited for the lifetime and degradation estimation of the power electronic
module. This lifetime and degradation estimation is conducted based on the obtained data
in the course of this chapter.
Simulation of complete 3-D temperature distribution The data that were presented
in Figure 4.26 and Figure 4.27 only provide thermal information about a few locations of
interest within the power module. However, the developed spatial electrothermal model is
able to compute the transient 3-D temperature distribution of the entire power module over
long-term mission cycles in very short time. The 3-D and 2-D temperature distributions of
the power module are visualized as an example for the time instant tsim = 50 s in Figure 4.28.
91
Table 4.12: Simulation performance of different truncated models

Scenario (model) Original A) B) C)
System states 9142 100 100
Output states 9142 9142 100
Storage in GB 95.6 95.6 1.1
Calculation time in min 1450 19.5 0.5
Simulation: Time step Ts = 1 ms, duration t = 24 min

Hardware: Intel i7 CPU, 18 GB RAM
The 3-D temperature distribution shows that the three phases of the power module exhibit
different temperature distribution because of the 120° phase shift of the three-phase load
current. With the 2-dimensional (2-D) temperature distribution plot, the heat spreading
mechanism can be analyzed. The high thermal conductivity of the copper in the DCB and
the base plate ensure that the heat flux does not only occur vertically but also laterally.
This results in a very good heat dissipation throughout the power module and therefore a
small thermal resistance of Rth ≈ 0.1 K W−1 for the power devices.
4.3.3 Performance Analysis of the Simulation

After the discussion of the simulation results, the impact of the SPA based model truncation
process on the simulation speed is discussed. Therefore, in Table 4.12 the data storage areas
and computation times are summarized for three simulation scenarios of the HP2 power
module that use a sampling time of 1 ms and a mission cycle with a duration of 24 min:
A) 3-D Simulation of all 9142 temperature nodes without applying model reduction tech-
niques
B) 3-D Simulation with all 9142 temperature nodes with a truncated model of 100 states
C) Simulation of 100 arbitrarily selected 3-D distributed temperature nodes
For the comparison, the computation time for the truncation process that is applied in the
second and third simulation scenario is not included. This procedure takes approximately
1-2 hours in case of the hardware listed in Table 4.12 for a thermal system with 9142 states.
However, this procedure must only be carried out once for a specific power module geometry
before various simulations can be conducted.
The comparison between A) and B) shows, that the model reduction process allows a
tremendous speed up in simulation speed from 1450 min to 19.5 min for the simulation of
the entire module with all temperature states. This is because, as discussed in 4.1.8, the
entire power module can be simulated with a state space model that exhibits 100 states
in sufficient precision. Consequently, for the simulation process itself only the 100 pseudo-
temperature states must be calculated.
If one is only interested, for example, in 100 temperature nodes or spatially averaged
temperatures throughout the power module and does not require the remaining ones, the
computation time and the required data storage capability can even be further reduced. In
92
4.4 Degradation Analysis and Lifetime Estimation
this case of scenario C) a truncated model with 100 states and 100 output temperatures
can be used that results in a total simulation time of half a minute and a major reduction
of the required data storage capability from 95.6 GB to 1.1 GB. Note that even with this
efficient simulation approach, the reconstruction of the temperatures at all 9142 original
temperature nodes is possible in a post processing step with the identical prevision that
was obtained by scenario B). This can be achieved based on the known transformation
matrix, which relates the 100 pseudo temperature states to the original states. Overall,
the presented electrothermal simulation of power electronic modules that was achieved by
the combination of the FVM and model reduction techniques achieves enormous simulation
speeds in comparison to other state-of-the-art approaches.

The following section investigates the derived electrothermal loading of the HP2 power
module to analyze the degradation and estimate the number of mission cycles to failure.
For this investigation the process that is illustrated in Figure 4.30 and was in-depth described
in chapter 3.4 is used.
First, the junction temperature profile is categorized with the rain-flow counting (RFC)
algorithm to determine the number of cycles N that occur at a particular cycle depth ∆Tj ,
maximum temperature Tmax and rise time T rise . In a next step, the categorized cycle data
is evaluated with the empirical lifetime model introduced in equation (4.11). It determines
the number of cycles to failure Nfi of each categorized cycle i as well as the corresponding
degradation ∆η i = 1/Nfi . In a final step, the number of mission cycles to failure Nf,cycle is
determined by linear damage accumulation.
Note that in this work, for simplicity, only thermal cycles that are caused by heat dissi-
pation within the devices are analyzed and discussed. Therefore, the assumption is made
that the temperature of the coolant is regulated and remains constant throughout the load
profile. However, it should be pointed out that strong passive thermal cycles of the coolant
temperature can seriously degrade the power module [52, 81] and must be considered in all
applications that do not exhibit a regulated cooling circuit [81].
4.4.1 Categorization of Thermal Cycles

The various thermal cycles that occur during trolleybus operations with the Lublin cycle
and the Paris cycle were categorized with respect to the depth of the thermal cycle ∆Tj , the
maximum cycle temperature Tmax and the thermal excitation frequency f . The categorized
cycles of the most severely stressed devices, which are the IGBTA in case of the Paris
cycle and the IGBTB in case of the Lublin cycle, are illustrated in the upper four plots of
Figure 4.29. To allow a better visualization of the thermal cycle categorization a logarithmic
scale to a base of 2 has been used in Figure 4.29. It can be seen that there is a huge number
of cycles whose cycle depth is between 1 K and 10 K with a maximum cycle temperature
between 50 ◦C and 60 ◦C. There are only very few cycles with large cycle depths of Tj > 30 K,
which consequently exhibit a high maximum junction temperature. The analysis of the cycle
frequencies shows that nearly all small thermal cycles are spread widely over the frequency
93
Lublin cycle Paris cycle

16384
Cycle occurances within mission profile

Maximum temperature T j max in °C
110 110
4096
100 100 1024
90 90 256
80 80 64
70 70 16
60 60 4
50 50 1
40 40
0 10 20 30 40 50 60 70 0 10 20 30 40 50 60 70
16384
Cycle occurances within mission profile

18 18
4096
16 16
Frequency f in Hz
1024
14 14
12 12 256
10 10 64
8 8
16
6 6
4
4 4
2 2 1
0 0
0 10 20 30 40 50 60 70 0 10 20 30 40 50 60 70
25.0000
Maximum temperature T j max in °C
110 110 6.2500
100 100
Degradation in %
1.5625
90 90 0.3906
80 80
0.0977
70 70
0.0244
60 60
0.0061
50 50
0.0015
40 40
0 10 20 30 40 50 60 70 0 10 20 30 40 50 60 70
25.0000
18 18
6.2500
16 16
Degradation in %
1.5625
14 14
Frequency f in Hz
12 12 0.3906
10 10
0.0977
8 8
0.0244
6 6
0.0061
4 4
2 2 0.0015
0 0
0 10 20 30 40 50 60 70 0 10 20 30 40 50 60 70
Temperature cycle Tj in K Temperature cycle Tj in K
Figure 4.29: Number of categorized thermal cycles obtained from RFC algorithm (upper
four plots) and resulting degradation (lower four plots)
94
Nf Nf
Tj
Rainflow DTj Model-based Linear Nf,cycle
Counting Tj max Degradation Damage
t Algorithm Evaluation Dh Accumulation
ton
Figure 4.30: Estimation of the number of mission profiles to failure and the degradation
caused by individual cycles
10-6 10-5
105 8 8
Lublin cycle (IGBTB) Lublin cycle (IGBTB)
Paris cycle (IGBTA) Paris cycle (IGBTA)
7 7
104
Number of cycles to failure N f
Accumulated degradation
6 6
Degradation in pu
3 5 5
10
4 4
2
10
3 3
1 2 2
10
1 1
100
0 0
0 10 20 30 40 50 60 0 10 20 30 40 50 60
Thermal cycle Tj in K Thermal cycle Tj in K
Figure 4.31: Degradation caused by cycles of a specified cycle depth ∆Tj
range. However, the few large thermal cycles are primarily cycles in the very low frequency
range and thus occur over a longer period of time and exhibit long rise times T rise .
4.4.2 Categorization of Cycle-based Degradation

In a next step, the thermal cycles in each category are evaluated with respect to the degra-
dation that they cause. This is done following the principles of linear damage accumulation
that were discussed in the previous chapter. The degradation caused by each cycle category
is normalized with respect to the degradation that is caused by the entire mission profile.
This makes it possible to identify how much each sub-cycle contributes to the degradation
and to identify the cycles that dominate the degradation process. The results are depicted
in the lower four plots of Figure 4.29 as 2-D histograms. Another perspective on the same
data is provided in Figure 4.31 that illustrates the number of cycles and the resulting degra-
dation for the different thermal cycle depths, independent of the cycle frequency and the
maximum temperature.
It can be seen that few large thermal cycles, most of them exhibiting a rather long du-
ration, dominate the degradation process. In contrast, the high number of small cycles
contributes only slightly to degradation. Furthermore, Figure 4.29 reflects that the thermal
cycles that exhibit a low cycle depth and a high frequency, which are the cycles that are
caused by the excitation frequency of the current, have nearly no impact on the degrada-
95
tion. However, this does not mean that the degradation can be estimated based on the
averaged temperature traces, that do not include the effect of the excitation frequency, al-
though suggested in many life time studies of power modules for electric and hybrid vehicles
applications [67, 158, 299, 301]. Indeed, it is important to apply the RFC algorithm to the
instantaneous temperature data, because the averaged temperature data heavily underesti-
mates the temperature peaks that occur typically when vehicles start to accelerate or are
about to stop. These temperature peaks are caused by the high phase currents that are
commanded to realize a desired large torque at standstill while the excitation frequency
is zero or very small. Only during operation at higher excitation frequencies above 20 Hz,
e.g. in grid applications, thermal cycles at the excitation frequency can be neglected, such
that the instantaneous and averaged temperature data provide the same results, which is
supported by the discussion in [52].
4.4.3 Lifetime Estimation

The degradation data for all devices is accumulated over all cycles that occur in case of the
Paris and Lublin cycle as illustrated for the most severely stressed devices in Figure 4.31.
Based on the accumulated degradation over one mission profile, the number of mission cycles
to failure Nf,cycle can be determined. The resulting number of mission cycles to failure for
each device within one converter half bridge are summarized in Table 4.13 for the Lublin
cycle and in Table 4.14 for the Paris cycle. Furthermore, Table 4.13 and Table 4.14 provide
Table 4.13: Degradation of the trolleybus operated on the Lublin mission cycle
Mission cycles to failure Degradation at end-of-life

Device A B Device A B
IGBT 102 230 75 400 IGBT 74 % 100 %
Diode 375 500 689 560 Diode 20 % 11 %
Table 4.14: Degradation of the trolleybus operated on the Paris mission cycle
Mission cycles to failure Degradation at end-of-life

Device A B Device A B
IGBT 31 740 38 500 IGBT 100 % 82 %
Diode 208 080 143 540 Diode 15 % 22 %
information about the degradation of each device that is reached when one device is fully
degraded according to the empirical lifetime modeling approach. From the results it can
be seen that the number of cycles to failure of the power module for the two specified load
profiles is limited by the IGBTs. In case of the Lublin cycle, IGBTB is the most severely
stressed component that determines the failure of the power module after 75400 mission
cycles according to the empirical lifetime model. In case of the Paris cycle, the other IGBT,
IGBTA, is the most severely stressed component that results in the failure of the power
module after 31740 cycles. The other IGBTs experience slightly less stress in both cases.
96
Consequently, at the failure of the power module the state of degradation of these com-
ponents is at 74 % and 82 %. The electrical phase information has the most impact on the
stress distribution between the two IGBTs within a half bridge. At the initial acceleration
phase as well as at the final deceleration phase, depending on the phase information, one
or the other IGBT conducts the current and consequently experiences the highest thermal
stress.
The diodes are significantly less degraded than the IGBTs. This is because if the com-
manded breaking torque exceeds a threshold of 500 Nm a mechanical breaking system sup-
ports the breaking process. Consequently, the diodes, which experience the most thermal
stress when power is regenerated from the machine during a breaking process, are only de-
graded by 11 % to 22 % when the end-of life of the power module is reached. Consequently,
in the discussed application the diodes are not stressed such that they become reliability
critical components. However, if the mechanical breaking system would only support the
breaking process at a higher threshold or if the trolleybus would not exhibit any mechanical
breaking system, the diodes would be stressed more severely such that their degradation
can easily become an important issue.
After this discussion, it must be pointed out that the obtained lifetime data must not be
treated as accurate information, because the lifetime model as well as the linear damage
accumulation exhibit a limited accuracy. Thus, the lifetime law can only be used to identify
the magnitude of lifetime that is achievable with one component or another. Furthermore, it
can be used to compare the magnitude of lifetime that can be achieved with one or another
control method.
4.4.4 Opportunities for Active Thermal Cycle Reduction

After the analysis of the thermal cycles and the resulting degradation that occur during the
load cycle of a trolleybus, opportunities for active thermal cycle reduction are discussed.
The degradation that is caused by the cycles at excitation frequency is relatively small.
For this reason, an active thermal cycle reduction of the cycles at excitation frequency,
as it was proposed in [199], will not lead to a noticeable reduction of degradation. As a
consequence, the active manipulation of the averaged power module temperatures, which has
been firstly suggested in [328, 329], seems to be more promising compared to a manipulation
of the instantaneous temperature.
Cycle analysis To understand the key characteristics of the cycles that cause the dominant
degradation, the 20 individual cycles causing most of the power module degradation over a
mission profile are illustrated in Figure 4.32 for the Lublin and the Paris cycle. Note that
the degradation and the accumulated degradation have been normalized with respect to the
complete degradation that occurs for the given cycle. Consequently, the total accumulated
degradation that is reached for both cycles is 100 %.
It can be seen from Figure 4.32 that the individual six largest cycles cause 75 % of the
degradation in case of the Lublin cycle and 45 % of the degradation in case of the Paris
cycle. This happens although their cycles depth is not much larger than the cycle depth of
the following cycles. The reason for this is the power law characteristic of the aging law.
For most dominant cycles, the rise time T rise has nearly no influence on the degradation
97
Accumulated degradation in %
0.25
Degradation in pu
Lublin cycle
0.2 100
Paris cycle
0.15 75
0.1 Degradation 50
Accumulated degradation
0.05 25
0 0
2 4 6 8 10 12 14 16 18 20
Individual cycles
Tj in K
50
Lublin cycle
40 Paris cycle
Thermal cycle
30
20
10
0
2 4 6 8 10 12 14 16 18 20
Individual cycles
Maximum temperature in °C
120
Lublin cycle
100 Paris cycle
80
60
40
2 4 6 8 10 12 14 16 18 20
Individual cycles
600
Lublin cycle
Rise time Trise in s
Paris cycle
400
200
0
2 4 6 8 10 12 14 16 18 20
Individual cycles
Figure 4.32: Degradation of the most severe individual thermal cycles of IGBTA
behavior, because the rise time of nearly all cycles is far above the saturation level of the
aging model, that was given by (4.12).
Consequently, it seems to be most promising to apply active thermal cycle reduction
techniques to reduce the cycle depth ∆Tj of the dominant cycles. In particular, a reduction
below the corner point of the cycles-to-failure curve, which is located at ∆Tj ≈ 45 K as
depicted in Figure 4.19, is promising. This is because below the corner point even small
cycle reductions lead to a significant reduction of degradation. If the six dominant cycles
98
can be reduced by approximately ∆Tj = 10 − 15 K, they reach the cycle depth of the
remaining cycles that are illustrated in Figure 4.32. For obtaining an even further thermal
cycle reduction in that case, it is also important to reduce the amplitudes of the cycles that
only modestly impact the degradation.
Furthermore, it can be extracted from this analysis that a modest reduction of most of
the illustrated 20 cycles already has the potential for a significant lifetime enhancement.
Therefore, an active thermal cycle reduction must not necessarily reduce strong cycles sig-
nificantly, since even a small reduction of 5-20 % already leads to a strong extension of the
power module lifetime.
Time domain analysis In a next step, the time domain characteristics of four exemplary
thermal cycles (Cycle 2, 4, 7 and 10), which occur during the Lublin cycle at IGBTA and
were depicted Figure 4.32, are investigated. According to Figure 4.32, Cycle 2 causes 16 %
90
IGBTB 46
Temperature Tj in °C
Cycle 2 42
80 Cycle 7
3735
70
Cycle 4 Cycle 10
60
50
40
400 450 500 550 600 650 700
Time in s
Figure 4.33: Time domain data of the IGBTA junction temperature indicating three cycles
that impact degradation
of the degradation of the power module. The Cycles 4, 7 and 11 cause 10 %, 4 % and 2 % of
the power module degradation. These four cycles cover the range of typical thermal cycles
that have an impact on the lifetime of the power module. From the markings in Figure 4.33
that indicate the rise time of the four cycles, it can be seen that Cycle 2 connects the initial
valley and the highest peak of the data trace. This cycle is extracted by the RFC algorithm
as a dominant cycle, because it is resulting in the largest stress-strain hysteresis.
During Cycle 2 four local maxima occur. However, its cycle depth of ∆Tj = 46 K is
only defined by the last peak. Consequently, it is important to understand why the last
temperature peak is reaching towards such a high temperature level. The reason for this
is the combination of a large phase current and a small excitation frequency, which always
occurs at the final breaking sequence of the trolleybus: The large phase current creates
high losses at a low excitation frequency range, in which the thermal impedance of the
power module is high. This situation results in large temperature peaks. As a result, it
is important to consider measures that reduce the temperatures during the final breaking
sequence of the trolleybus. One option, which is proposed in literature and addressed later in
this work, is the reduction of the pulse-width-modulated (PWM) switching frequency when
the excitation frequency is low. The other cycles, Cycle 4, 7 and 10, that are highlighted in
Figure 4.33, result from the first, second and third temperature peak and the consecutive
99
temperature valleys. The temperature peaks and valleys are either caused by operation with
little torque or operation with extensive torque.
A reduction of all four discussed cycles can be addressed by increasing the temperature
when the temperature level is low and decreasing the temperature when the temperature
is high. For that purpose, ideally a different design of the heat sink, e.g. a heat sink with
enhanced thermal capacitance, could be used. Alternatively, active thermal cycle reduction
techniques can be potentially developed that emulate the behavior of a heat sink with a
larger virtual thermal capacitance. The emulation of a larger virtual thermal capacitance
can be achieved by creating more device losses at low temperatures and reducing the device
losses at high temperatures. Such a concept of a virtual heat sink is proposed for the active
thermal cycle reduction in chapter 7.
4.5 Summary
This chapter demonstrated, with the HP2 power module as an example, that by combining
FVM and model reduction techniques ultra-compact and time-efficient spatial thermal mod-
els for power electronic modules can be developed. The accuracy of the developed models
has been in-depth analyzed by utilization of system theoretical accuracy metrics, which are
based on the HSV of the model, and physics based metrics like the estimation accuracy that
allows a model evaluation in the frequency domain. With these techniques, 100 arbitrary
3-D distributed temperature nodes of the thermal model, which consists of approximately
10000 temperatures nodes, can be accurately simulated over 24 min at a sampling time of
1 ms within a computation time of half a minute on a normal computer. The electrothermal
simulation was coupled with a simulation of a trolleybus drive train that was developed in
this chapter to create realistic thermal load profiles of the HP2 power module. Based on
the thermal load profiles, the lifetime of the HP2 power module was computed with the
degradation modeling techniques presented in this work. The estimated lifetime as well as
the degradation that is caused by specific time domain characteristics were in-depth ana-
lyzed. This analysis reflects that to increase the lifetime of the power module it is most
important to reduce the 10 to 20 most dominant thermal cycles. Two measures have been
identified as suitable for this task. For the reduction of the temperature peaks at very low
speed and high torque, it is an option to temporarily reduce the PWM frequency. To reduce
the load dependent cycles, active thermal cycle reduction techniques can be developed that
emulate the behavior of an improved virtual heat sink with larger thermal capacitance than
the physical power module.
100
5 Thermal Monitoring
This chapter presents methods for the thermal monitoring of power electronic modules.
The presented thermal monitoring solutions allow the real-time estimation of power module
temperatures and losses [93, 310, 324] based on sensor information and thermal models. The
temperature estimates are effective control variables for thermal management algorithms
that prevent thermal overload [44] and unbalanced operation of the power devices [99] or
even reduce the thermally induced strain by active thermal cycle reduction [10, 27, 213].
Furthermore, they can be processed by active thermal cycle counting algorithms to achieve
a more accurate lifetime prediction [84, 216] based on descriptive lifetime models.
This chapter starts by introducing a new technique for junction temperature sensing of
IGBTs. It estimates IGBT junction temperature based on the gate plateau voltage that is
identified as a temperature-sensitive electrical parameter (TSEP) and the load current. Af-
terwards, various monitoring solutions for power electronic modules are introduced that are
able to estimate the 3-D distributed temperature and device losses. They try to effectively
use the electrothermal real-time models that were developed in this work, NTC temperature
as well as junction temperature that can be obtained with the presented technique or other
TSEPs, e.g. [19, 25].
Important aspects of this chapter have been investigated within the following publications
[308–311, 315, 316] and the master thesis of Alexander Gospodinov [119] that was co-
supervised as a part of this dissertation.
5.1 Junction Temperature Estimation via Gate Plateau

Voltage Sensing
The state-of-the-art review of this thesis identified various limitations of existing TSEP-
based junction temperature estimation techniques. To overcome some limitations, a new
method for in-situ high-bandwidth junction temperature estimation of IGBTs is introduced.
The method is based on the acquisition of the gate plateau voltage during turn-on, which
can be directly related to the junction temperature. The physical mechanisms leading to
the temperature sensitivity of the gate plateau voltage are discussed and a rigorous sensi-
tivity analysis of the gate plateau voltage is conducted. Thereby, the maximal estimation
error is determined and the suitability of this method for various devices and applications
is evaluated. Finally, a sensing circuitry is presented that allows accurate gate plateau volt-
age sensing in every switching period as well as an easy integration into the gate driver.
The performance of the proposed method is experimentally demonstrated with the sensing
circuitry on a double pulse test bench over a wide operation range.
The entire analysis and all experiments are based on the HP2 from Infineon [107], which is
equipped with four paralleled Trench Fieldstop IGBT3 chips. The power module is operated
101
Table 5.1: Converter properties Table 5.2: Measurement equipment

Gate voltage Gate resistance DC-link Differential probe (uce /uge ) Shunt (ic ) Oscilloscope
15 V/−10 V 2.2 Ω/6.8 Ω 400 V TT-SI 9101/TT-SI 200 SBNC-2-01 HDO6104
Ls id Cd
D uT
ice c iloadsL
igc
ugc Cgc D
Udc
i g Rg Lg Rg,int
g uce
Du uge Cce
Cge e
ud um
Leg
Figure 5.1: Equivalent circuit of an IGBT half bridge with parasitics
with a dual channel scale-2 push-pull gate driver from Concept [1]. The properties of the
converter and the measurement equipment are summarized in Table 5.1 and Table 5.2.
5.1.1 Gate Plateau Voltage
First, the key mechanisms that lead to the gate plateau voltage at turn-on of the IGBT are
reviewed and an analytical expression for the gate plateau voltage is developed.
Therefore, the turn-on process of the IGBT is reviewed. The equivalent circuit of the
IGBT, including its parasitic elements required to understand the turn-on process, is de-
picted in Figure 5.1. In Figure 5.2 and Figure 5.3 the time trace and operational trace of
the IGBT during turn-on are illustrated.
Initially, during the interval A, the IGBT is turned off and the load current is flowing
through the freewheeling diode D. The turn-on process is initiated at the beginning of
interval B by changing the gate driver output voltage Ud from −10 V to 15 V. As a result,
the gate current ig charges the gate capacitance Cge leading to a rising gate voltage uge ,
which can be observed via um during time interval B in Figure 5.2. Note that the parasitic
inductance Lg has a negligible voltage drop. The voltage drop at the internal resistance
Rg,i = 0.5 Ω is small but will be analyzed later. When the gate voltage uge exceeds the
threshold voltage Uth of the IGBT, the collector emitter current ic rises as a function of the
102
5.1 Junction Temperature Estimation via Gate Plateau Voltage Sensing
500
i c in A, u ce in V
400
300
200
100 Current ic
Voltage uce
0
20 A B C D E
i g in A, u m in V
10
0
Current ig
Voltage um
-10
0 1 2 3 4 5 6 7 8 9 10 11
Time in µs
Figure 5.2: Turn-on behavior of the HP2 power module (Rg = 6.8 Ω and Tj = 80 ◦C)
IGBT output characteristic IGBT transfer characteristic

450 900
5V
Uge = 8.7 V Junction temperature

Collector-emitter current I ce in A
Collector-emitter current I ce in A
400 800
Uge = 1
0 °C
350 700 30 °C
Uge = 8.5 V Irr 60 °C
300 600 90 °C
E D 120 °C
250 Uge = 8.3 V 500
150 °C
200 400
150 C Uge 300

Uge = 7.8 V
100 200
50 Uge = 7.3 V 100
0 0
0.5 1 1.5 2 400 450 5 6 7 8 9
Collector-emitter voltage U ce in V Gate-emitter voltage U ge in V
Figure 5.3: Turn-on trace (left) and IGBT transfer characteristic (right) of the HP2
gate voltage uge according to the device equation (5.1).

(
Kn (Tj ) · (uge − Uth (Tj ))2 if uge > Uth (Tj )
ic = (5.1)
0 if uge ≤ Uth (Tj )
The device current is dependent on the threshold voltage Uth and the transconductance
gain Kn which are sensitive to the junction temperature Tj . Note that for the typical
operation of IGBT power modules it is a viable assumption that the parasitic commutation
inductances are small enough such that they have a negligible impact on the device current
ic but create a transient voltage if the current ic changes. As a consequence of the rising
device current, the load current commutates from the diode to the IGBT. After the entire
load current commutated from the diode to the IGBT, the diode still conducts current in
103
inverted direction for a small time interval until all diode charge carriers have recombined.
This results into a transient over-current Irr in the IGBT, referred to as a reverse recovery
current. The gate voltage uge also shows a transient overshoot during the occurrence of the
reverse recovery current, because it always has to be large enough to conduct the device
current according to the device equation (5.1).
After the charge carriers in the diode have recombined, the diode does not conduct current
anymore and a voltage can rise across the diode capacitance Cd . At the same time, the
voltage across the IGBT must decline. The voltage across the capacitance Cce can decline
easily, because it is short-circuited by the IGBT. However, the voltage across the gate-
collector capacitance Cgc , often referred to as Miller capacitance, can only be reduced by
the gate current ig . During the discharge interval of the miller capacitance Cgc the gate
voltage uge must stay constant at the level Up , according to (5.2). This ensures that the
load current Ice can flow continuously through the IGBT.
s
Ice
Up (Tj ) = + Uth (Tj ). (5.2)
Kn (Tj )
The constant voltage level Up (Tj ) is a TSEP due to the temperature sensitivity of the thresh-
old voltage Uth (Tj ) and the transconductance gain Kn (Tj ). By sensing this gate plateau
voltage Up (Tj ) and the device current Ice , the junction temperature can be estimated, which
is illustrated in the following.
5.1.2 Basic Principle of Temperature Estimation

In this section a model that describes the temperature behavior of the gate plateau voltage
Up is derived and the underlying physical mechanisms are analyzed. Afterwards, the tem-
perature estimation process is discussed at the system level to identify all quantities which
impact the temperature estimation.
5.1.3 Temperature Characteristics of the Gate Plateau Voltage

The gate plateau voltage Up (Tj ) can be parameterized according to (5.2) based on the
threshold voltage Uth (Tj ) and transconductance gain Kn (Tj ), which both change with the
junction temperature Tj of the device. In the literature, which discusses IGBT models [54,
256], [130], the temperature behavior of the transconductance gain and the threshold voltage
is modeled with empirical equations (5.3) and (5.4).
Uth (Tj ) = Uth0 − hT · (Tj − 300K) (5.3)

q
300K
Kn (Tj ) = Kn0 · (5.4)
Tj
The threshold voltage Uth (Tj ) dominates the temperature behavior of the gate plateau
voltage Up (Tj ). It exhibits a linear temperature characteristic according to (5.3) that decays
with hT = 6 − 9 mV K−1 . The temperature characteristic of the transconductance gain
Kn (Tj ) (5.4) depends on the coefficients Kn0 and q and is opposed to the temperature
104
Table 5.3: Temperature parameters of the IGBTs of the HP2 power module
Kn0 Uth0 hT q
2 −1
93.40 A/V 7.14 V 7.13 mV K 1.52
characteristic of the threshold voltage. It reduces the temperature sensitivity of the gate
plateau voltage Up , especially at high device currents Ice .
This effect can be observed in the transfer characteristic of the device, which is depicted
in Figure 5.3. The transfer characteristic provides the relationship between the gate plateau
voltage Up , the device current Ice and the junction temperature Tj that is utilized in this
method to estimate junction temperature. It exhibits a high temperature sensitivity at
low and medium currents, whereas the temperature sensitivity decays for high currents and
is minimal for the rated operational current of the power module, which is approximately
500 A.
5.1.3.1 Model Parameter Extraction

The temperature model parameters Uth0 , Kn0 , hT and q have been extracted for the IGBTs
within the Hybridpack2 power module based on double pulse measurements of a tempered
power module. For the parameter extraction the device was turned on with a range of
currents Ic and temperatures Tj while the measurable gate plateau voltage Um was recorded.
To accurately determine the plateau voltage Uge , the voltage drop at the internal gate
resistance ∆U = Rg,i · ig was determined based on the gate current ig and an internal gate
resistance estimate R̂g,i and subtracted from Um . Finally, the parameters were determined
based on the resulting data using the method of least squares. The obtained parameters
are summarized in Table 5.3 and were used to plot the transfer characteristic in Figure 5.3.
Note that the device dependent properties Uth0 and Kn0 differ from one IGBT to another
because of variations in the doting of the silicon and the manufacturing process. For this
reason, a calibration measurement, based on double pulse testing or alternatively with curve
tracers at some sample points, is unavoidable.
5.1.3.2 Analysis of Physical Mechanisms

In the following the physical mechanisms which lead to the temperature characteristics of
the threshold voltage and the transconductance gain are discussed.
Threshold voltage First, the temperature characteristic of the threshold voltage Uth is
examined. According to [28] and [278] the threshold voltage Uth of an IGBT consists of four
voltage components as shown in (5.5).
Uth = Usemi + Uox − Uox,charge + Ums (5.5)
The semiconductor voltage Usemi is required to drive the channel of the IGBT into strong
inversion, such that it becomes conductive. The oxide voltage Uox is the voltage, which is
applied across the gate oxide capacitance. The work-function difference voltage Ums results
105
Table 5.4: Properties of the Infineon SIGC100T65R3EA IGBT3 chip [2]

Parameter Variable Value
Boltzmann constant kb 8.617 × 10−5 eV
Elementary charge qe 1.602 × 10−19 C
Natural permittivity ε0 8.85 × 10−14 F cm−1
Channel doping Na 2 × 1017 cm−3
µ
Effective density of states ni0 3.34 × 10−19 cm−3
Oxide thickness tox 0.11 m
Oxide permittivity εox 3.8 ε0
Silicon permittivity εs 11.8 ε0
Gate surface charge per gate area Nss 4.285 × 1011 m−1
Polysilicon gate doping Ngate 4.64 × 1010 cm−3
Channel aspect ratio Z/L 5000
Current gain (approximated) αpnp 0.2
Inversion layer mobility at 300 K µn,i,0 600 cm2 /V/s
from the different Fermi levels of the metal and the semiconductor. The oxide charge voltage
Uox,charge must be applied to overcome the effect of the charges trapped within the gate oxide.
All voltage components can be determined according to the equations (5.6) to (5.9).

2kb T Na
Usemi = log (5.6)
qe ni
s
tox Na
Uoxide = 4εs kb T Na log (5.7)
εox ni
qe Nss tox
Uox,charge = (5.8)
εox

kb T Na
Ums = log (5.9)
qe Ngate
One important physical parameter required to calculate the voltages is the intrinsic carrier
concentration of Silicon ni . It is determined according to [278] with equation (5.10) and
depends on the energy gap of silicon Eg given by (5.11).
1.5

T qe Eg
ni = ni0 · exp − (5.10)
300 2kb T
T2
Eg = 1.16 eV − 70.2 meV/K · (5.11)
T + 1108 K
The remaining parameters, which are required to determine the voltage components, are
listed in Table 5.4. Their parametric values have been first extracted based on a Spice
model [2] from the Hybridpack2 IGBT chips. Afterwards, the doping concentrations, ox-
ide thickness and current gain were slightly adapted based on the temperature coefficients
summarized in Table 5.3 to match the experimentally investigated power module.
106
10 16 1200
10
U th
U oxide 14 1000
8 10
U semi
in cm 2/(Vs)
U ox,charge 800
Voltage in V
n i in cm -3
6 12
U ms 10
600
4 10
10
ni
400
2 8
10 200
0 6 0
10
-50 0 50 100 150 200 -50 0 50 100 150 200 -100 0 100 200
Temperature in °C Temperature in °C Temperature in °C
Figure 5.4: Temperature characteristics of the threshold voltage components, the intrinsic
carrier concentration ni and the inversion layer mobility µni
To analyze the temperature behavior of these four voltage components, they have been
plotted over the temperature in Figure 5.4. It can be seen that the oxide voltage Uoxide dom-
inates the threshold voltage and also its temperature sensitivity. This oxide voltage temper-
ature sensitivity results from the temperature behavior of the intrinsic carrier concentration
ni (T ) that increases exponentially with higher device temperatures. As a consequence, the
oxide voltage uoxide and also the threshold voltage Uth decrease with higher temperature.
Transconductance gain In a second step, the temperature characteristic of the transcon-

ductance gain Kn is reviewed. The transconductance gain of an IGBT can be determined
according to [28, 278] via (5.12).
1 εox Z
Kn = · · · µn,i (T ) (5.12)
1 − αpnp (Tj ) tox L
The relevant parameters of (5.12) are summarized in Table 5.4. The oxide permittivity
εox , the oxide thickness tox and the channel aspect ratio Z/L do not exhibit any tempera-
ture dependency. The current gain of the p-base αpnp (T ) shows a temperature dependent
characteristic, because it depends on the ratio of the n+ buffer layer thickness Wd and the
ambipolar diffusion length La according to [28, 279].
1
αpnp (T ) = (5.13)
Wd
cosh La (T )
The ambipolar diffusion length La (T ) exhibits a complex temperature behavior, which is

illustrated in [278]. It results in an increasing current gain at elevating temperatures. How-
ever, the effect of the current gain αpnp on the temperature behavior of the transconductance
gain Kn is dominated by the temperature characteristics of the inversion layer mobility µn,i
107
Dice DTd DUm

} Measurement
Error
Um
Temperature Tj + DTj
Estimation
Ice
DKn DUth } Parameter

Error
Figure 5.5: Temperature estimation process
Figure 5.6: Lookup table for the junction temperature as a function of the gate plateau
voltage and the current (left) and as a function of the measurable voltage and
the current at two external gate resistances Rg (right)
which is given in [2] according to (5.14).

−2.5
T
µn,i (T ) = µn,i,0 (5.14)
300 K
It declines with rising temperatures and leads to a reduction of the transconductance gain
Kn with higher temperatures.
5.1.4 Temperature Estimation Process

In the following, the temperature estimation process is discussed based on the scheme shown
in Figure 5.5. It is initially assumed that there are no measurement and parameter errors.
Unfortunately, the junction temperature cannot be directly estimated based on the gate
plateau voltage Up and the device current Ice using the look-up table (LUT), which is
generated based on (5.2) and is depicted on the left side of Figure 5.6. The reason for this
is that the internal gate resistance Rg,i is located inside the power semiconductor, which
makes the gate voltage uge inaccessible. As a consequence, the junction temperature has to
108
Table 5.5: Temperature characteristic of the internal and external gate resistance of the
HP2 with four paralleled IGBT3 chips
Rg,0 Rg,i,0 αg αi
2.2/6.8 Ω 0.5 Ω 100 ppm/K 1000 ppm/K
be estimated based on the measurable gate plateau voltage Um . In (5.15) and (5.16) the
voltage Um is given as a function of the gate plateau voltage Up , the gate driver voltage Ud
and the internal and external gate resistance Rg,i and Rg .
Um = Up + ∆U = Up + Rg,i · Ig (5.15)
x Rg,i
∆U = (Ud − Up ) · with x = (5.16)
1+x Rg
The internal gate resistance Rg,i of the device is a TSEP that influences the temperature
sensitivity of the measurable gate plateau voltage. It can be characterized according to
(5.17) with the temperature coefficient of the gate oxide αi , which is made of polysilicon.
Rg,i = Rg,i,0 · (1 + αi · (Tj − 293 K)) (5.17)
One further temperature induced change of ∆U is caused by the driver temperature Td at

the external gate resistance Rg , which heats up during converter operation. Typically, the
gate resistance is realized using surface-mounted devices (SMD), which exhibit a tempera-
ture sensitivity of αg . Thus, the temperature characteristic of the external gate resistance is
given according to (5.18). The parametric values of the internal and external gate resistance
are summarized in Table 5.5.
Rg = Rg,0 · (1 + αg · (Td − 293 K)) (5.18)
A lookup table (LUT) is used to obtain an estimate of the junction temperature based
on the measurable gate plateau voltage Um and the device current Ice . The LUT is realized
based on (5.2), (5.15) and (5.16). Two example LUTs are depicted in Figure 5.6 for a gate
resistance of Rg = 2.2 Ω and Rg = 6.8 Ω. The LUTs reveal that the temperature sensitivity
of the measurable gate plateau voltage, which corresponds to the width of the LUT plot,
is reduced with smaller external gate resistances Rg . For the given HP2 power module an
external gate resistance in the range between Rg = 2.2 Ω and Rg = 6.8 Ω is typically used.
Thus, the introduced junction temperature estimation approach seems to be promising for
currents up to Ice =400 A to 500 A, where this power module is utilized.
Junction temperature estimation errors There are two types of disturbances, illustrated
in Figure 5.5, which result in temperature estimation errors ∆T̂j : Parameter estimation
errors and measurement errors. The threshold voltage Uth or the transconductance gain
Kn , used for the temperature estimation, typically exhibit inaccuracies. These inaccuracies
result in a parameter estimation error of the temperature estimate. If the collector emitter
109
7 25 25
Current Ice Current Ice Current Ice
6
- ∂Up/∂Kj in mV/(A/V2)
10 A 20 10 A 20 10 A
5 50 A 50 A 50 A
∂Up/∂Ice in mV/A
- ∂Up/∂Tj in mV/K
100 A 100 A 100 A

4 200 A
15 200 A
15 200 A
300 A 300 A 300 A
3 400 A 10 400 A 10 400 A
2
5 5
1
0 0 0
0 50 100 150 0 50 100 150 0 50 100 150
Temperature in °C Temperature in °C Temperature in °C
Figure 5.7: Gate voltage plateau sensitivity with respect to junction temperature, device
current deviation and transconductance parameter Kn
current Ice , the measured gate plateau voltage Um or the temperature Td of the gate driver
resistance Rg are not known precisely this results in an additional measurement error. These
estimation errors are analyzed in the following with a rigorous sensitivity analysis.
5.1.5 Sensitivity Analysis

It is difficult, if not impossible, to provide one single estimate on the temperature estimation
error of the proposed method. This is because the sensitivity of the gate plateau voltage to
temperature and disturbances differs over the operation range of the device. To evaluate the
temperature estimation error systematically over the entire operation range of the device,
a rigorous sensitivity analysis is conducted in the following. It allows deriving well defined
bounds of the temperature estimation error, which will be illustrated based on an example.
5.1.5.1 Parameter Sensitivity Analysis of the Gate Plateau Voltage

The introduced model equations (5.2), (5.3) and (5.4) can be used to determine the sen-
sitivity of the gate plateau voltage with respect to junction temperature (5.19), threshold
voltage (5.20) and transconductance gain (5.21).
s
∂Up 1 Ice ∂Kn ∂Uth
=− · + (5.19)
∂Tj 2 Kn3 ∂Tj ∂Tj
∂Up
=1 (5.20)
∂Uth
s
∂Up 1 Ice
=− (5.21)
∂Kn 2 Kn3
The temperature sensitivity of the gate plateau voltage from (5.19) is the key parameter
that provides information about how good the gate plateau voltage can be used to estimate
junction temperature. It depends on the temperature sensitivity of the transconductance
parameter Kn and the threshold voltage Uth , which can be calculated according to the
110
equations (5.22) and (5.23).
∂Uth
= −hT (5.22)
∂Tj
q−1
∂Kn 1K
= Kn0 · q · · 300q (5.23)
∂Tj T
The temperature sensitivity is depicted for a wide operation range in Figure 5.7. It is nearly
independent of the junction temperature. At low device currents the gate plateau provides
excellent temperature sensing opportunities with a temperature sensitivity of 6 mV K−1
to 7 mV K−1 . However, at higher device currents the temperature sensitivity decreases
such that at a current of 400 A the sensitivity is reduced to 2 mV K−1 to 3 mV K−1 . This
decreasing temperature sensitivity of the gate plateau voltage results from the temperature
sensitivity of the transconductance gain, which counteracts the temperature sensitivity of
the threshold voltage at higher device currents.
Deviations of the threshold voltage Uth and the transconductance parameter Kn lead to an
error in the temperature estimation. Deviations of the threshold voltage are directly reflected
in the gate voltage uge according to (5.22). However, the threshold voltage can be typically
determined very accurately using curve tracers and its deviation is therefore assumed to be
negligible. The sensitivity of the gate plateau voltage to the transconductance parameter
Kn , which has been derived in (5.21), is depicted on the right side of Figure 5.7. A deviation
in Kn results in a substantial change of the gate plateau voltage at high temperatures and
currents. Unfortunately, in this operation range the temperature sensitivity of the gate
plateau voltage is rather low, such that estimation errors of Kn must be avoided to obtain
a precise junction temperature estimation.
5.1.5.2 Measurement Sensitivity Analysis

In the following, the impact of the device current and gate voltage measurement errors
are addressed. The impact of errors within the gate voltage measurement is analyzed to
determine the required precision of the gate voltage measurement. The impact of device
current estimation errors is important to understand, because preferably the device current
is not measured at all but approximated by the load current of a half bridge. Of course this
is only a viable option if a certain error of the device current estimates is tolerable.
Device current sensitivity The current sensitivity of the gate plateau voltage Up can be
calculated according to (5.24) and is depicted in Figure 5.7.
∂Up 1
= √ (5.24)
∂Ice 2 Kn · Ice
The current sensitivity provides a measure for the gate plateau voltage change ∆Up which
results from a small change of the device current ∆Ice . For this reason, it can be used to
estimate the gate plateau voltage difference due to small deviations in the current measure-
ments, which might be mistakenly interpreted as junction temperature induced changes of
111
Up . Fortunately, the current sensitivity is only large at low currents, when the junction
temperature sensitivity of the voltage plateau Up is large as well. At higher device currents
the current sensitivity decreases, which limits the resulting junction temperature estimation
error.
Voltage measurement sensitivity Consequently, it must be analyzed how much the junc-
tion temperature estimation, based on the measurable voltage Um , is degraded due to the
voltage drop ∆U across the internal gate resistance Rg,i .
First, it is investigated how much the sensitivity of the measurable gate plateau voltage
Um with respect to all properties y, except temperature, is changed by the voltage drop ∆U .
This can be analyzed based on equation (5.25).
∂Um ∂Up 1
= for y = Ice , Uth , Kn (5.25)
∂y ∂y 1 + x
As x, which is given by (5.16), (5.18), and (5.17), only exhibits a dependency on the junction
temperature Tj and the driver temperature Td , it can be treated as a constant multiplier
for all variables y. Equation (5.25) indicates that for x 1, which is the case for typical
applications of the HP2, the sensitivity expressions are all only slightly reduced. It is even
possible to make the approximation that the sensitivity of the gate plateau voltage Up and
the measurable voltage Um with respect to deviations of the device current Ice , the threshold
voltage Uth and the transconductance gain Kn are the same.
In a second step, the temperature sensitivity of the voltage drop across the internal gate
resistance ∆U with respect to the junction temperature Tj (5.26) and with respect to the
driver temperature Td can be derived via equation (5.26) and (5.27).
∂∆U 1 ∂Up Ud − Up ∂x
= + (5.26)
∂Tj x + 1 ∂Tj (1 + x)2 ∂Tj
∂∆U Ud − Up ∂x
= (5.27)
∂Td (1 + x)2 ∂Td
The junction temperature sensitivity of the voltage drop ∆U and the resulting temperature
sensitivity of Um , which is given according to (5.28), are plotted in Figure 5.8.
∂Um ∂∆U ∂Up

= + . (5.28)
∂Tj ∂Tj ∂Tj
The temperature sensitivity of the voltage drop ∆U depends on the gate resistance ratio
x and the device current. Its temperature dependency is small and therefore, a worst case
approximation for a junction temperature and driver temperature assuming a range from
0 ◦C to 160 ◦C was used. The plot of (5.26) and (5.28) over the resistance ratio reveals that
for gate resistances between Rg = 2.2 Ω and 6.8 Ω, which is a typical range for this power
module, the voltage drop at internal gate resistance Rg,i slightly improves the temperature
sensitivity of the gate plateau voltage at small currents and decreases it at high currents.
Unfortunately, this change of the temperature sensitivity further reduces the small tem-
perature sensitivity at high currents and only increases the high temperature sensitivity at
112
-1
Rg = 6.8 W
Rg = 2.2 W
0.5
-2
0
-3
-0.5
∂Um/∂Tj in mV/K
∂DU/∂Tj in mV/K
-4
-1
-5 Current ice
-1.5
10 A
-2 -6 50 A
100 A
Rg = 2.2 W
Rg = 6.8 W -7
-2.5 200 A
-3 -8 300 A
400 A
-3.5 -9
0.1 1 0.1 1
x = Ri/Rg x = Ri/Rg
Figure 5.8: Junction temperature sensitivity of ∆U and Um for the Hybridpack2 power
module with Ud = 15 V and Rg,i = 0.5 Ω
0 0.14
Rg = 2.2 W
Rg = 6.8 W
Current ice
10 A 0.12
-50 50 A
100 A 0.1
∂DU/∂Td in mV/K
∂Tj /∂Td in K/K
200 A
-100 300 A 0.08
400 A
-150 0.06
Rg = 2.2 W
0.04
Rg = 6.8 W
-200
0.02
-250 0
0.1 1 0.1 1
x = Ri/Rg x = Ri/Rg
Figure 5.9: Driver temperature sensitivity of ∆U and Tj for the Hybridpack2 power module
with Ud = 15 V and Rg,i = 0.5 Ω
low currents. However, it can be seen that the worst case temperature sensitivity of the
measurable voltage Um never falls below 1.6 mV/K if the device current is not larger than
400 A in case of the utilized IGBT3 chip.
The impact of the driver temperature Td can be evaluated based on Figure 5.9, which
shows the worst case driver temperature sensitivity over the entire operation range. The
absolute driver temperature sensitivity of the voltage drop ∆U grows for increasing external
gate resistances Rg and reaches its peak if Rg is equal to Rg,i . This effect is amplified for
small currents. If the driver temperature sensitivity of the measurable voltage Um is divided
by its junction temperature sensitivity, the driver temperature sensitivity of the junction
temperature estimate can be derived, which is also plotted in Figure 5.9. It can be seen
from this plot that if the gate resistance is not chosen smaller than Rg = 2.2 Ω the worst
case driver temperature sensitivity of the junction temperature estimate is 0.07 K/K.
113
Table 5.6: Sensitivity evaluation of the temperature estimation error for the HP2 assuming
∆Kn = 1 A/V2 , ∆Ice = 1 A, ∆Um = 0.01 V and ∆Td = 50 K
max
Ice 100 A 250 A 400 A
max
∆T̂j (∆Ice ) 1.6 K 1.8 K 2.8 K
max
∆T̂j (∆Kn ) 3.3 K 8.9 K 22.4 K
max
∆T̂j (∆Td ) 1.4 K 2.0 K 3.7 K
max
∆T̂j (∆Um ) 2.4 K 4.0 K 7.9 K
5.1.5.3 Temperature Estimation Error
The introduced sensitivity functions are now used to estimate the temperature error for given
ranges and tolerances of the measurement and parameter errors, indicated in Table 5.6. For
each disturbance term ∆X the resulting temperature estimation error can be estimated
according to (5.29).
−1
∂Um ∂Um
∆T̂j = · · ∆X (5.29)
∂Tj ∂X
This analysis reveals that the temperature estimation heavily relies on a precise knowledge
of the transconductance parameter Kn . It must be parametrized very carefully to prevent
significant estimation errors. Small measurement errors of the device current Ice only have
a limited influence on the temperature estimation. As a consequence, the load current
measurement iload can be used to approximate the device current Ice without a significant
error. The estimation error, which occurs due to changes of the driver temperature, is small.
Thus, there is no need to know the temperature of the gate driver resistance Rg for a precise
junction temperature estimation. Finally, measurement errors of Um have an influence on
the junction temperature estimation. This source of error has an increasing effect at higher
device currents and therefore must be kept small.
5.1.6 Sensing Circuitry

In the following, the focus is set on the circuitry that is required to sense the temperature
variation of the measurable gate plateau voltage Um . The proposed sensing circuitry, which
has been developed within [119], exhibits three stages which are depicted in Figure 5.10.
The first differential amplification stage must be capable of a large input voltage range
from −10 V to 15 V and must exhibit a high bandwidth. It must ensure an excellent common
mode voltage rejection such that the circuit can be applied in an operating power converter
for the low and high side device. Furthermore, it must exhibit a high input impedance to
enable minimal invasive sensing and provide linearity over the entire voltage range. For this
task an instrumentation amplifier AD8421 from Analog Devices has been chosen, whose
circuit is depicted in Figure 5.10. Its transfer characteristic is given by (5.30). The gain of
the instrumentation amplifier is set to one by omitting out R1 . An external temperature
114
Figure 5.10: Circuitry for gate plateau voltage sensing
stable voltage reference Uref,i is used to elevate the inverted output voltage by 5 V.
R1 + 2R2
ua = − um · + Uref,i ≈ − um + Uref,i (5.30)
R1
The second stage is based on an improved precision rectifier with unity gain that is
realized with an AD847 amplifier and 1N4148W diodes. It cuts off the voltage range up
to 5 V, inserted by Uref,i , below the voltage plateau, which does not exhibit temperature
sensitive information. This results in the transfer characteristic given by (5.31).
(
0 if ua > 0
ur = (5.31)
−ua · R
R1
2
if ua < 0
The voltage above all existing gate plateau levels is cut off with the Zener diode D3 at the
output of the precision rectifier. Finally, the output is smoothed with an LC low-pass filter.
The last stage exhibits an integrator based on AD847 amplifiers that eliminates the effects
of high bandwidth noise and electro-magnetic interference (EMI). The integration stage
contains the two switches S1 and S2 that are triggered via the driver reference signal with
a monostable multivibrator HEF4538B. Thereby, the circuitry integrates over t12 = 0.5 µs
to 3 µs of the filtered gate voltage signal and is reset before the next turn-on process. The
transfer characteristic of this stage is given by (5.32).
ˆ t2
1 Ur · t12
uf = Uref,O + ur dt = Uref,O + (5.32)
R1 C1 t1 R1 C1
The gain of the integrator allows increasing the voltage sensitivity before an analog-digital
(AD) conversion. For the given circuit the integration gain has been set to 7.5. With an
input voltage range of 3 V this results in a maximum input voltage of 15 V to 16 V for AD
conversion. After the integration the signal at the output of the integrator is kept constant
for 6 µs. Thus, a low cost analog to digital converter can be used to sample the result with
sufficient precision.
115
Shunt resistance
Digital storage oscilloscope
Voltage probes
Gate plateau voltage sensing circuit
Driver unit
Hybridpack2 power module
Peltier module
Double pulse circuitry
Figure 5.11: Experimental setup of the sensing circuitry attached to the HP2 that is
mounted on a thermo-electric module based temperature control unit [95]
in a double pulse test bench [121]
5.1.7 Experimental Evaluation

Finally, the temperature estimation capability of the introduced method is demonstrated
experimentally. Therefore, the analog circuitry has been realized on a test board, which was
directly attached to the driver unit of the HP2. It is depicted on a thermo-electric module
based temperature control unit [95] within a double pulse test bench [121] in Figure 5.11.
The thermo-electric module based temperature control unit ensures that the power module
is heated up to the selected reference temperatures before a double pulse characterization is
run. The voltage ur , which is the output voltage of the precision rectifier, and the voltage
uf , which is the output of the integration unit of the sensing circuitry, have been measured
with TT-SI 200 voltage probes. Furthermore, the device current ic and the collector-emitter
voltage uce have been measured with a TT-SI 9101 differential probe and a SBNC-2-01 shunt
resistance. The traces of a test at ic = 200 A and uce = 400 V with a gate resistance of
Rg = 6.8 Ω are depicted in Figure 5.12
The voltage ur can be directly related to the gate voltage during the gate plateau, because
the first two stages of the circuitry provide unit gain amplification and shift the gate voltage
by 5 V. The magnification of the voltage ur in Figure 5.12 shows that its average component
is temperature dependent. However, the noise in this signal is far to high to make an accurate
measurement. For this reason, the following integration stage is very important. It averages
the measured gate plateau voltage during a time interval of 2.5 µs and eliminates the high
bandwidth noise. As a result, the output voltage of the integration unit uf accurately
reflects the temperature dependency of the gate plateau voltage. After sampling and AD
conversion, uf can be used to recalculate the measurable gate plateau voltage um and to
estimate the junction temperature via (5.2), (5.15) and (5.16).
The model that is used to relate the gate plateau voltage to the junction temperature
must be validated over a wide operation range of the IGBT to demonstrate that the junction
temperature estimation method can be used under realistic operation conditions. Therefore,
double pulse tests have been conducted at different device currents, temperatures and gate
resistances. The temperature, current and resistance of all operation points have been used
116
Rg = 6.8 W
400 400
Temperature Tj
300 300
uce in V 10 °C
ice in A
200 32 °C 200
60 °C
100 80 °C 100
100 °C
0 0
3 15
2 10
ur in V
uf in V
1 5
0
Integrator output uf 0
Rectifier output ur
-1 -5
3 3.5 4 4.5 5 5.5 6 6.5
Time in ms
Figure 5.12: Experimental validation of the gate plateau voltage sensing unit
to predict the gate plateau voltage based on the developed model. After the test, the
predicted values were compared with gate plateau voltage measurements to validate the
performance of the model. The results are plotted in Figure 5.13.
It can be seen that for both gate resistances and a wide current and temperature range
the deviations between the model and the measurements are small. The voltage differences
∆Up between model and measurement were divided by the temperature sensitivity (5.19)
to obtain an evaluation for the temperature error, which would result from this deviation.
The maximum resulting temperature error of the experiment with Rg = 6.8 Ω was ∆Tmax =
7.5 K. For the errors at all operation points of this experiment a standard deviation of
σ = 3.1 K can be calculated. The error of the second experiment, summarized in Figure 5.13,
is in the same range. This demonstrates that the proposed temperature estimation method
can be used for IGBTs over a wide operation range.
5.1.8 Discussion
It was demonstrated in this section that the junction temperature can be estimated using
gate plateau voltage sensing and phase current information. The introduced method pro-
vides a valuable tool for junction temperature estimation of automotive IGBTs e.g. the
Hybridpack2 power module. Principally, it can be generalized for all devices, whose transfer
characteristics allow distinguishing different junction temperature levels. Besides Si IGBTs
the method is also applicable for Si MOSFETs, as their threshold voltage Uth exhibits the
identical temperature behavior due to the temperature dependent intrinsic carrier concen-
tration ni , given by (5.10). Nevertheless, there are limits for the proposed methods, which
are discussed in the following.
It is important to realize that for every device there exists a current level, at which the
temperature sensitivity of the gate voltage plateau becomes too small. For the Hybridpack2
117
Rg = 6.8 W Rg = 2.2 W
8.5 8
Current ice Current ice
15 A 44 A
Gate plateau voltage in V

Gate plateau voltage in V 7.8
8 39 A 73 A
64 A 121 A
103 A 7.6 155 A
7.5 132 A
166 A
229 A 7.4
325 A
7
7.2
6.5 7
Sensing DTmax = 7.5 K Sensing DTmax = 6.8 K
Prediction sT = 3.1 K Prediction sT = 3.5 K
6 6.8
0 20 40 60 80 100 0 20 40 60 80 100
Junction temperature in °C Junction temperature in °C
Figure 5.13: Comparison of the gate plateau voltage sensing with its model-based predic-
tion at an external gate resistance of 6.8 Ω and 2.2 Ω
this current level is located between 400 A and 500 A, which includes the typical operation
range of the power module. However, for other devices a reasonable junction temperature
sensitivity cannot be guaranteed over the typical operation range. The range in which
sufficient temperature sensitivity is obtained can be evaluated based on the transfer char-
acteristic of the device. In addition, it is important to analyze if the utilized external gate
resistance allows extracting the temperature sensitivity of the gate voltage plateau. If the
external gate resistance becomes too small in comparison to the internal gate resistance, the
temperature sensitivity of the internal gate resistance can significantly reduce the measur-
able temperature sensitivity of the gate voltage plateau. In both cases the proposed method
is not a perfect choice for junction temperature sensing.
The experimental setup in this work aimed to ensure a homogeneous temperature dis-
tribution over the entire module during tests. This means it has not been investigated
how temperature differences between paralleled IGBTs impact the temperature estimation.
The investigations made in [92] indicate that the gate voltage plateau based temperature
characteristic, which is based on the temperature characteristic of the device transfer char-
acteristic, should provide an average temperature estimate for this case. Also, degradation
effects on the gate voltage plateau over the lifetime of the device must be investigated in
detail to quantify the sensitivity of the proposed method to device degradation.
Finally, it must be outlined that without an effective parameter extraction or estimation
method the presented method will not become a viable option for industrial applications.
For this reason, further work on fast and simple calibration measurements is necessary. In
that context, it is of great interest to examine how strong the device parameters statically
spread. If devices from identical wavers, for example, have very similar properties, this
could significantly reduce the calibration effort.
The following section presents how the gate plateau voltage based junction temperature
estimation as well as other TSEP based methods can help to develop robust thermal moni-
toring solutions that estimate 3-D distributed temperatures in power modules.
118
5.2 Thermal Predictors and Observers
Udc Rgate fsw Udc Rgate fsw
Averaged Eswavg
Switching Esw
Switching
Loss Model avg
Loss Model Psw
Psw
iconvrst Iconv
Averaged Pcond
avg
Conduction Pcond Ploss
avg
Ploss
Loss Model Mconv Conduction
dconvrst Loss Model
f0
Tj Tj
Figure 5.14: Instantaneous (PWM cycle Figure 5.15: Electrical excitation cycle av-
averaged) loss prediction eraged loss prediction

Thermal predictors and observer structures provide a unique method to obtain detailed elec-
trothermal information of a power module based on electrothermal models and temperature
measurements. This information can be directly used to monitor or control the temperature
and losses within the power module. Additionally, they can be effectively used to detect
degradation and failures.
This section, firstly introduces thermal predictors that estimate the electrothermal states
of a liquid cooled power module based on a real-time model. In a next step, various observer
structures are introduced that combine the electrothermal models with real-time junction
temperature information to estimate device losses and 3-D distributed temperatures with
low sensitivity to modeling errors. It is demonstrated how bandwidth partitioning concepts
can be applied to thermal observer for the separate estimation of instantaneous and aver-
aged temperatures and losses with high accuracy and nearly zero lag. Furthermore, it is
shown how the NTC temperature information can be efficiently used by shaping a coolant
temperature observer that either creates redundancy or entirely eliminates the need for a
coolant temperature measurement. Finally, a model reference adaptive observer is proposed
that allows the adaptive calibration of the IGBT switching loss model, which is difficult to
calibrate based on off-line measurements.
5.2.1 Loss Prediction

First, the loss prediction process is reviewed that is an essential part for all estimator
structures. The loss prediction unit utilizes the instantaneous and averaged loss models,
which were developed within this thesis.
The instantaneous conduction and switching losses, P̂ cond and P̂ sw , which are averaged
over one PWM cycle, are determined based on the operational vector of the converter. It
exhibits the phase currents irst rst
conv and the duty cycles dconv of each phase, the dc-link voltage
udc , the switching frequency of the converter fsw , the gate resistances of each device Rg
and the junction temperature of all devices T j . The conduction losses are determined based
on the currents, the duty cycles and the junction temperature of the devices, as illustrated
in Figure 5.14. With the currents, the dc-link voltage, the gate resistance and the PWM
119
i
rst Power Module
rst
d Power Device DPloss Thermal Interface
Converter rstx
Rgate
X conv Ploss T Tspatial
fsw Ploss(X conv) dT
Operation = AT + B Ploss
udc dt Tj
Tj
Loss Prediction
avg
Ploss(X conv) Ploss(X conv)
Instantaneous Temperature Prediction

~D ~D total
Ploss q1(k+1)= A q1(k)+B Ploss(k) T out Tspatial(k) t
~D
Tout(k)= C q1 (k) + Tf Tj(k)
Ploss
Averaged Temperature Prediction
avg ~D ~D total avg
Ploss q1(k+1)= A q1(k)+B Ploss(k) T out avg
Tspatial(k)
~D avg
Tout(k)= C q1 (k) +Tf Tj(k)
avg
Ploss
Figure 5.16: Thermal predictor structure for real-time averaged and instantaneous loss
and temperature estimation
frequency the switching losses are determined.

avg avg
Similarly, the averaged losses over one electrical excitation period, P̂ cond and P̂ sw are
determined based on the phase peak current I conv , the modulation index M conv , the load
angle φ0 the dc-link voltage udc , the gate resistance Rg and the PWM frequency fpwm . It
effectively eliminates the loss pulsation that occurs as a consequence of the alternating cur-
rent. The prediction of the averaged losses is illustrated in Figure 5.15. The complexity
of both models is moderate, especially when the exponential model equations are approxi-
mated by polynomials that are accurate within the required range. Thereby, the derived loss
predictor can be easily implemented on a digital signal processor (DSP) for real-time appli-
cations. Consequently, this loss predictor is used in the following section for the formulation
of electrothermal predictors and observers.
5.2.2 3-D Spatial Thermal Predictors

In the following, thermal predictors are discussed with a special emphasis on predictors for
the extraction of 3D spatial thermal information. It is assumed that the temperature of the
coolant Tf is known and remains constant. Conditions under which the coolant temperature
is not known or even varies over time are discussed in 5.2.6.
5.2.2.1 Operation Principle

The most general structure of a thermal predictor is illustrated in Figure 5.16. The predic-
120
tor structure is driven by the operation vector of the converter X conv , which includes the
converter current irst , the duty cycles drst , the gate resistance of both IGBTs in each phase
Rrst
g , the switching frequency fsw , the dc-link voltage udc and the instantaneous junction
temperature of all devices T j .
First, the losses within all devices of the converter are calculated based on the operation
vector. There are two types of loss models that have been reviewed in the previous section.
The instantaneous loss model estimates the losses that are dissipated in the devices every
PWM switching cycle. The averaged loss model estimates the averaged losses over one
electrical excitation period.
The instantaneous and averaged converter losses are passed to two identical 3-D thermal
state space models that can estimate temperature distributions within the power module.
The 3-D thermal state space model, which was introduced in chapter 4.1.6, has been im-
plemented with the modeling software that was developed as a part of this work. To make
the 3-D thermal model applicable for real-time applications, model reduction techniques, in
this particular case the SPA, have been applied. The resulting thermal state space model
avg
processes the instantaneous and averaged device losses within a half bridge, P̂ loss and P̂ loss ,
with the input matrix B̃ D and the transfer matrix ÃD to estimate the state vector θ1 of
the state space model. The state vector only exhibits pseudo-temperatures that have no
direct physical meaning. However, the instantaneous and averaged temperature estimates
avg
of the thermal model T̂ out and T̂ out can be easily obtained by multiplication of the state
vector with the output matrix C̃ D and adding the coolant temperature Tf . The resulting
avg
temperature vectors T̂ out and T̂ out do not only exhibit the junction temperature of the de-
avg avg
vices T̂ j and T̂ j . They also include spatial temperature estimates T̂ spatial and T̂ spatial , e.g.
for the solder layers, the substrate and the base plate at the positions that were illustrated
in chapter 4.1.6.
5.2.2.2 Implementation Aspects

The thermal model must be selected depending on the application area and the compu-
tational power of the DSP on which the thermal predictor is implemented. Based on the
application, there are two critical performance aspects of the predictor that need to be
considered when setting up the model:
• The number of individual or averaged temperature nodes to be monitored
• The estimation accuracy bandwidth with unity gain and zero phase lag
The desired performance aspects have a direct impact on the order and consequently on
the size of the state space model that is required for accurate monitoring. Every individual
temperature node that should be monitored results in one row of the output matrix C̃ D .
Similarly, the more temperature nodes should be monitored and the higher the required
bandwidth in which the truncated model shall accurately predict the temperatures, the
more states must be included to the model. This leads to a larger transfer matrix ÃD .
In this context it is important to understand that the static accuracy of the model, i.e.
the thermal resistance between all devices and monitored temperature nodes, is guaranteed
121
independent of the transfer matrix ÃD . However, the dynamic performance scales only with
the dimension of ÃD for a given number of monitoring points.
As a consequence, for any application, first, the number of monitoring nodes m must be
determined which is equal to the number of rows of the output matrix C̃ D . In a next step
the required bandwidth of the prediction process must be finalized. It is illustrated in-depth
in chapter 3.3 how the bandwidth relates to the number of required states n and thereby
the dimensions of ÃD . As a result, a minimum 3-D spatial thermal model is obtained that
must be implemented on a DSP. In case of a half bridge with four devices, it exhibits an
input matrix B̃ D with 4 × n elements, a transfer matrix with n × n elements and an output
matrix with n × m elements. With the number of multiplications per seconds of the DSP
qdsp it is easily possible to determine the computation time tc of the two spatial thermal
models via (5.33).
tc = n2 + n · m + 4 · n · 2 · qdsp

(5.33)
Note that a factor of 2 is included in (5.33) to take into account that the thermal model is
computed twice every sampling period, once for the instantaneous temperature computation
and a second time for the averaged temperature computation.
The DSP ADSP-21161N from Analog Devices is used within this work, which processes
200.000.000 multiplications per second. Thus, it requires a computation time of tc = 4.5 µs
for both thermal models to compute 14 temperature nodes with a bandwidth of 100 Hz,
which requires 14 states according to Figure 4.16. If a bandwidth of 100 Hz is required,
according to 4.1.8 a thermal model with 24 states must be used leading to a computation
time of 10 µs. This demonstrates that on conventional DSP systems the computation of the
3-D spatial model is easily possible with sampling rate of 1 kHz or even 10 kHz. Even on a
DSP or micro-controller with lower computational power the computation of the real-time
models with sampling frequency of 200 Hz to 1000 Hz is feasible.
It is important to understand that this strong real-time monitoring capability is only en-
abled by the combined application of 3-D FVM modeling and model reduction techniques.
Although in most applications the number of output nodes is limited, there is the oppor-
tunity to reconstruct the temperature at all nodes of the original thermal model offline,
based on the pseudo-temperatures that are summarized in the state vector. For this offline
post-processing, the state information must be downloaded from the DSP after operation
and can be evaluated. However, the EA of all thermal nodes that are reconstructed in post
processing can be degraded in the high frequency range in case the transition matrix ÃD is
not specifically designed for that purpose.
5.2.3 Instantaneous Thermal Observer

The thermal predictor is the best option to estimate temperatures within a power module, if
no thermal information is available. However, as discussed in chapter 2.2.2 it is very sensitive
to inaccuracies of the electrothermal model and disturbances, e.g. deviations of the operation
vector X conv . To avoid this problem, the predictor can be enhanced to a thermal observer,
which is depicted in Figure 5.17 for the instantaneous loss and temperature estimation only.
The observer structure that is proposed in this work is an enhanced Luenberger style observer
122
i
rst Power Module
rst
Converter rst,x
Rgate
udc dt Tj
Tj Measurement Delay
n
z-n
Loss Estimation Noise
Tsz-1
Ki Ploss(X conv) Thermal Model
1 - z-1
Tj(k-n) ~D ~D total
q1(k+1)= A q1(k)+B Ploss(k) T out Tspatial(k)
Kp ~D
total
Ploss Tout(k)= C q1 (k) + Tf Tj(k)
DPloss
Tj(k-n) DPloss(k)
Tj(k-n)
z-n
Figure 5.17: Thermal observer for instantaneous loss and temperature estimation
with additional features, which were originally introduced for observers in energy conversion
systems in [190, 191]. These additional features, e.g. the integral state feedback achieving
estimation with zero steady-state error, estimations of disturbances and model inaccuracies
and the correct handling of measurement delays, are not applied in conventional Luenberger
style observer presented in classical control textbooks [15, 87, 149].
In the following, first, the operational principle of the proposed thermal observer is dis-
cussed. Afterwards, its performance is analyzed for different design options to provide
physical insightful guidelines for its design.
The entire discussion of the proposed observer and also following observer structures,
which are developed within this work, is based on the 3-D spatial thermal model derived
in chapter 4.1.6. However, most of the discussed methodologies can be easily applied for
observers which use other linear thermal models.
5.2.3.1 Operation Principle

In the operation of the thermal observer depicted in Figure 5.17, first, the loss model predicts
the instantaneous loss vector P̂ loss and passes it via the observer feedforward path to the
thermal model. The thermal model predicts the spatial temperature vector T̂ out based on
the loss estimates P̂ loss .
The obtained junction temperature estimates of the four devices T̂ j are compared with
junction temperature measurements T j . For the measurement of the junction temperature
various techniques can be used. These range from infrared (IR) sensors, which can only
be used in a laboratory, on-chip sensing diodes [41, 163] to TSEPs [19, 25, 93], e.g. the
device forward voltage [93], gate peak current [26] or gate plateau voltage based junction
temperature estimation [309], which has been presented at the beginning of this chapter.
If the junction temperature measurements T j are delayed by n samples of the sample time
Ts due to the sensor delays, this delay must also be applied to the estimates before the
comparison to ensure consistency. The junction temperature estimation error of each de-
vice ∆T̂ j is passed to a proportional-integral (PI)-regulator. If the junction temperature
123
prediction T̂ j and measurement T j deviate from each other, the PI regulator corrects the
loss prediction of the open loop model P̂ loss with the loss error estimate ∆P̂ loss . The pro-
portional state feedback path, which is created by the PI regulator, is compensating for fast
high frequency changes, whereas the integral state feedback path compensates for slower
changes and ensures zero error in steady-state. Thereby, the observer creates a fusion of
the junction temperature sensor information and the real-time model. The observer uses
the sensor within an appropriate bandwidth to correct the model. This correction makes
the observer resilient against modeling errors, which can result from parameter deviations
of the loss model or inaccuracies of the thermal model. However, at high bandwidth where
the signal-to-noise ratio (SNR) of the sensor decays or the sensor exhibits significant lag,
only the real-time model is used. This allows temperature estimation over a wide bandwidth
with minimal deviation in magnitude and nearly zero phase lag, which will be demonstrated
in the following based on examples.
Another additional feature that is intrinsically embedded in the presented observer struc-
ture is the computation of the loss estimation error ∆P̂ loss . The loss estimation error rep-
resents the losses that are not accurately estimated by the loss model but are compensated
by the state feedback paths. The loss estimation error ∆P̂ loss exhibits valuable information
about potential degradation or malfunction of the power module. For example, if its average
value rises rapidly after long term operation of the power module this indicates that more
losses are generated than it is expected for the given operation, for example due to partial
device failures as a consequence of bond wire lift-offs [94]. A slow rise of this signal might
indicate that the thermal interface, provided by the power module, is degraded, e.g. due to
delamination within the power module as illustrated in [94, 162, 179, 288]. This is typically
reflected by an increment of the thermal resistance Rth , whose effect is also compensated
and thereby detected by the observer state feedback paths. In both cases ∆P̂ loss is a valu-
able monitoring signal to detect possible module failures before they lead to a catastrophic
failure of the entire converter system.
5.2.3.2 Design of the Observer State Feedback Gains

The design of the proportional and integral feedback gains Kp,o and Ki,o is critical for the
effective combination of model-based temperature prediction and the measurement based
temperature correction. These gains, Kp,o and Ki,o , determine the bandwidth, in which the
sensors can correct errors that result from inaccuracies of the electrothermal model.
Design principle For the physical insightful derivation of observer feedback gains, a simple
thermal model is required that only captures the most important dynamic characteristics of
the thermal system, e.g. the approximated behavior of the junction temperature. For that
reason, the thermal model is approximated for each device by a first order model, such that
it can be represented by a thermal capacitance Cth and a thermal resistance Rth .
With the first order model, a simplified observer structure can be realized that is de-
picted in Figure 5.18. The thermal cross coupling between the devices is neglected for the
design of the observer structure, because its impact on the junction temperature changes
is small compared to the self-heating of each device. Based on the simplified model, the
observer gains can be designed separately for each device. Typical model inaccuracies and
124
DPloss Thermal Plant
Ploss 1 1 Tj
Cth S
Rth-1 Tf
1
Ki,o K Thermal Observer
S
DPloss Ploss Tj
Tj 1 1
Kp,o
Cth S
Tj
Rth-1 Tf
Figure 5.18: State block diagram with the 1st order approximation of the thermal system
and the thermal observer
disturbances are included in Figure 5.18 as a dynamic disturbance ∆P loss . Furthermore, by

variation of the gain K in the observer feedforward path either perfect loss estimation can
be assumed via K = 1 or a static loss estimation error can be modeled via K 6= 1.
The closed loop eigenvalues of the observer feedback loop can be determined resulting in
(5.34).
v !2
−1 u −1
R̂th + Kp,o u R̂ th + K p,o Ki,o
s1,2 = − ±t − (5.34)
2Cth 2Cth Ĉ th
They can be approximated according to (5.35), if the system is over-critically damped

and the eigenvalues are placed with a certain distance to each other on the real axis, which
is a desirable pole placement for the observer.
−1
Kp,o + R̂th Ki,o
s1 ≈ and s2 ≈ − −1 (5.35)
Ĉ th Kp + R̂th
The placement of an eigenvalue on the real axis can be directly associated to a time constant
τ and bandwidth ωb according to sEV = −1 and τEV = −ωb . Thus, the observer feedback
gains Kp,o and Ki,o can be determined via (5.36) by specification of the bandwidth fb,p and
fb,i of the proportional and the integral feedback path.
−1 −1

Kp,o = 2πfb,p Ĉ th − R̂th Ki,o = 2πfb,i Kp,o + R̂th (5.36)
The integral feedback gain of the observer Ki,o determines the bandwidth fb,i , in which
the integral feedback path dominates the correction process of the temperature estimates.
In this frequency range zero steady-state error can be achieved. The proportional feedback
125
Table 5.7: Properties of the analyzed 3-D spatial thermal observer

States Sampling time Measurement delay Bandwidth fb,p Bandwidth ratio fb,i /fb,p
24 1 ms 1,10 ms 2,4,6 Hz 1/5 and 1/20
gain Kp,o selects the bandwidth fb,p , in which the proportional feedback path dominates the
correction process of the temperature estimates. A higher proportional feedback gain does
not only increase the bandwidth of the observer, but also increases the dynamic stiffness
(DS) of the estimation error ∆P loss (jω)/∆T̂ j (jω). The DS of the estimation error is a
frequency domain performance metric that computes the disturbance, i.e. the losses not
predicted by the loss model, which results in an estimation error of 1 K. Of course, it is a
goal in the observer design to push this metric as high as possible over a wide bandwidth.
Above the proportional feedback bandwidth fb,p , the temperature estimate only depends
on the accuracy of the loss estimation and the thermal model and is not corrected by the
temperature measurements anymore. In this work, the bandwidth of the integral state
feedback loop fb,i is kept a factor of five below the bandwidth of the proportional feedback
loop fb,p . This ensures that the closed loop EVs remain over-critically damped and are
located separately on the real axis, such that the approximation of (5.35) holds. More
in-depth information on the bandwidth based design can be found in [79, 191].
Design limitations It is very important for a good observer state feedback design to discuss
design limitations that result from the quality of the temperature measurement. As illus-
trated in Figure 5.17, the temperature measurement often exhibits a delay and is typically
low pass filtered or exhibits a low signal-to-noise ratio at higher bandwidth.
In case of a perfect sensor without lag and high SNR, the state feedback gains of the
observer are designed to a very high bandwidth such that the DS of the estimation error
is high and the observer corrects model errors over a wide frequency range. However, the
measurement delay enforces a limit on the bandwidth of the proportional feedback gain,
because it leads to a weakly damped resonance if the feedback gains are pushed too high.
Furthermore, if the measurement exhibits significant noise or is low pass filtered above a
certain bandwidth, the feedback gains must be designed such that the closed loop observer
bandwidth does not exceed this limit. Otherwise, the estimates exhibit either significant
noise or follow the low pass characteristic of the measurement filter above its cutoff-frequency
instead of predicting the losses based on the feedforward path with nearly zero lag.
5.2.3.3 Performance Analysis
The effect of different observer designs can be illustrated by analysis of the three key perfor-
mance metrics for observer structure. These are the EA, the DS of the estimation error and
the disturbance EA. In the following, an observer structure based on the model introduced
in chapter 4.1.6 is assumed. Its implementation parameters are listed in Table 5.7. Note
that the following results were obtained based on discrete time models to accurately reflect
the performance that is feasible on a DSP system.
126
Estimation accuracy (EA) For this observer structure the EA of the IGBT junction
temperature and substrate temperature are plotted in Figure 5.19 for a bandwidth of 2 Hz
and 6 Hz and a measurement delay of 1 ms and 10 ms. If the loss estimation process exhibits
no error, the EA of the junction temperature exhibits unity gain and zero phase lag over
the entire frequency range up to the Nyquist frequency. The same is true for the EA of the
substrate temperature up to a bandwidth of 50 Hz. Above this frequency range, magnitude
and phase deviations occur because there are deviations between the thermal model of the
observer with 24 states and the thermal dynamics of the plant.
If there exists a loss estimation error of ±20 %, this does not have any impact on the
EA within the state feedback bandwidth of the observer. However, above the bandwidth
it results in a magnitude error of ±20 % in case of the junction and ±15 % in case of the
substrate temperature. Despite the magnitude error, the phase shows nearly zero lag over
the entire frequency range. This is a very desirable property in case the junction or substrate
temperature estimates are used for the thermal control of the power module.
The effect of an observer state feedback design yielding bandwidths of 2 Hz or 6 Hz can
be observed in the EA plots in Figure 5.19. In the presence of loss estimation errors, the
magnitude remains unaffected along the bandwidth of the observer state feedback paths
and only starts to deviate above. Thus, a higher observer bandwidth makes the estimation
more insensitive to errors of the loss model. The limitation of the observer designs can be
clearly identified by comparison of the EA that was achieved with a measurement delay
of 1 ms and 10 ms. In case of a small delay, e.g. 1 ms, a bandwidth of 6 Hz is not a limit
and a higher bandwidth could be realized without a problem. However, if the measurement
exhibits a delay of 10 ms, a bandwidth of 6 Hz seems to become a limit that should not be
exceeded. This is because resonances are excited that degrade the estimation accuracy.
This comparison motivates the development of high bandwidth junction temperature
measurement techniques with good SNR and little delay. They enable a high observer
bandwidth and thereby allow accurate 3-D distributed temperature estimations insensitive
to modeling errors. On-chip temperature sensors [163] and junction temperature sensing
techniques based on TSEPs, e.g. gate plateau sensing that was investigate in this work or
alternative techniques [222], are an excellent choice for this task.
Dynamic stiffness (DS) of estimation error In a next step, the DS of the estimation error
is analyzed for the introduced thermal observer. The dynamic stiffness of the estimation
error is a performance metric for observers that was introduced in [191]. It quantifies the
disturbance losses, which are not passed to the observer via its feedforward path due to
loss model inaccuracies, that result in a temperature estimation error of 1 K. The dynamic
stiffness of the estimation error of the IGBT junction and substrate temperature are plotted
in Figure 5.20 for three different bandwidths of the proportional feedback path and two
ratios between the bandwidth of the integral and the proportional bandwidth.
First, the DS of the estimation error of the IGBT junction temperature is discussed. The
integral feedback path ensures that disturbance losses at low-frequency excitation are excel-
lently rejected and constant (DC) disturbances are completely eliminated. In the medium
frequency range the worst case DS of the estimation error occurs which is directly given by
−1
the sum of the thermal conductance bth = Rth and the proportional feedback gain Kp,o .
127
Junction temperature (IGBTA) Substrate (lower solder interface) temperature (IGBTA)

3 3
Loss estimation error Bandwidth Loss estimation error Bandwidth
fb = 2 Hz fb = 2 Hz
2.5 No error 2.5 No error
|Ts (jw)/Ts(jw)| in pu
fb = 6 Hz f = 6 Hz
|Tj (jw)/Tj(jw)| in pu
b
+20 % +20 %
2 -20 % 2 -20 %
1.5 1.5
1 1
0.5 0.5
Measurement delay 1ms Ts = 1 ms Measurement delay 1ms Ts = 1 ms
0 0
90 90
arg(Ts (jw)/Ts(jw)) in °
arg(Tj (jw)/Tj(jw)) in °
45 45
0 0
-45 -45
-90 -90
10-2 100 102 10-2 100 102
Frequency in Hz Frequency in Hz
3 3
Loss estimation error Bandwidth Loss estimation error Bandwidth
fb = 2 Hz fb = 2 Hz
fb = 6 Hz fb = 6 Hz
+20 % +20 %
2 -20 % 2 -20 %
1.5 1.5
1 1
0.5 0.5
Measurement delay 10 ms Ts = 1 ms Measurement delay 10 ms Ts = 1 ms
0 0
90 90
45 45
0 0
-45 -45
-90 -90
10-2 100 102 10-2 100 102
Figure 5.19: Estimation accuracy (EA) of the IGBT and its substrate temperature (IG-
BTA) at different bandwidths and measurement delays
As a consequence, the DS of the estimation error can be increased by a large proportional
128

104 104
Bandwidth (fb,p) Feedback gain Kp,o
|DPloss(jw)/(Ts -Ts)(jw)| in W/K

2 Hz 16 W/K
|DPloss(jw)/(Tj -Tj)(jw)| in W/K
4 Hz 45 W/K
3
6 Hz 75 W/K
10 103
Integral bandwidth
fb,i1 = 1/5 fb,p
fb,i2 = 1/20 fb,p
-1
102 Kp,o+ Rth
-1
102
Kp,o+Rth
-1
Kp,o+Rth
Measurement delay 1ms Ts = 1ms Measurement delay 1 ms Ts = 1ms

101 fb,i2 fb,i2 fb,i2 0 fb,p fb,p fb,p 101
10-2 10 102 10-2 100 102
Figure 5.20: Dynamic stiffness of the estimation error of the IGBT junction and substrate
layer temperature in case of different state feedback designs
feedback gain Kp,o . Similarly, a larger integral feedback gain leads to a higher integral
feedback bandwidth and to a better rejection of disturbances and model inaccuracies at
low frequencies. In the high frequency range, the state feedback paths cannot provide any
additional stiffness. The DS of the estimation accuracy in this frequency range is given by
the physical properties of the thermal system, primarily its thermal capacitances.
In comparison to the junction temperature Tj , the substrate temperature Tsd,down , which
is captured at the interface of the substrate and the lower solder layer, exhibits a better
DS of the estimation error. This effect occurs because the thermal capacitance and heat
spreading of the material layers between the device and the substrate solder layer buffer
transient thermal excitations and effectively exhibit a low-pass filter characteristic. Fur-
thermore, the thermal resistance between the substrate and ambient is smaller than the
thermal resistance between junction and ambient leading to a higher worst-case stiffness in
the medium frequency range. This observation suggests that the observer based estimation
of all temperature nodes within the power module that are surrounded by layers of thermal
capacitances and resistances are less affected by inaccuracies in the loss estimation than the
junction temperatures themselves.
Loss error estimation accuracy (EA) Finally, the loss error EA is investigated for IG-
BTA and DiodeA which is depicted in Figure 5.21. It shows that the integral feedback path
estimates and compensates the error of the loss model at low bandwidth with unity gain
and nearly zero lag. Within the proportional bandwidth of the observer, the loss error is
estimated with a steady-state error. This steady state error occurs because of the parallel
feedback of the virtual zero reference, which is intrinsically applied by the thermal con-
−1
ductance bth = Rth within the observer model, and the proportional state feedback path
of the observer with the gain Kp,o . Consequently, the steady state error can be reduced
with a higher proportional feedback gain Kp,o . Above the proportional bandwidth of the
observer, loss estimation errors from the device loss model can neither be estimated nor
129
IGBTA DiodeA
3 3
Bandwidth (fb,p) Feedback gain Kp,o Bandwidth (fb,p) Feedback gain Kp,o
|DPloss(jw)/DPloss(jw)| in pu
2.5 2 Hz 16 W/K 2.5 2 Hz 4 W/K
4 Hz 45 W/K 4 Hz 16 W/K
2 6 Hz 75 W/K 2 6 Hz 30 W/K
Integral bandwidth Integral bandwidth
1.5 fb,i = 1/5 fb,i 1.5 fb,i = 1/5 fb,i
1 1
0.5 0.5
Measurement delay 10 ms Measurement delay 10 ms
0 0
90 90
arg(DPloss(jw)/DPloss(jw)) in °
45 45
0 0
-45 -45
-90 -90
10-2 100 102 10-2 100 102
Figure 5.21: Loss error estimation accuracy (EA) of the IGBT and diode device losses in
case of different state feedback designs
corrected. Nevertheless, the selection of higher feedback gains increases the bandwidth of
the loss error estimation. However, as discussed in the previous paragraphs, the delays in
the feedback loop that need to be inserted for consistency limit the maximum bandwidth.
If the bandwidth approaches this limit, the excitation of resonances becomes visible and
degrades the performance of the estimation process.
Overall performance The metrics that were presented for the thermal observer demon-
strate that a 3-D spatial thermal observer that utilizes a truncated FVM model is feasible
and exhibits desirable estimation properties. These include an estimation accuracy with
minimal magnitude error and nearly zero phase lag, a high dynamic stiffness of the esti-
mation error and unity gain loss error estimation accuracy over the feedback bandwidth of
the observer. Furthermore, this work showed that thermal observers with a truncated FVM
model can be designed with a physics-based design methodology that was introduced in this
section following the key concepts of [191].
5.2.4 Combined Instantaneous and Averaged Thermal Observer

For the monitoring and control of most dc-dc converters the presented thermal observer
structure, which estimates the instantaneous losses and temperatures within the power
module, is an adequate and robust solution. However, for the monitoring and, even more
important, for the control of AC applications an observer structure that estimates the
130
i
rst Power Module
rst
Converter rstx
Rgate
udc dt Tj
n
z-n
Tsz-1
Ki Ploss(X conv) Thermal Model
1 - z-1
Tj(k-n) ~D ~D total
q1(k+1)= A q1(k)+B Ploss(k) T out Tspatial(k)
Kp ~D
total
Ploss Tout(k)= C q1 (k) +Tf Tj(k)
DPloss
DPloss(k)
Tj(k-n)
z-n
Tsz-1 X conv Average Loss

Ki A Estimation Thermal Model
1 - z-1 avg
Ploss(X conv)
Tj(k) ~D
avg,total
~D avg avg
A
q1(k+1)= A q1(k)+B Ploss(k) Tout Tspatial(k)
Kp ~D avg
avg
avg,total
P loss Tout(k)= C q1 (k) +Tf Tj(k)
avg
DPloss
Tj(k) avg
DPloss(k)
Figure 5.22: Enhanced thermal observer structure for instantaneous and averaged loss and
temperature estimation
averaged losses and temperatures becomes necessary. Its primary task is the estimation
of averaged thermal properties over one electrical excitation period without any lag. The
resulting monitored temperatures and device losses must not exhibit any pulsations that
reflect the alternating nature of the current. Instead it should only include dynamics that
are induced by the load.
It was identified in the state-of-the-art review of this work that the estimation of these
averaged thermal variables with insensitivity to modeling error has not yet been achieved.
For this reason, it is discussed in the following how the thermal observer structure, which
was introduced in section 5.2.3, can be enhanced such that it additionally estimates all losses
and temperatures averaged over one electrical excitation period.
5.2.4.1 Cascaded Thermal Observer Structure

Within this work, in a first attempt, a cascaded observer structure has been proposed that
has been published in [310]. Its state block diagram is depicted in Figure 5.22. The first
stage of the cascaded observer estimates the instantaneous losses and temperatures of the
power module and is identical to the observer structure that has been discussed in 5.2.3.
avg
However, the cascaded second stage of the observer receives the averaged loss estimates P̂ loss
avg
as a command feedforward to predict the averaged power module temperatures T̂ out . The
avg
averaged junction temperature estimate T̂ j of the second observer stage is compared with
the instantaneous junction temperature estimate T̂ j of the fist observer stage and fed back
via a proportional and integral feedback path to correct the prediction process. An in-depth
131
discussion of this cascaded topology can be found in [310].

It is essential that the feedback gains of the second observer stage are designed such that
a low bandwidth is obtained. This is important because the observer must not track the
thermal transients that occur at the excitation frequency. Consequently, the proportional
and integral feedback path of the second observer stage are supposed to only compensate
avg
averaged deviations of the error T̂ j − T̂ j . If the state feedback bandwidth of the second
observer stage is set too high, the thermal transients that are occurring as a consequence of
avg
the alternating current will be injected via the observer state feedback ∆P̂ loss . In [310], which
has been published during the course of this work, it has been experimentally shown that this
structure is feasible. However, it exhibits the intrinsic limitation that the dynamic stiffness
of the estimation error is heavily reduced, because of the low state feedback bandwidth that
enforces a design with low feedback gains (5.36). As a consequence, the averaged loss and
temperature estimation of the cascaded observer structure are prone to be influenced by
disturbance, e.g. errors in the loss estimation. This presents a severe limitation, because
the loss estimation process is based on models that typically have limited accuracy with
errors in the range of 5 % to 20 %.
5.2.4.2 Enhanced Thermal Observer Structure

To overcome this limitation an enhanced thermal observer structure has been developed in
this work that employs the bandwidth partitioning concept to estimate the instantaneous
and averaged losses and temperature distributions within the power module separately with
high bandwidth and nearly zero lag. With this technique, the averaged temperature over one
electrical excitation period can be estimated with an estimation accuracy and insensitivity
to model inaccuracies and disturbances that was not be achieved by prior state-of-the-art
observer structures. The state block diagram of the enhanced observer structure is depicted
in Figure 5.23.
Operation principle In the following, the operation principle of the enhanced observer
structure is illustrated. In a first step, the operation vector X conv is used to compute the
avg
instantaneous and averaged losses, P̂ loss and P̂ loss . In a next step, the averaged losses are
t
subtracted from the instantaneous losses to determine the transient losses P̂ loss that only
exhibit high bandwidth loss information.
The transient losses and the averaged losses are passed to two identical instances of the
t
thermal model. Thereby, the transient and the averaged temperature vectors T̂ out and
avg t
T̂ out are predicted separately. The transient temperature vector T̂ out only exhibits the high
avg
bandwidth temperature information, whereas the averaged temperature vector T̂ out exhibits
only low bandwidth temperature information. If both temperature components are added
t avg
together, the instantaneous temperature T̂ out = T̂ out + T̂ out is obtained. The junction tem-
perature estimates T̂ j , which are embedded in T̂ out , are delayed by the measurement delay
n to ensure consistency and are compared with real-time junction temperature information.
This is either extracted with IR sensors in a laboratory environment [310], measured with
on-chip temperature sensors [163] or extracted based on TSEPs, e.g. gate plateau voltage
based temperature sensing that was introduced in this work [309].
132
i
rst Power Module
rst
Converter rstx
Rgate
udc dt Tj
n
z-n
avg
High-Frequency Temperature Estimation

t avg
Ploss Ploss ~D ~D total t t
Tj(k-n) q1(k+1)= A q1(k)+B Ploss(k) T out Tspatial(k)
Kp ~D t
total
t Ploss Tout(k)= C q1 (k) Tj(k)
DPloss t
DPloss(k)
Tj(k-n) Tj(k-n) Tj(k)
z-n
Tj(k)
avg Low-Frequency Temperature Estimation
Ploss Tspatial(k)
DTj
avg ~D ~D total avg
Tsz -1
DPloss q1(k+1)= A q1(k)+B Ploss(k) T out avg
Tspatial(k)
Ki ~D
1 - z-1 Tout(k)= C q1 (k) +Tf avg
Tj(k)
avg
DPloss(k)
Figure 5.23: Enhanced thermal observer structure for instantaneous and averaged loss and
temperature estimation
If there is an error between the junction temperature prediction and the measurement,
this error ∆T̂ is multiplied by a proportional feedback gain Kp,o to correct the transient
temperature estimation. It is also passed to an integrator with the gain Ki,o such that the
accumulated error can correct the averaged loss prediction. Thereby, the high bandwidth
error is used to correct the transient temperature estimation, whereas any error at low
bandwidth and dc is used to correct the averaged temperature estimation. In the following,
this method is referred to as bandwidth partitioning. It has been developed in this work
based on the conceptual background of [192] which demonstrated how drive systems with
different bandwidths can be effectively combined to meet wide frequency process objectives.
Due to bandwidth partitioning, the observer based estimation of the averaged temperature
achieves a bandwidth and consequently an insensitivity to modeling errors and disturbances
that could not be achieved with prior observers.
Design aspects The design of the enhanced thermal observer can be pursued in analogy to
the instantaneous thermal observer. The bandwidth of the transient loss correction can be
adjusted via Kp,o and the bandwidth of the averaged loss correction can be adjusted via Ki,o
based on (5.36). By adjusting the ratio between integral and proportional feedback gain
Ki,o /Kp,o , the bandwidth at which the correction of the low- and high-bandwidth model
occurs can be changed. As a consequence, for identical design limitations given by the
measurement noise and delay, the feedback gains of this enhanced thermal observer and the
firstly introduced instantaneous thermal observer can be designed identically.
133

3 3
Loss estimation error Temperature estimate Loss estimation error Temperature estimate
Averaged Averaged
Instantaneous Instantaneous
+20 % +20 %
2 -20 % 2 -20 %
1.5 1.5
1 1
0.5 0.5
0 0
90 90
45 45
0 0
-45 -45
-90 -90
10-2 100 102 10-2 100 102
Figure 5.24: EA of the instantaneous and averaged IGBT junction and substrate temper-
ature of the enhanced thermal observer structure
Averaged junction temperature (IGBTA) Averaged substrate temperature (IGBTA)

3 3
Loss estimation error Observer structure Loss estimation error Observer structure
Cascaded Cascaded
|Ts (jw)/Ts (jw)| in pu
|Tj (jw)/Tj (jw)| in pu
2.5 No error Enhanced 2.5 No error Enhanced

+20 % +20 %
2 -20 % 2 -20 %
avg
avg
1.5 1.5
1 1
avg
avg
0.5 0.5
0 0
90 90
arg(Ts (jw)/Ts (jw)) in °
arg(Tj (jw)/Tj (jw)) in °
45 45
avg
avg
0 0
avg
avg
-45 -45
-90 -90
10-2 100 102 10-2 100 102
Figure 5.25: EA of the averaged IGBT junction and substrate temperature of the cas-
caded and the enhanced thermal observer with a feedback design according
to Table 5.8
134
Table 5.8: Bandwidths and IGBT feedback gains of the enhanced and cascaded thermal
observer with 24 states, a sampling time of Ts = 1 ms and a measurement delay
of Tdelay = 1 ms (The downscaling factor for the diode feedback gains is 2.5)
IGBT IGBT 2 2 2 2
Observer Kp,o Ki,o fb,p fb,p Kp,o Ki,o fb,p fb,p
Cascaded 74 W K−1 650 W K−1 s−1 6 Hz 1.2 Hz 0.7 W K−1 s−1 5.5 W K−1 s−1 50 mHz 10 mHz
Enhanced 74 W K−1 650 W K−1 s−1 6 Hz 1.2 Hz - - - -
Performance analysis This paragraph studies the performance of the enhanced thermal
observer that is designed according to Table 5.8. Figure 5.24 shows the estimation accura-
cies of the instantaneous and averaged IGBT junction and substrate temperatures in case
of an accurate loss estimation and in case of loss model inaccuracies of ±20 %. In case of an
accurate loss model, the observer estimates both temperatures with nearly no magnitude
error and phase lag over a wide bandwidth. The deviation of the substrate temperature
estimation accuracy at high bandwidth results only from the model truncation that deterio-
rates the high bandwidth model accuracy. Consequently, if a higher order model is selected
this deviation of the substrate temperature estimation accuracy is shifted to even higher
bandwidth. If there is a loss estimation error, the magnitude of the instantaneous estimates
starts to deviate above the proportional state feedback bandwidth of 6 Hz. Similarly, the
magnitude of the averaged estimates deviates above the integral state feedback bandwidth
of 1.2 Hz. However, the maximum magnitude deviation is bounded by the ±20 % inaccuracy
of the device loss estimation. The most important observation from this study is that the
averaged temperatures are estimated with feedback correction over a wide frequency range,
in this case up to 1.2 Hz, with insensitivity from loss estimation errors. Even more impor-
tant, the averaged temperatures is estimated over the entire frequency range with nearly
zero lag. This performance could not be achieved by any prior observer structure and is
only achieved due to the utilization of the bandwidth partitioning concept.
To underline the strength of the enhanced thermal observer structure, it is compared to
a cascaded thermal observer structure. Both observers are optimized for an identical sensor
and sampling rate. Nevertheless, the second stage of the cascaded thermal observer, which
estimates averaged temperatures, must be designed with a low bandwidth of 0.05 Hz for the
proportional feedback loop and 0.01 Hz for the integral feedback loop. This low bandwidth
design cannot be avoided because it ensures that the thermal cycling due to the current
alternation at excitation frequency is not injected into the averaged temperature estimates.
The estimation accuracy of the averaged temperature estimates of both observer struc-
tures are overlaid in Figure 5.25. The magnitude deviation in case of loss estimation error
occurs at a significant lower bandwidth for the cascaded observer than it occurs for the
enhanced observer structure. Furthermore, the phase of the enhanced observer stays much
more aligned to zero than the phase of the cascaded observer. This clearly shows that
the enhanced thermal observer provides a significant better estimation accuracy than the
cascaded observer.
The performance difference between both structures becomes even more visible if the DS
of the estimation error of the averaged temperature estimates obtained by both observers is
compared, which is shown in Figure 5.26. The DS of the estimation error of the enhanced
135
Averaged junction temperature (IGBTA) Averaged substrate temperature (IGBTA)

105 105
Observer structure Observer structure
Cascaded Cascaded
|DPloss(jw)/(Ts -Ts)(jw)| in W/K

|DPloss(jw)/(Tj -Tj)(jw)| in W/IK
Enhanced Enhanced
104 104
103 103
102 102
Measurement delay 1ms Ts = 1 ms Measurement delay 1 ms Ts = 1 ms

101 101
10-2 100 102 10-2 100 102
Figure 5.26: Dynamic stiffness of the estimation error of the averaged IGBT junction and
substrate temperature of the cascaded and the enhanced thermal observer
with a state feedback design according to Table 5.8
thermal observer is one decade larger than the DS of the estimation error of the cascaded
thermal observer. As a consequence, the effect of all loss estimation errors on the tempera-
ture estimation process is reduced by a factor of 10 if an enhanced thermal observer is used
instead of a cascaded one. The worst-case DS of the estimation error that can be achieved
with the enhanced thermal observer is 100 W K−1 . This means that even a 100 W error in
the loss estimation process can only lead to 1 K error in the temperature estimation process.
Finally, the loss error EA of one IGBT and one diode are analyzed for both the observer
structures based on Figure 5.27. The instantaneous loss error estimation accuracy is identical
for both observer structures. However, the averaged loss error estimation accuracy of the
cascaded observer structure can only estimate the averaged loss estimation error within a
bandwidth of 0.05 Hz. This directly reflects the small bandwidth of the second stage of the
cascaded thermal observer that cannot be avoided. The enhanced thermal observer does not
exhibit this limitation and can estimate the error of the loss estimation within a bandwidth
of 1.2 Hz. The large bandwidth of the averaged loss error estimate is an important feature.
It provides information about static and low-bandwidth dynamic inaccuracies of the loss
estimation and the thermal model. It will be illustrated in the following section how this
information can be used to calibrate the loss model or to detect failure mechanisms of the
device or the material interfaces within the module.
Simulation results In the following, the performance of the enhanced thermal observer
structure, that is able to estimate device losses and the temperatures throughout the power
module, is evaluated in a simulation. A 5 s excerpt of the simulation results, which were
originally discussed in chapter 4.3, were processed within the observer structure. Figure 5.28
depicts in the first trace the instantaneous and averaged temperature estimates within the
observer, T̂x and T̂xavg , of the IGBTA junction, the substrate solder layer below IGBTA and
the base plate. The second trace shows the errors between the observer based estimates and
136
IGBTA DiodeA
3 3
Observer Structure Estimate Observer Structure Estimate
Cascaded Averaged Cascaded Averaged
2.5 2.5
Enhanced Instantaneous Enhanced Instantaneous
2 2
1.5 1.5
1 1
0.5 0.5
Measurement Delay 1 ms Measurement Delay 1 ms
0 0
90 90
45 45
0 0
-45 -45
-90 -90
10-2 100 102 10-2 100 102
Figure 5.27: Loss error estimation accuracy of IGBTA and DiodeA of the cascaded and
the enhanced thermal observer with a state feedback design according to
Table 5.8
the temperatures obtained with a detailed model. In the last three traces the loss estimates,
as well as their transient and averaged component are illustrated.
Note, that initially, until t < 21.5 s, the averaged and instantaneous losses are estimated
with an instantaneous loss equation, because this provides better estimates at low excitation
frequencies. At a simulation time of 24 s a loss error of 20 % is induced in the power module
to investigate the reaction of the thermal observer.
Before triggering the loss model deviation, the observer structure accurately estimates
the IGBT losses and the temperatures at the junction, the substrate solder layer and the
base plate. After the injection of the loss error, the proportional and integral feedback path
effectively estimate the disturbances losses. The averaged disturbance losses are estimated
with zero steady state error, whereas the transient losses are estimated with a magnitude and
phase error like it has been expected from the analysis of the loss error estimation accuracy
in Figure 5.27. The spatial temperatures are estimated with zero averaged temperature
error and a tolerable small transient temperature error that is bounded by an error margin
of 20 %, that was expected based on the previous frequency domain analysis. The simulation
results demonstrate that the observer structure operates as expected and estimates averaged
and transient device losses and 3-D temperatures within the power module with zero phase
lag and minimal magnitude error.
137
150
Instantaneous
Averaged
Tx in °C
100
50
0
21 21.5 22 22.5 23 23.5 24 24.5 25 25.5 26
10
Temperature node x
Tx -Tx in K
5 Junction
Substrate solder
Base plate
0
-5
21 21.5 22 22.5 23 23.5 24 24.5 25 25.5 26
4000
Instantaneous
Averaged
Ploss in W
2000
-2000
21 21.5 22 22.5 23 23.5 24 24.5 25 25.5 26
500
Disturbance loss
DPloss in W
Disturbance loss estimate
0
t
-500
21 21.5 22 22.5 23 23.5 24 24.5 25 25.5 26
200
Disturbance loss
DPloss in W
Disturbance loss estimate

100
avg
-100
21 21.5 22 22.5 23 23.5 24 24.5 25 25.5 26
Time in s
Figure 5.28: Simulation of the estimated IGBT temperature vector using the enhanced
thermal observer over the load profile that was introduced in 4.3 with 20 %
disturbance loss injected at t = 24 s
5.2.5 Adaptive Observer for Switching Loss Model Calibration

A strong limitation of most loss and temperature estimation methods is the limited accuracy
of the loss model, in particular the accurate prediction of switching losses. Typically, the
device losses are predicted with a parametric conduction and switching loss model [313].
The conduction losses are typically provided by the manufacturer with reasonable accuracy.
However, for the switching losses in most data sheets only little data is provided and its
accuracy must be assessed with care. Besides differences within the switching characteristics
of each device caused for example by threshold voltage variations, the parasitics of each
138
i rst Power Module

d rst Power Device DPloss Thermal Interface
Converter rstx
Rgate
Udc Ploss(X conv) dT
fsw dt Tj
Dfsw
-n k
z
Measurement Noise
DK0 avg
Loss Estimation
High Bandwidth Temperature Estimation

t avg
Ploss Ploss ~D ~D total t t t
Tj(k-n) q1(k+1)= A q1(k)+B Ploss(k) T out Tspatial(k)
Kp ~D t
total
t Ploss Tout(k)= C q1 (k) Tj(k)
DPloss t
DPloss(k)
Tj(k-n) Tj(k-n) Tj(k)
z-n
Tj(k)
avg Low Bandwidth Temperature Estimation
Ploss Tspatial(k)
DTj
avg ~D ~D total
Tsz -1
DPloss q1(k+1)= A q1(k)+B Ploss(k) T out avg
Tspatial(k)
Ki ~D
1 - z-1 Tout(k)= C q1 (k) avg
Tj(k)
avg
MRAS
DPloss(k)
dDK0 avg
DK0 Tsz-1 dt K (I) DPloss

1 - z-1
i
Dfsw
Figure 5.29: Adaptive thermal observer-based switching loss parameter identification
converter are different. As a result, individual calibration of each IGBT power module
is normally the only choice. Nevertheless, the extraction of an accurate switching loss
model is time intensive [313] and difficult, because without very precise modeling of the
measurement equipment the switching loss measurements typically exhibit errors between
5 and 15 % according to [7].
In the following, an alternative approach is presented that allows calibrating the switch-
ing loss model in real-time during converter operation. Therefore, the enhanced thermal
observer structure introduced in section 5.2.4.2 is modified to an adaptive thermal observer
structure that has been derived within this work and was published in [311]. The resulting
observer structure with the embedded model reference adaptive system (MRAS) [17], which
achieves the real-time switching loss model calibration, is illustrated in Figure 5.29.
Operation principle In the following, the functional principle of the model reference adap-
tive system (MRAS) observer is illustrated. For most applications the gate resistance Rg
and the dc-link voltage udc remain constant over the operation of the power module. As a
consequence, the averaged switching losses of the IGBT and the diode, that were derived in
chapter 3.1 can be approximated according to (5.37) and (5.38).
α β !
avg,IGBT E0 K0 ˆ udc Rg K T K0 ˆ
+ Tj − Tjref

Ploss,sw = + I ref
· fpwm ≈ · I · fpwm
2 π udc Rg 2 π
(5.37)
139
α −β
K0 rec ˆ

avg,Diode udc Rg ref
rec

Ploss,sw = ·I · · · 1 + Tj − Tj · K T · fpwm ≈ 0 (5.38)
π uref
dc Rgref
It is assumed that the diode exhibits no switching losses, because they are negligibly small
compared to the conduction losses of the diode over nearly the entire operation range of the
converter. The IGBT losses are dominated by the current dependent term because their
temperature dependency is small as well as the model offset. This shows that for an accurate
prediction of the device switching losses it is most critical to determine the switching loss
gain K0 accurately.
For the identification of the switching loss coefficient K0 a rectangular excitation signal
∆fpwm (t) at a frequency of fex 1
with an amplitude of ∆fˆpwm is added to the switching
0 1
frequency fpwm (t) = fpwm +∆fpwm (t). It is important that the excitation frequency of fex lies
within the bandwidth of the averaged temperature and loss estimation of the observer. Any
avg 1
error of the loss prediction ∆P̂ loss at this particular frequency fex can only occur due to errors
of the loss model and primary due to K0 . Thus, by correlation of the averaged loss prediction
avg
error ∆P̂ loss with the excitation signal ∆fpwm (t) and integration, a correction signal can be
generated that allows the adaptively correction of parameter deviations ∆K0 within the
switching loss model. This process intrinsically drives the estimate of the switching loss
parameter K0 to the right value and stops if the estimate is correct, because for a decaying
estimation error the correlated loss estimation error approaches zero. To comply with the
MIT-rule [17], which is often used for the design of MRAS, the gain is selected proportional
to the current amplitude Km = km · I. ˆ Note that the convergence speed of the adaption can
be increased if the gain km is augmented. However, this leads to the injection of additional
noise and excites resonances if km is increased over a certain threshold.
Simulation Results This section discusses simulation results that show the instantaneous
and averaged estimation of the device losses and the junction temperatures during adaptive
calibration of the loss model. The simulation results are depicted in Figure 5.30. Initially,
the switching loss parameter K0 is set to zero and the loss model calibration is activated.
This adds a periodic rectangular excitation signal with a frequency of 8 Hz and an amplitude
of 200 Hz to the PWM frequency. The adaption process is only activated if the excitation
frequency of the current exceeds 12 Hz to avoid crosscoupling. Without the adaption, the
switching loss model is not accurate and the loss deviation that occurs is estimated as a loss
error by the observer to correct the temperature estimates within the observer bandwidth.
After its activation, the adaption process estimates the correct switching loss gain K0 within
25 s. Simultaneously, the loss estimation error decays to zero.
The simulation results demonstrate the functional principle of real-time MRAS based
loss model calibration. This technique can calibrate the loss model of individual converter
systems at initial operation and thereby can help to eliminate the need for time-consuming
off-line calibration.
5.2.6 Utilization of NTC Sensors in Thermal Monitoring

Finally, it is investigated how the NTC temperature sensor of a power module can be used
to improve the accuracy of thermal monitoring systems. The NTC is mounted on the DCB
140
1000
IGBTA
Ploss in W
500
0
Losses in W
Loss error in W
-500
0 10 20 30 40 50 60 70 80
100
IGBTA
TJ in K
50
Instantaneous temperature
Averaged temperature
0
0 10 20 30 40 50 60 70 80
0.2
IGBTA
Ksw in mJ/A
0.1
0
Estimated switching loss gain of IGBTA
-0.1
0 10 20 30 40 50 60 70 80
Time in s
Figure 5.30: Simulation of the adaptive switching loss model calibration for one IGBT
during normal converter operation
substrate of most power modules, as illustrated in Figure 5.31. Thus, it allows tracking the
temperature of the DCB and the base plate and in particular reflects changes of the coolant
temperature Tf .
For the extraction of the NTC temperature typically a voltage divider circuit is used that
linearizes the nonlinear temperature characteristics of the NTC. The resulting signal must
be galvanically isolated and processed through low-pass filters to reject any induced EMI or
voltages spikes. This signal conditioning process, which is required to obtain smooth NTC
temperature measurement, is discussed in-depth in [139].
It is important to realize that the NTC temperature does not directly reflect the temper-
ature of the devices as discussed in [146, 272]. The reason for this is its large time constant
and its mounting location on top of the substrate separated from the devices, which is shown
in Figure 5.31. As a consequence of this mounting location, the thermal coupling resistance,
which indicates the temperature drop between the NTC and the coolant for a given heat
IGBT−NTC
dissipation of the IGBT, is Rth = 0.01 K W−1 according to Figure 4.18. Thus, a loss
excitation of one IGBT with 100 W results only into a NTC temperature change of 1 K.
However, the NTC temperature can be used either to estimate or to correct the coolant
temperature of the power module, thereby improving the thermal monitoring accuracy. For
the predictor and observer structures that have been discussed so far in this work it was
assumed that the coolant temperature remains constant and is well known. Nevertheless,
in most practical applications this is not the case. Thus, it is discussed in the following
how the NTC temperature can be effectively used to estimate the coolant temperature.
Alternatively, if the coolant temperature is measured with a sensor, the NTC temperature
141
IGBTA X conv Tout

Thermal
Tf TNTC TNTC
DiodeA
Estimator
DTNTC
NTC -1
Tsz NTC
1 - z-1
Ki
DiodeB DTf Tsz -1
IGBTB
1 - z-1
KpNTC
Tf
Figure 5.31: NTC within Hybrid- Figure 5.32: NTC sensor based coolant tempera-
pack2 power module ture observer
can be effectively used to estimate the coolant temperature redundantly or even to detect
deteriorations of the convection process or delamination between the base plate and the
heat sink of the power module.
In order to achieve the described objectives, the NTC temperature can be incorporated
to the developed real-time monitoring solutions, e.g. the predictor and the observers, as
illustrated in Figure 5.32. The operation principle of the resulting NTC based coolant
temperature observer is introduced in the following.
Operation principle The NTC temperature feedback loop is closed via a thermal estima-
tor. All thermal estimators require the operation vector of the converter X conv , which was
introduced in the previous sections, and the coolant temperature Tf to estimate the power
module temperatures T̂ out and the NTC temperature T̂NTC . The NTC temperature T̂NTC
estimate is compared with the measured NTC temperature TNTC to compute the estimation
error ∆T̂NTC . This error ∆T̂NTC is fed to a proportional and integral feedback path with
the gains KpNTC and KiNTC . Both feedback paths are connected to a second integration
stage that can be physically interpreted as a thermal model of the coolant, which virtually
represents its heat capacitance. Consequently, the output state of this integrator is the
coolant temperature estimate T̂f that is added to the coolant temperature measurement, if
available, and passed to the thermal estimator. In case of an error ∆T̂NTC , the PI regulator
increases the estimated coolant temperature T̂f until the NTC temperature estimation error
∆T̂NTC is forced to zero. Thereby, the NTC temperature is used to effectively correct or
entirely estimate the coolant temperature.
This way, the NTC sensor can either be used as a replacement of the coolant temperature
sensor. Alternatively, it provides additional redundancy. In that case the NTC information
can be continuously used to correct the measured coolant temperature. If the correction term
∆Tf significantly increases during operation, this is a strong indicator for a deterioration
of the thermal interface between the coolant and the DCB. This can either be due to
delamination of the DCB substrate. Alternatively, the convection process is deteriorated,
e.g. because the liquid flow is impaired by blockages in the convection system or a failure
of the pumping system occurred.
142
Feedback design The bandwidth of the proportional feedback path fb can be set with the
feedback gain KpNTC according to (5.39).
KpNTC = 2π · fb (5.39)
The bandwidth fb is typically small and must only be large enough such that it tracks
changes of the coolant temperature Tf appropriately. The integral state feedback gain KpNTC
is selected according to (5.40) such that its eigenvalues (EV) are located a decade below the
proportional feedback loop.
2π · fb
KiNTC = · KpNTC (5.40)
10
Thereby it is ensured that the NTC observer is well damped and an error between the NTC
estimate and measurement ∆T̂NTC is rapidly compensated.
Simulation The performance of the enhanced thermal observer with and without NTC
correction has been evaluated in a simulation over the load profile that was introduced in
4.3. The simulation results are depicted in Figure 5.33. The first trace shows the averaged
IGBT junction temperature. The second and third trace show the estimation error of the
junction, the substrate and the NTC temperature in case of an activated or a deactivated
NTC temperature correction. In the last trace, the coolant temperature and its estimate
are depicted in case of an activated and a deactivated NTC observer. During the simulation
over a duration of 30 s the coolant temperature was increased from 25 ◦C to 35 ◦C. However,
the observer receives an incorrect constant coolant temperature information of 25 ◦C from
a broken sensor during the entire simulation.
If the NTC correction is deactivated, the incorrect coolant temperature of 25 ◦C is used
within the enhanced thermal observer structure. Thus, it interprets the junction temper-
ature rise, that occurs due to the rising coolant temperature, as overestimation of its loss
estimates. As a consequence, the enhanced thermal observer reduces its loss estimates with
its internal feedback correction such that the junction temperature is more accurately esti-
mated. However, this deteriorates the estimation of the internal temperature states within
the power module. As a result, the temperature estimate of the solder layer between sub-
strate and DCB as well as the NTC temperature estimate exhibit an error of 5 K in this
example.
If the observer based NTC correction is activated, the coolant temperature change is
monitored and updated within the enhanced thermal observer structure. During the linear
rise of the coolant temperature, the NTC observer estimates the fluid temperature such
that only a small steady-state error remains that is eliminated when the coolant tempera-
ture reaches a constant level. Due to the corrected estimation of the coolant temperature,
the enhanced thermal observer structure estimates the losses correctly. This results in an
accurate estimation of the temperatures throughout the power module.
Discussion There are several advantages of the proposed method in comparison to state-
of-the-art approaches, e.g. [269, 350]. One advantage is that the NTC based coolant ob-
143
150
Temperature in °C
100
50
Averaged IGBT junction temperature

0
25 30 35 40 45 50 55 60 65 70
Deactivated NTC observer

Temperaturein K
-5 Temperature estimation error

NTC IGBT junction Lower solder layer
25 30 35 40 45 50 55 60 65 70
Activated NTC observer

Temperature in K
-5 Temperature estimation error

NTC IGBT junction Lower solder layer
25 30 35 40 45 50 55 60 65 70
40
Estimated fluid temperature
Temperature in °C
35 Fluid temperature
30
25
Activated NTC observer Deactivated NTC observer
20
25 30 35 40 45 50 55 60 65 70
Time in s
Figure 5.33: Simulation of the enhanced thermal observer with activated and deactivated
NTC-based coolant temperature observer in case of incorrect information
from the coolant temperature sensor of 25 ◦C
server rejects even large noise and spikes from the NTC measurement without compromising
the temperature estimation process, i.e. without introducing additional lag. Following an
approach like presented in [269, 350], typically includes low-pass filtering of the NTC mea-
surement to reject spikes and noise, which will degrade the estimation accuracy in the
low frequency range, because the dynamics of the base plate and convection process are
smoothed by the filter.
A second limitation that is addressed by this technology is that state-of-the-art approaches
typically estimate the temperature difference between the devices and the NTC with a
thermal model. This estimated temperature difference is afterwards added to the low-
144
5.3 Summary
pass filtered NTC measurement to obtain junction temperature estimates. However, the
required partial thermal model is difficult to extract and introduces significant inaccuracies.
The NTC based observer that has been presented in this work avoids this limitation, but
only requires a thermal model of the power module that includes the NTC temperature
as an output. It thereby can estimate the junction temperatures of a power module more
accurately.
A final advantage of this technology is that the NTC correction either makes a coolant
temperature sensor unnecessary. Alternatively, if the coolant temperature is measured,
the NTC observer can detect changes of the thermal interface between the DCB and the
coolant fluid. This can either indicate the delamination of the substrate solder layer or the
deterioration of the convection process, e.g. because the liquid flow is impaired by blockages
in the convection system or because of a failure of a pumping system.
5.3 Summary
This chapter introduced various concepts and techniques for the thermal monitoring of
power electronic modules.
First, a technique for accurate high bandwidth IGBT junction temperature estimation
was presented that utilizes gate plateau voltage and phase current information only. It
was demonstrated that for a typical automotive power module the temperature sensitivity
over the entire operation range lies between 1.5 mV K−1 to 7 mV K−1 . The underlying
physical mechanisms have been identified and physics-based model equations have been
derived to identify the key parameters which impact the temperature estimation process.
A methodology for the systematic derivation of the temperature estimation error has been
derived. It allows determining error bounds for the temperature estimation and enables an
effective comparison of this method with other methods proposed in the literature for various
devices and applications. To demonstrate the experimental feasibility of the temperature
estimation method, a circuit topology for gate voltage plateau sensing was developed and
successfully tested during double pulse tests over a wide operation range.
In the second part of this chapter, real-time thermal monitoring solutions were introduced
that estimate 3-D distributed temperatures and device losses within power modules based
on truncated thermal FVM models and real-time junction temperature information. First,
predictors were introduced for loss and temperature estimation. To improve their insensitiv-
ity to modeling errors and disturbances they were further developed to thermal observers.
These allow closed loop estimation of temperatures and device losses by effective combi-
nation of electrothermal real-time models and real-time junction temperature information.
The developed thermal observer structures were rigorously analyzed and methods for the
optimized tuning of their feedback gains were introduced.
By enhancing thermal observers via bandwidth partitioning, the switching cycle averaged
and excitation cycle averaged temperatures and device losses could be separately estimated.
In particular, the estimation of excitation cycle averaged temperatures that are computed
with insensitivity to modeling errors and disturbances is of great importance. This is because
excitation cycle averaged temperatures are the preferred control quantity in most thermal
management solutions for AC applications. Consequently, the developed observer is used
145
for the active thermal control algorithms yielding active thermal cycle reduction, which is
presented in a following chapter of this work.
To improve the accuracy of the loss estimation without the need for time- and cost-
intensive off-line calibrations, the thermal structure has been modified to a MRAS that
achieves the real-time calibration of the loss model parameters. This can eliminate the need
for an individual loss characterization of power modules before commissioning.
Furthermore, it was demonstrated how the NTC temperature can be effectively used
to improve the estimation accuracy of the thermal estimators. The NTC temperature
information can be used for the correction of the coolant temperature sensor establishing
redundancy. Furthermore, they can even be used to replace a coolant temperature sensor
under certain constraints. The opportunities and limitations of using NTC sensors were
in-depth discussed in this context.
A final feature of the proposed observer structures is their ability to provide information
enabling the detection of power module degradation. However, in the following chapter this
feature is more in-depth reviewed and its potential is discussed.
146
6 Real-Time Degradation Monitoring and
Diagnosis
This chapter starts by proposing a general framework for degradation monitoring of power
electronic modules. Afterwards, it introduces new techniques that can be used within the
framework for real-time degradation monitoring and diagnosis of power electronic modules.
First, degradation indicators that are intrinsically computed by the thermal observer
structures introduced in the previous chapter are reviewed. They allow to detect when the
power module changes its electrothermal characteristic and can be easily computed during
real-time operation based on junction temperature information, which can be obtained, e.g.
with on-chip temperature sensors or TSEP-based approaches. However, these degradation
indicators cannot distinguish whether the device or the thermal interface of the power
module changed their characteristics.
For a more detailed assessment of degradation mechanisms, this work suggests the utiliza-
tion of the frequency response function of the thermal impedance. It is demonstrated based
on various thermal models that the frequency response function of the thermal impedance
provides excellent opportunities to separately identify and quantify various degradation
mechanisms. Consequently, a method is introduced that extracts the thermal impedance
over a wide frequency range in magnitude and phase without interrupting converter opera-
tion. This method is referred to as in-situ thermal impedance spectroscopy (ITIS) in this
work. Finally, a systematic procedure is developed that can identify and quantify localized
degradation based on frequency domain thermal impedance information. This procedure
uses artificial neural networks (ANNs) as an effective tool that is able to separate rele-
vant from irrelevant changes of the thermal impedance for specific degradation mechanisms.
Overall, the developed methodology comprising the ITIS and ANN-based localized degrada-
tion quantification enables efficient degradation monitoring and diagnosis of future converter
systems.
Important aspects of this chapter have been published as a part of this work within the
following publications [238, 311, 314] and have been investigated in a research collabora-
tion with Timothy A. Polom from the Wisconsin Electric Machines and Power Electronics
Consortium (WEMPEC).
6.1 Generic Condition Monitoring of Power Modules

The state-of-the-art review of typical degradation monitoring and state-of-health estimation
methods in chapter 2 motivates the proposal of a generic degradation monitoring and di-
agnosis process. The process, which is presented in Figure 6.1 as a block diagram, includes
a broad spectrum of technologies and is intended to show how power converters can be
monitored in high-reliability applications in the future.
147
6 Real-Time Degradation Monitoring and Diagnosis
Evaluation State of uce Condition

and Health Monitoring
Decision uth
Filtering
Replacement Prognosis Operator
Zth
Request
Device
Maintenance T Observer
Request
Stress Diagnosis Ploss Self
Reduction Sensing dev
Xi
dev
Xex
spwm
ref
ref System dpwm Device dev Gate igate
Xconv Control Control Xm Drivers
dev
Xi
Figure 6.1: State block diagram of a generic degradation monitoring and diagnosis process
The system level control receives an externally generated reference X ref

conv for the converter
operation, which typically includes voltage or current commands. Based on the device
vector X dev
i , which exhibits all available information about the converter as well as the
device operation, e.g. load current, device current, junction temperature, threshold voltage,
forward voltage, the system control generates a duty cycle dref
pwm . This is passed to the device
level control that generates a PWM pattern spwm with a defined carrier frequency for the
gate drivers. If a smart gate driver is applied [97, 196, 314], it can also command other
manipulated inputs X devm to the gate driver, e.g. gate resistances, step-wise gate resistance
sequences, gate voltages or even gate currents. The gate driver applies these commands to
the power device, in this case an IGBT, by injecting the appropriate gate current igate .
The device information X dev
i are collected every switching period and are processed by the
condition monitoring system. It applies appropriate filtering [93, 94], processes the obtain
information within an observer structure [310, 311, 315] and commands device manipula-
tions, e.g. variations of the PWM frequency, the gate resistance or the switching pattern, to
the gate driver and device control unit. The later described device manipulation is referred
to as device self-sensing [311]. This processing of available information and the dynamic
device excitation via self-sensing allows the extraction of valuable reliability critical infor-
mation, e.g. the device losses, the power module temperature, the thermal impedance, the
device forward voltage or the threshold voltage. The obtained information are passed to the
state-of-health estimation unit that uses the information for the state of health diagnosis
and prognosis. The resulting information are evaluated and used to trigger a replacement
and maintenance request if necessary when the power converter is degraded. Alternative
options are the reduction of stress within the devices. That reduction is either achieved by
adjusting the thermal loading via system level control, e.g. by reduction of the peak load
capability, or realized on the device level control, e.g. via active thermal cycle reduction
[314].
Overall, such a condition monitoring system aims to ensure more safe and reliable oper-
ation of future converter systems.
148
6.2 Observer-based Degradation Detection
6.2 Observer-based Degradation Detection

The introduced observer structures, which utilize temperature information to improve the
accuracy of electrothermal real-time models, already intrinsically provide the ability to
detect changes of the electrothermal power module interface. This is a very desirable feature
because it includes the possibility to diagnose degradation of the power module before it
leads to a catastrophic failure. As this feature is barely discussed in the state-of-the-art,
the two major thermal observer structures introduced within this work are reviewed with
respect to their intrinsic ability to detect power module degradation.
Enhanced thermal observer The enhanced thermal observer structure introduced in chap-
avg
ter 5.2.4.2 is able to determine the averaged loss estimation error ∆P̂ loss within its state
feedback bandwidth. This variable can initially be used to calibrate the device loss model,
avg
e.g. as illustrated in section 5.2.5. However, the averaged loss estimation error ∆P̂ loss
is even more important for degradation monitoring. If it changes after converter opera-
tion with sever loading over several years, this typically indicates degradation mechanisms,
which have been discussed in 3.4.1. The forming of voids, delamination of solder and sinter
interfaces and the deterioration of the convection interface due to blockages are typically
indicated by a slow rise of the thermal resistance of the power module Rth . This is reflected
avg
by a slow rise of the averaged loss estimation error ∆P̂ loss at a given loading. Bond wire
lift-offs happen more abruptly such that they result in a fast change of the averaged loss
avg
estimation error ∆P̂ loss at a given loading.
Consequently, if the converter is operated with a periodic load profile, e.g. in a manufac-
turing line, this variable can be recorded once over the entire load profile. Afterwards, the
variable can repeatedly be recorded in order to make a comparison to the original record-
ing. Thereby changes of this variable can be detected and categorized with respect to their
amplitude, direction and rate-of-change. The resulting information can be used for an ap-
proximate degradation diagnosis. A similar procedure can also be applied for non-periodic
loading profiles. However, for this case the degradation diagnosis is more complex, as a lot
of operational data must be recorded to be used for a later comparison.
Note that for this real-time degradation analysis it is important that the coolant is reliably
measured via a sensor and used for the accurate thermal monitoring. Otherwise, changes of
the coolant temperature are compensated by the observer state feedback paths and thereby
avg
extracted as an averaged loss estimation error ∆P̂ loss . This would prevent a meaningful
avg
interpretation of the averaged loss estimation error ∆P̂ loss for degradation analysis.
NTC based coolant temperature observer If the NTC based fluid temperature observer,
introduced in chapter 5.2.6, is applied together with a coolant temperature measurement,
this also provides the ability to detect change in the electrothermal interface of the power
module. In this case, the coolant temperature correction signal ∆Tf in Figure 5.32 is the
signal that can be used to detect whether the thermal interface between the DCB and
the coolant changes over the operation of the power module. A change of this coolant
temperature correction signal ∆Tf indicates that either a delamination of the DCB to base
plate solder layer occurred. Otherwise, it can also indicate that the convection heat transfer
149
from the heat sink to the coolant fluid is deteriorated, e.g. due to blockages of the coolant
system or a broken pumping unit.
If the NTC based coolant temperature observer is used together with an enhanced thermal
observer and a coolant temperature measurement this enables a more detailed degradation
diagnosis. In that case, the NTC based fluid temperature observer can detect and decouple
the discussed changes of the thermal interface between the DCB and the coolant. As a
avg
consequence, the averaged loss estimation error ∆P̂ loss that is estimated by the enhanced
thermal observer provides decoupled information on bond-wire lift-offs as well as on delam-
ination of the device to DCB solder interface. This enables a decoupled detection of device
related degradation on the one hand and degradation between the DCB substrate and the
coolant on the other hand.
The observer based degradation indicators that were discussed in this section only provide
failure indicators that must be correctly interpreted and understood to detect degradation.
However, the next section introduces a more accurate degradation identification and quan-
tification method.
6.3 Degradation Identification in the Frequency Domain

There are three major degradation mechanisms that deteriorate the thermal interface of the
power module between the device and the coolant.
• Deterioration of the convection process due to blockages within the cooling circuit or
failures of the pumping units
• Voids and delamination of the chip-to-substrate solder layer
• Voids and delamination of the DCB-to-baseplate solder layer
In state-of-the art condition monitoring approaches there are two variables that are used to
detect these degradations: Thermal resistance Rth and transient thermal impedance Zth (t).
This work proposes the utilization of the thermal impedance frequency response function
(FRF) Zth (jω) for monitoring these degradation mechanisms.
Limitations of Rth and Zth (t) In the following section, the key limitations of thermal
resistance Rth and transient thermal impedance Zth (t) based degradation detection and
quantification are addressed. Over several decades the thermal resistance Rth has been
monitored in real-time during converter operation [142, 214, 255, 338]. However, all state-
of-the-art approaches that monitor thermal resistance measure the temperature difference
between device and coolant Tj−f and divide it by the estimated device losses P̂loss of the
given operation point. As a consequence, the thermal resistance estimates R̂th = Tj−f /P̂loss
are sensitive to inaccuracies of the loss estimation, which are often in the range of 15 % to
25 %. The resulting estimation error of the thermal resistance makes this method unreliable.
Furthermore, a rise of the thermal resistance only indicates that the thermal interface in
total has changed. It does not allow the separate identification and quantification of different
degradation mechanism that deteriorate the thermal interface.
An alternative is the extraction of the transient thermal impedance Zth (t), whose principle
is described in A.3. A transient thermal impedance characterization is often applied in power
150
6.3 Degradation Identification in the Frequency Domain
cycling tests to evaluate localized degradation [132–134, 288]. A major advantage of the
transient thermal impedance Zth (t) in comparison to the thermal resistance Rth is that
it enables to separately identify localized degradation [132–134]. However, it has various
limitation that are addressed in the following. In state-of-the-art methods, the transient
thermal impedance Zth (t) is always estimated with a thermal impedance test bench using
additional circuitry, e.g. as illustrated in A.3. For this characterization the normal power
module operation must be interrupted. This disqualifies the transient thermal impedance
Zth (t) for real-time condition monitoring, but can only be used during maintenance or in
laboratory environments. Furthermore, the thermal impedance characterization applies a
thermal load step to the device which excites the high bandwidth characteristics of the
power module much less than the low bandwidth characteristics. Thus, the high bandwidth
transient thermal impedance exhibits a degraded accuracy. This problem is even increased
due to the commutation of the heating current to a sensing current that occurs during the
characterization. As the temperature is typically measured via the forward voltage, which is
used as a TSEP at a defined sensing current, the temperature measurement can only begin
after the commutation process is completed. This delay makes the identification of the high
bandwidth thermal impedance even more difficult.
Advantages of thermal impedance frequency response function Zth (jω) This work
aims to overcome these limitations by suggesting the utilization of the FRF of the thermal
impedance Zth (jω) as a degradation indicator.
The FRF of the thermal impedance can be extracted by exciting the device losses either
with a periodic excitation or with white noise and by application of system identification al-
gorithms, as discussed in [241]. Especially, if the periodic loss excitation is used repetitively
over a wide frequency range to identify the magnitude and phase of the thermal impedance,
this provides more accurate information on the thermal power module interface. That is
because this extraction method allows collecting information on the transfer characteristic
of the thermal system at every frequency of interest by long term averaging and correla-
tion of the excitation and the response signal. This makes the extraction of the thermal
impedance FRF less sensitive to disturbances, dc-offsets and noise within the experimental
setup [150, 189]. Furthermore, it allows extracting the transfer characteristic of the thermal
system at higher bandwidths with improved accuracy over Zth (t) based thermal impedance
characterizations in the time domain.
A second advantage of the thermal impedance FRF is the extraction of both, magnitude
and phase characteristics. Similar to the transient thermal impedance Zth (t), the accuracy
of the magnitude |Zth (jω)| depends strongly on an accurate measurement or estimation
of the junction temperature and the devices losses. In many applications this is a severe
problem, because TSEPs, which are often used to extract the temperature, degrade over the
lifetime of a power module. Similarly, if the device losses are estimated, which is typically
done in real-time applications, they exhibit inaccuracy that can be in the range of up to
15 % to 25 %. In comparison to the magnitude |Zth (jω)| the phase information arg(Zth (jω))
provides the great advantage that it can be extracted with great accuracy while providing
information about the thermal interface degradation. This makes thermal impedance phase
information arg(Zth (jω)) ideally suited for degradation identification and quantification.
151
Frequency response function (FRF) plot Nyquist plot

0.03
10-1 Normal Normal
Convection reduction Convection reduction
|Zth,j(jw)| in K/W
Die solder delamination 0.02 Die solder delamination

DCB solder delamination DCB solder delamination
Im{Zth,j(jw)} in K/W
-2
10
0.01
10-3 0
-90 10 mHz
∠(Zth,j(jw)) in °
-0.01
0
-0.02 100 mHz
5 Hz 500 mHz
-45 2 Hz 1 Hz
-0.03
-2 0 2 4 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1
10 10 10 10
Frequency in Hz Re{Zth,j(jw)} in K/W
Degradation estimation accuracy (DEG)

1.5
∠(Zth,j (jw)/Zth,j(jw)) in ° |Zth,j (jw)/Zth,j(jw)| in pu
1
Convection reduction
Die solder delamination
deg
DCB solder delamination

0.5
10
Indication range A Indication range B
5
0
deg
-5
identifies identifies and
-10
10-2 10-1 100 101 102
Frequency in Hz
Figure 6.2: Thermal impedance evaluation of the IGBT within the Hybridpack2 power
module at a factor 2 reduction of the convection heat transfer coefficient, the
die attach solder conductivity and the DCB solder conductivity
A final advantage of using the thermal impedance FRF arises with this work, which is the
first to provide a method for in-situ thermal impedance spectroscopy (ITIS). This allows the
extraction of the thermal impedance during normal converter operation without the need
for any additional excitation circuitry. However, before the ITIS is introduced, the ability
of the thermal impedance to identify various degradation mechanisms is analyzed.
Exemplarily degradation identification based on Zth (jω) It is demonstrated in this

paragraph that the thermal impedance FRF, in particular its phase that can be estimated
with superior accuracy, provides excellent insight into various degradation mechanisms. To
demonstrate this, the thermal impedance Zth of a new and differently degraded HP2 power
module was derived with the thermal modeling framework that was introduced in 3.2. The
FRF plot and the Nyquist plot of the thermal impedances of one IGBT within the HP2 is
plotted in Figure 6.2. Furthermore, Figure 6.2 depicts the degradation accuracy plot that
was proposed by Timothy A. Polom in [238, 240] within the research collaboration in which
this thesis was conducted. It allows the detailed analysis of the changing thermal impedance
152
6.4 In-situ Thermal Impedance Spectroscopy (ITIS)
FRF of degraded power modules.

With the Bode plot a visual separation of the original and the three differently degraded
thermal impedance models is difficult. Contrasting to this, the Nyquist plot, and even better,
the degradation estimation accuracy (DEG) plot show significant differences in the transfer
characteristics of the thermal impedances that allow the separate identification of different
degradation mechanisms. The Nyquist plot allows the identification of a power module
with deteriorated convection within a bandwidth range from 10 mHz to 100 mHz. Similarly,
between 500 mHz and 2 Hz the degradation of the DCB solder layer and the die-attach solder
layer can be precisely separated from a deterioration of the convection mechanism and the
original power module. The differentiation between the die-attach solder layer degradation
and the DCB solder layer degradation is more difficult. However, the Nyquist plot shows
opportunities for this in the frequency range between 10 mHz and 1 Hz as well as above
5 Hz. However, the DEG provides a very different perspective on this issue. This is because
it separately evaluates the magnitude and the phase deviation of the thermal impedance
FRF. As in particular the phase information can be extracted with superior accuracy, the
following analysis focuses on the phase of the DEG. It shows that from 20 mHz to 200 mHz,
illustrated in Figure 6.2 as in indication range B, the DEG phase enables the identification of
deteriorations of the convection process independent of the other degradation mechanisms.
Similarly, from 1 Hz to 60 Hz, illustrated in Figure 6.2 as in indication range B, the DEG
phase enables to identify that either die or DCB delamination occurred. Furthermore, a
separation of both mechanisms is easily possible at the bandwidth above 5 Hz.
This example illustrates that the thermal impedance FRF can excellently be used to
detect degradation induced changes of the thermal interface that are provided by the power
module.

This work proposes a technology for the real-time extraction of the thermal impedance FRF
Zth (jω) over a wide frequency range that does not require an interruption of the normal
converter operation. The so called in-situ thermal impedance spectroscopy is introduced in
the following.
6.4.1 Operation Principle

First, the basic principle of the in-situ thermal impedance spectroscopy is introduced based
on Figure 6.3, which depicts the thermal characteristics of a device in a power module with
a Foster model. While the power module is operated at its normal loading Ploss , the ITIS
ex
injects a small periodic sinusoidal loss excitation P̂loss given by (6.1) in a device. This is
achieved via device loss manipulation and excites a temperature response Tjex given by (6.2).
ex
P̂loss = P̂0 · sin(ω 0 t) (6.1)
ex
Tj = T0 · sin(ω 0 t + φ0 ) (6.2)
153
Ploss
Cth,1 Cth,2 Cth,3
Tj
P0ref Excitation P0 sin(w0t)
ref
and Tj
S
T Rth,1 Rth,2 Rth,3 Ta
w0 Filtering ex
Ploss Ploss
ex ex
Ploss Tj
Re{Zth(w0)} Die Attach Solder
Thermal State of
Impedance Im{Zth(w0)} Health DCB Solder
Analysis Detection Convection Process
Figure 6.3: Principle of in-situ thermal impedance spectroscopy (ITIS)
The junction temperature of the device TjΣ that exhibits a load dependent component Tj and
the response to the excitation response Tjex is measured, e.g. via TSEPs. Afterwards, the
ex
excitation response T̂j must be separated from the load dependent junction temperature
ex
component Tj with an appropriate filtering technology. Finally, the loss excitation P̂loss
ex
and the excitation response T̂j must be processed via a system identification algorithm
to extract the FRF of the thermal impedance Zth (jω0 ) at the excitation frequency ω 0 . By
repeating this procedure at various excitation frequencies ω 0 the thermal impedance FRF
can be obtained at discrete frequencies over a wide bandwidth.
Thus, the ITIS is achieved in five fundamental steps:
• Periodic heat injection
• Temperature sensing
• Response extraction
• Thermal impedance estimation
• Repetition at specific excitation frequencies
These will be discussed in more detail in the following and the challenges of their successful
implementation will be addressed.
Periodic heat injection Various implementation options exist to induce periodic losses in
the power devices. This work utilized a loss manipulation unit that manipulates the device
switching losses by adjusting the gate resistances every switching period. The gate driver
unit and loss manipulation algorithm that is used for this purpose is introduced in chapter
7.2. Other loss manipulation mechanisms can be used instead. The most interesting option
manipulates the common mode duty cycle of a converter that does not have an impact on
the current regulation, but manipulates the conduction losses. Similarly, the reactive power
can be used as a manipulated input at a grid tied converter, or the flux can be dynamically
modulated in an electric drives train, e.g. as presented in [261]. Other methods include the
manipulation of the gate supply voltage, the PWM frequency and the injection of circulating
154
currents, e.g. in multi-port converters [220]. Note that all loss manipulation approaches have
in common that they aim to manipulate losses based on a device loss model. Because this
loss model is always affected by errors, an exact loss manipulation is not possible and a loss
deviation of 15 % to 25 % can occur.
The loss injection amplitude P0 must be chosen large enough such that the resulting
temperature amplitude T0 is detectable but does not unnecessarily impact the converter
operation. Therefore, it is important to consider the thermal impedance magnitude of the
device. The IGBTs of the Hybridpack2 power module exhibit a thermal impedance mag-
nitude of 0.02 K W−1 at an excitation frequency of 10 Hz, which is assumed as a maximal
excitation frequency. Consequently, an excitation with a loss amplitude of P0 = 20 W, which
is feasible with gate resistance manipulation over a wide operation range, excites a temper-
ature response with an amplitude of 0.4 K. This is barely large enough to be extracted from
a junction temperature measurement with reasonable accuracy in magnitude and phase.
Note that it is an option to adjust the loss excitation dependent on the excitation frequency
to keep the amplitude of the temperature response and thus its resolution constant.
Temperature sensing The junction temperature is measured via IR sensors, which extract
the device surface temperature out of a decapsulated power module. As this is only an option
for a laboratory setup, in future power converters the IR sensors must be replaced by other
less invasive temperature sensing approaches. One option are on-chip temperature sensors,
e.g. as introduced in [145, 163]. Alternatively, TSEP-based junction temperature sensing
can be used, e.g. as illustrated in this work in chapter 5.1. Another approach is to design
future power modules with NTCs that are located closer to the device such that they can be
used for the temperature sensing. However, with today power modules, which have NTCs
that primarily reflect the temperature of the lower substrate and the base plate this is not
a viable option.
Response extraction The most demanding step of the thermal impedance spectroscopy
is the accurate separation of the excitation response Tjex from the much larger remaining
junction temperature component Tj , which is primarily influenced by the converter load-
ing. In the state-of-the-art there is no reported approach that demonstrates how this can
be achieved insensitive to the dynamics of the load dependent junction temperature signal
Tj . A simple approach would be the utilization of a band-pass filter. However, a narrow
band-pass filter can rarely reject the transient changes of the load dependent junction tem-
perature signal. Consequently, one major contribution of this work lies in the development
of an observer structure that separates the temperature response that is caused by the loss
excitation Tjex of the dominant thermal transients Tj that occur due to the loading of the
converter. The proposed observer structure estimates the thermal excitation response with
unity gain and zero phase lag. This accurate signal extraction is very important for a precise
thermal impedance estimation.
The functional principle of the observer is explained based on the state block diagram in
Figure 6.4 For the excitation response separation the same thermal observer structure that
was introduced in chapter 5.2.3 is used. However, it can be built with arbitrary thermal
models that estimate the junction temperature, e.g. a simple third order Foster model or
155
w0
P0 DPex DRgate
sin(wext) DRg(X conv) Power Module
rst
i Power Device DPloss Thermal Interface
Converter d rst X conv Ploss dT T Tspatial
fsw Ploss(X conv) = AT + B Ploss ex
Operation Udc dt Tj + Tj
Tj
n
Noise
Ploss(X conv) Loss Estimation
1
Ki Ploss
s Temperature Estimation
total t
DPloss Ploss
Tj Kp dT total
Tj
= AT + B Ploss
dt
Tj
ex
DPex
total Tj(k) + Tj
DTj s Ploss ex
dT total
Tj
Kr 2 2 = AT + B Ploss
s + wex dt
Excitation-Frequency Temperature Estimation
Figure 6.4: State block diagram of the thermal observer that separates the thermal exci-
tation response T̂jex from load dependent junction temperature T̂j
large scale 3-D models that were developed in this work. The observer structure proposed
in chapter 5.2.3 is enhanced by a second instance of the thermal model that receives the
ex
excitation losses P̂loss as a command feedforward to predict the excitation temperature
ex
T̂j . This model receives a feedback correction via a resonant state feedback path that is
tuned to the excitation frequency. Thereby, the normal loss estimation and temperature
estimation that is corrected by the proportional and integral state feedback paths ensures a
fast estimation of the load dependent junction temperature component Tj . The second model
ex
predicts the excitation response T̂ j smoothly and accurately, even during load dynamics,
as the resonant feedback path compensates any deviations of the electrothermal model at
its resonant frequency without steady state error.
The performance of the observer structure can be evaluated based on the estimation
accuracy plot that is depicted in Figure 6.5. It shows that, even if the device loss model
shows ±20 % variations, the first observer stage is able to estimate the load dependent
junction temperature component, whereas the second observer stage estimates the excitation
response without magnitude or phase error.
ex
Thermal impedance estimation As a final step, the estimated excitation losses P̂loss and
ex
the extracted response of the junction temperature T̂j at the excitation frequency ω 0 must
be processed to determine the complex transfer characteristic of the thermal impedance
Zˆth (jω 0 ). For this purpose, the orthogonal correlation method is used, which is a non-
parametric system identification method that is robust and insensitive to noise [3, 150]. Its
156
2
1
1.5 Excitation temperature 0.5
8 9 10 11 12
Perfect loss estimation

0.5 +20% loss estimation error
-20% loss estimation error
0
90
90 45
0
-45
45 -90
8 9 10 11 12
0
Observer
-45 Proprtional bandwidth fb,p = 10 Hz

design
Integral bandwidth fb,i = 1Hz

-90 Resonator frequency fex = 10 Hz
10-2 10-1 100 101 102

Frequency in Hz
Figure 6.5: Estimation accuracy of the proposed observer that separately estimates ther-
mal excitation response T̂jex from load dependent junction temperature T̂j
ex
Tj(k)
ex N
P0 Ploss eex 1 2
sin(w0t) N Se (k)
k=1
ex
P0
2
Re{Zth(jw0)}
w0
ex Q N
P0 Ploss eex 1 2
cos(w0t) N Se (k)
k=1
ex
P0
2
Im{Zth(jw0)}
Figure 6.6: State block diagram of the orthogonal correlation unit that estimates the real
and imaginary components of the thermal impedance FRF
functional principle is illustrated in the state block diagram that is depicted in Figure 6.6.
It correlates the system response T̂jex to the system excitation P̂loss
ex
and to the orthogonal
ex,Q
system excitationP̂loss . By averaging the result over one or more periods of the excitation
signal and proper scaling, the real and imaginary part of the thermal impedance are ex-
tracted. This follows directly from the fundamental equations of the Fourier Analysis [3].
Note that this identification method is insensitive to noise and DC-offsets because they are
eliminated by the averaging process.
Repetition at specific excitation frequencies With the introduced method the thermal
transfer characteristic of one device can be obtained in magnitude and phase at one fre-
quency. By shifting the excitation frequency step-wise over the desired FRF bandwidth, the
entire thermal impedance FRF can be obtained at discrete frequencies. This information
can either be processed to obtain a thermal parameterization of the power module, e.g. in
the format of a Foster model. Alternatively, the ITIS is only conduced at specific frequen-
157
20
Freqeuncy in Hz
10
0
0.1 Hz 0.2 Hz 0.5 Hz 1 Hz 2 Hz 5 Hz 10 Hz
-10
0 20 40 60 80 100 120 140 160 180 200
arg(Zth(jw)) in °
|Zth(jw)| in K/W
0.1 100
Magnitude
Phase
0.05 0
0 -100
0 20 40 60 80 100 120 140 160 180 200
150
Averaged temperature
TJ in K
100
50
0 20 40 60 80 100 120 140 160 180 200
Ploss in W, TJ in K
50
Estimated losses
ex
Estimated temperature
0
ex
-50
0 20 40 60 80 100 120 140 160 180 200
Time in s
Figure 6.7: Simulation results of the observer-based ITIS that is evaluated based on the
load profile introduced in 4.3
cies that reflect degradation characteristics. The discussion of the degradation estimation
accuracy in the previous section strongly motivates the later procedure.
6.4.2 Simulation Results

To evaluate the proposed concept of in-situ thermal impedance spectroscopy (ITIS) for a
power module, a simulation has been conducted, whose results are shown in Figure 6.7. In
the conducted simulation, the same load profile was applied to the power module model
that was used in 4.3 and also for the simulation based evaluation of the thermal observer in
5.2. The only difference in this simulation is a loss modulator, which is introduced in 7.2,
that manipulates the gate resistance such that a sinusoidal loss excitation is injected in one
IGBT of the power module. During the simulation, the proposed ITIS method is applied
sequentially for multiple excitation frequencies.
In the upper simulation trace of Figure 6.7, the excitation frequency is plotted, which
is incremented in steps from 0.1 Hz to 10 Hz. The resulting instantaneous and averaged
junction temperatures Tj are plotted in the third trace of Figure 6.7. Note that the junc-
ex
tion temperature reflects only a slight trace of the loss excitation Ploss at low excitation
frequencies. At higher excitation frequencies, the temperature response Tjex becomes too
158
6.5 Localized Identification and Quantification of Power Module Degradation
small to be recognized by eye in the presence of the dominant thermal load profile. How-
ever, the observer structure is able to estimate the response of the junction temperature
T̂jex to the excitation loss P̂loss
ex ex
. Based on the excitation signal P̂loss and the response T̂jex ,
depicted in the last trace, the orthogonal correlation unit can accurately estimate the ther-
mal impedance Zth (jω0 ), whose magnitude and phase estimates are illustrated in the second
trace of Figure 6.7. The thermal impedance evaluation occurs independently of the entirely
transient load profile of the converter, but requires a settling time of 5 s to 10 s until it
reaches steady state. That is because the orthogonal correlation unit requires the duration
of one full excitation period before it provides a correct output signal.
This simulation shows that the proposed ITIS concept is a suitable approach for the
real-time estimation of the thermal impedance of a power module that can be used within
condition monitoring systems. In the following, it is discussed how the obtained thermal
impedance FRF information can be systematically utilized to identify and quantify the
degradation mechanisms that are reflected by the thermal interface of the power module.
6.5 Localized Identification and Quantification of Power

Module Degradation
For the state-of-health diagnosis of the power module, the long term changes of the ther-
mal impedance can be effectively monitored to quantify degradation. In section 6.3, it was
already demonstrated that the thermal impedance FRF can be used to identify degrada-
tion mechanisms, e.g. by investigating changes of the thermal impedance phase information
arg(Zth (jω)) at specific frequencies. However, this is not an approach that can systematically
quantify how much different parts of the power module assembly, e.g. the solder interface
between die and or between DCB and the base plate, are degraded. Thus, this section inves-
tigates how artificial neural networks (ANNs) can support the systematic identification and
quantification of the degradation mechanisms that are reflected by the thermal impedance
FRF.
6.5.1 Artificial Neural Networks (ANNs)

ANNs are a widely spread technology for data classification and regression [129]. They
have also been applied in power electronics and electrical drives, e.g. for control [47, 111]
and the degradation monitoring of electrical machines [48, 65, 66, 230, 298], transformers
[21], capacitors [287] and power electronics circuits [207]. However, they have not been
used for the identification and diagnosis of different degradation mechanisms that occur in
power modules. However, as ANNs are a widely accepted tool for data classification and
regression, they seem to be a suitable technology for this task.
ANNs aim to emulate the functional principle of the brain in order to map input data
to output data. For this mapping process, the input data is fed through layers of neurons,
which are interconnected between each other with edges. The edges exhibit weights to scale
the signals. Every neuron sums all the incoming signals, adds a bias and maps the result
with a linear or nonlinear function to its output. The precise mapping of inputs and outputs
159
f1 q
i
x1 v11
vk1
w1
vn1 f Q
l qi
v1i
xk wi y
vki
vni
v1m fm qm
vkm wm
xn
vnm
Figure 6.8: Basic structure of a Three-Layer Perceptron
is achieved within a learning process in which the weights of the edges and the biases of the
neurons are adjusted by minimizing a cost function.
In this work a classical three-layer perceptron is utilized [129], whose basic structure is
illustrated in Figure 6.8. The three-layer perceptron exhibits n input variables x1 ...xn which
are fed into the network via the input neuron. The information of the input neuron is scaled
with the weights vki and passed to the hidden layer with its m neurons. The neurons sum
up the input signals xk vki , provide a bias qi and apply a sigmoid as a nonlinear activation
function, which is typically a hyperbolic tangent function. The output information of the
neurons is scaled by the edges and passed to the output neuron which provides a bias Q
and maps the result linearly to the output y. This process can be modeled mathematically
with the equations (6.3) and (6.4).
m
X
y(φ1 ...φn ) = wi φi + Q (6.3)
i=1
n
!
X
φi = tanh vki xk + qi (6.4)
k=1
The output signal can be determined based on the hidden neurons via (6.3), and the hidden
neurons obtain their information based on the input signals via (6.4).
In case of the three-layer perceptron, the structure of the ANN results from the number
of inputs, the number of outputs and the number of hidden neurons m, which must be
specified by the user. The complete behavior of the resulting ANN only depends on the
weights of the edges w and v and the biases of the neurons q and Q. During a training
process the behavior of the ANN is adapted by changing these weights and biases such that
the ANN estimates the output data as a function of the input data. For this parameter
adaption, a combination of the gradient-descent and back propagation techniques are applied
to minimize a cost function, typically the mean squared error [76, 129]. Thereby, a local
minimum of the cost function can be identified. After this training, the ANN must be tested
to evaluate its performance. If the performance of the ANN is not satisfying, the number
of hidden neurons can be increased to improve the accuracy of the output prediction.
160
Table 6.1: Parameters of the ANN based degradation identification and quantification
study with 3875 samples of generated thermal impedance FRF Zth (jω)
Mechanism Parameters Range Step
Convection Heat transfer coefficient heff 0.2 pu - 1 pu 0.2
Sd,Up
Die attach solder Thermal conductivity kth 0.2 pu - 1 pu 0.2
Sd,Down
DCB solder Thermal conductivity kth 0.2 pu - 1 pu 0.2
Disturbance Device loss Ploss 0.7 pu - 1.3 pu 0.02
Table 6.2: Discrete frequencies of the utilized thermal impedance FRF Zth (jω) data
Excitation frequency 50 mHz 100 mHz 500 mHz 2 Hz 5 Hz
6.5.2 Artificial Neural Network-based Degradation Diagnosis

This section evaluates if ANNs can estimate localized degradation within power electronic
modules. Therefore, the thermal modeling framework, which was introduced in 3.2, was
used to create large scale 3-D thermal models of the HP2 with modified thermal character-
istics that result from typical degradation processes. The thermal impedance FRF Zth (jω)
of the thermal models, which represent differently degraded power modules, is extracted
at discrete frequencies ω 0 . With the known normalized degradation information and the
resulting thermal impedance FRF information, ANNs are trained. Afterwards, their ability
to identify and quantify normalized degradation information based on thermal impedance
FRF information at discrete frequencies ω 0 is analyzed.
Study setup There are three parameters, the convection heat transfer coefficient heff , the
Sd,Up
thermal conductivity of the die-attach solder interface kth and the thermal conductivity
Sd,Down
of the DCB base-plate solder interface kth , that were manipulated in the range that is
specified in Table 6.1. The thermal impedance FRF information was computed for the fre-
quencies that are specified in Table 6.2. This thermal impedance information as well as the
resulting normalized degradation information for all three investigated degradation mecha-
nisms was fed into the ANN. This was done applying the real and imaginary component of
the thermal impedance FRF as separate inputs for each discrete frequency.
Including errors of the loss model as disturbances The most critical errors that are
introduced within the ITIS and result in inaccuracies of the thermal impedance FRF esti-
mates are errors of the device loss model. These errors result from inaccurate device loss
model calibrations, which are difficult to avoid. They lead to possible scaling errors of all
thermal impedances estimates.
As a consequence, the ANN that shall quantify localized deterioration of the thermal
device interface must be able to reject static deviations. Therefore, the thermal impedances
FRF data, which are generated as training data for the ANN over the range that is specified
in Table 6.1, are all scaled with gains in a range of 0.7 to 1.3 pu to take possible deviations in
161
Input Layer Hidden Layer Output Layer

Sd,up
{} kth
Zth(jw1) Re
50 mHz Im
{}
{}
Zth(jw2) Re
100 mHz Im
{ }
{}
Zth(jw3) Re Sd,down
kth
500 mHz Im
{}
{}
Zth(jw4) Re
2 Hz Im
{ }
{}
Re
Zth(jw5)
5 Hz Im
{ } hconv
Figure 6.9: Three-Layer Perceptron with 8 hidden nodes for thermal impedance FRF
based localized degradation diagnosis of power electronic modules
the loss modulation process into account. The resulting training data for the ANN exhibits
125 samples before the loss disturbance scaling is applied and 3875 samples after the scaling
is introduced.
ANN structure and training The ANN that is used in this work is a perceptron that
exhibits 10 inputs for the real and imaginary components of the thermal impedance at the
5 specified frequencies and 3 outputs that are the normalized degradation parameters. For
the hidden layer, 8 neurons have been identified as an ideal choice because they resulted in
the best comprise between a minimal number of neurons and good accuracy of the ANN.
The resulting ANN, which is used in this work, is illustrated in Figure 6.9.
For the training of the ANN, the MATLAB Neural Network Toolbox was used. The
Levenberg–Marquardt algorithm [76] was selected to minimize the mean squared error, that
162
Die solder thermal conductivity DCB solder thermal conductivity Convection coefficient heff
1 Sample data 1 Sample data 1 Sample data

ANN estimation ANN estimation ANN Estimation
0.8 0.8 0.8

Results in pu
Results in pu
Results in pu
0.6 0.6 0.6
0.4 0.4 0.4
0.2 0.2 0.2
0.2 0.4 0.6 0.8 1 0.2 0.4 0.6 0.8 1 0.2 0.4 0.6 0.8 1
Status in pu Status in pu Status in pu
Figure 6.10: Regression plot of the ANN based degradation estimation
Die solder thermal conductivity DCB solder thermal conductivity Convection coefficient heff
1500 -4 1500 -5 1500
Mean: -1 10 Mean: 4.410 Mean: 7.110-5
s : 0.0071 s : 0.0095 s : 0.0056
1000 1000 1000

Items
Items
Items
500 500 500
0 0 0
-0.02 0 0.02 -0.02 0 0.02 -0.02 0 0.02
Error in pu Error in pu Error in pu
Figure 6.11: Error histogram of the ANN based degradation estimation
is the average squared difference between the degradation estimates of the ANN and the
correct degradation.
Performance evaluation The ability of the ANN to estimate the introduced degradation
of the thermal device interface can be evaluated based on the regression plots that are
depicted in Figure 6.10 and the error histograms that are illustrated in Figure 6.11.
The regression plot indicates that the degradation estimates, which are provided by the
ANN based on the thermal impedance inputs, allow a decoupled and accurate prediction of
different thermal degradation mechanisms. Especially, the ability of the neural network to
decouple the different introduced degradation effects is of remarkable value for the precise
state-of-health diagnosis and prognosis of power modules. The regression plots show a
163
spreading of the estimates for certain samples. Note that this spreading can be significantly
reduced or even eliminated by choosing an ANN with a higher number of hidden neurons.
A second important property of the neural network based degradation estimation is the
rejection of loss model deviations that lead to static inaccuracies of the thermal impedances
used as an input. This is very important, because a loss injection with zero error is practically
unfeasible in most applications.
The error histogram allows the evaluation of the errors that are made by the neural
network within the quantification and separation of the individual degradation mechanisms.
It can be seen that the error distribution follows approximately a normal distribution. Thus,
the error of 99 % of the samples lies within an interval of 3σ that corresponds to an error
of 0.03 pu. The maximum error that occurs within the samples does not exceed 0.04 pu.
Another important conclusion that can be drawn from the normal distribution of the error
histograms is that the estimation error exhibits a truly random nature. This is important
because it implicitly reflects that the empirical modeling process that is realized by training
the ANN does not exhibit any systematic errors.
This study demonstrates that ANNs are a very promising technology for the localized
degradation identification and quantification of power modules. Nevertheless, in a next
step, these model-based findings must be validated based on degraded samples that need to
be rigorously investigated with respect to their degradation mechanisms.
6.6 Summary
This section proposed various new technologies for real-time degradation monitoring and
diagnosis that allow the in-situ detection and quantification of the power module degra-
dation without an interruption of converter operation. This is in particular important for
monitoring converters in high reliability application that do not permit an interruption of
operation, e.g. solid-state transformers, HVDC systems, electrical drives in manufacturing
lines and wind power conversion systems.
First, very simple and cost-effective techniques were discussed that provide degradation
indicators obtained in thermal observer structures. The information that is provided by
these technologies can help to detect degradations. However, it does not exhibit a high
accuracy and does not allow to separately identify and quantify different degradation modes.
Thus, a methodology is introduced that enables the detection, separation and quan-
tification of structural degradation modes of power modules without interrupting normal
converter operation. The introduced ITIS excites the power devices by small signal loss
injection, extracts the temperature response with a unique filtering technique and computes
the thermal impedance in magnitude and phase over a wide bandwidth. In particular, the
phase information is a key indicator of structural degradation and can be extracted with
zero error. Consequently, the frequency response information is effectively processed by
ANNs to separate and quantify localized degradation modes.
However, for the practical utilization of this technology a wide data-basis of field data is
necessary. This can be gathered by future converter systems if they are interfaced to the
internet of things, e.g. as illustrated in Figure 6.12. Using the internet-of-things (IOT) as a
communication interface to link smart power converters to the cloud for ANN-based degra-
164
6.6 Summary
Figure 6.12: Future condition monitoring using the IOT as a communication interface to
connect smart power converters, e.g. with ITIS, to the cloud for ANN based
decision making
dation diagnosis allows detecting and reporting abnormalities in the degradation behavior
of power modules. Thereby, critically degraded components can be replaced via predictive
maintenance and the true degradation of the replaced components can be analyzed in a lab-
oratory. These field data allow improving the training of ANNs, such that they can make
very accurate and reliable predictions. If these field data are once gathered for a specific
power module type, the power electronic converter can be kept in operation being monitored
safely and reliably until it is nearly fully degraded. This new monitoring technology can
open new business opportunities for power electronic converters, e.g. smart converters as a
service.
165
166
7 Active Thermal Cycle Reduction
This chapter introduces a methodology for the active thermal control (ATC) of power elec-
tronic modules that reduces thermal cycles and thereby enhances the lifetime and reliability
of the power converter. It aims to reduce the thermally induced strain and degradation
at material interfaces of the power module, e.g. at the solder and sinter interfaces as well
as at the bond-wire to chip interfaces, by applying feasible and stress releasing thermal
trajectories to the junction temperature.
In this chapter various new technologies and implementation options for the active thermal
control of power modules are introduced. Different from prior work, they are linked together
creating a strong methodology that consistently addresses a majority of challenges that need
to be handled for an effective active thermal cycle reduction.
To evaluate the potential of the presented methodology, the obtained lifetime and eco-
nomic benefit were analyzed for a trolleybus application. This indicated that the proposed
active thermal control (ATC) technologies can result in a lifetime increment by a factor of
3-4 and in cost savings of 10 % to 15 %.
Important aspects of this chapter have been published as a part of this work within the
following publications [310, 314, 317] and have been investigated in the Bachelor thesis of
Lukas A. Ruppert [253] that was co-supervised as a part of this dissertation.
7.1 Active Thermal Control Methodology

First, the generic structure of the active thermal control (ATC) methodology that is pro-
posed in this work is introduced based on the state block diagram in Figure 7.1. It exhibits
four main components whose operation principle is briefly described:
• Loss manipulation unit

The loss manipulation unit is the primary actuator of the ATC framework. It receives a
loss command for each device that is embedded in the vector P ref
loss and has information
on the electrical load. Based on device loss models it computes appropriately a gate
resistance vector Rg and a PWM frequency fpwm that realize the loss command in the
individual devices of the power module. If parts of the loss command are infeasible
due to limits in the loss manipulation process, e.g. maximum or minimum resistance
or PWM frequency, the unfeasible part of the loss command ∆P error is fed back to the
higher order control hierarchy.
• Thermal estimator
Thermal estimators, which were introduced in 5.2, are able to monitor the junction
temperature, 3-D temperature distributions and the device losses of a power module.
They combine an electrothermal model of the power module with real-time junction
temperature information, in case it is available, to compute their estimates with high
167
Electrical Load
DPerror
Rgate
Thermal Tjavg,ref Thermal ref
Ploss Loss Power Tj
Reference Feedback Manipulation fPWM Device
Generation Control
Power Module
avg
Tj
Thermal Tj
avg
Estimator
Ts
Figure 7.1: State block diagram of the ATC methodology
bandwidth, with nearly zero lag and insensitivity to modeling errors and disturbances.
avg
The thermal estimators pass the estimated thermal variables, T̂ j and q̂ avg
th
, to the
active thermal control, where they are used for the computation of appropriate device
loss commands.
• Active thermal control
The active thermal control (ATC) unit receives a reference for the averaged junction
temperatures T avg,ref
j as well as the thermal state variables, T̂ j and q loss , that are
computed by the thermal estimator as inputs. Based on these it computes appropriate
loss commands for the devices P ref loss such that the averaged junction temperatures
follow the reference. This is achieved with a thermal state feedback control algorithm,
which is in the simplest case a PI regulator.
• Thermal reference generation
The thermal reference generation unit is the most important structure for the active
thermal cycle reduction. It needs to produce feasible, thermal stress-relieving refer-
ences for the ATC unit. For this task it can use information on the electrical load
as well as the feedback of the loss manipulation unit that indicates limits of the loss
manipulation process.
The detailed technologies that are included in this generic structure for the active thermal
control of power modules are introduced in-depth in the following sections. Afterwards, the
presented framework is reviewed to point out its most important technological features in
section 7.5.
7.2 Loss Manipulation

This section investigates gate resistance and PWM frequency as manipulated inputs to
achieve smooth and minimal invasive device loss manipulation. The beneficial features and
limitations of both manipulated inputs are in-depth discussed. Afterwards, a model-based
loss manipulation unit (LMU) is proposed that combines the strength of the two manip-
ulated inputs. The proposed LMU receives a loss command from the ATC algorithm and
168
applies appropriate gate resistances and a PWM frequency that generate the commanded
losses within the devices in real time. This real-time, model-based loss manipulation of
individual devices in a multi-device power module has not been achieved in prior work. If
the loss command is unfeasible because the limits of the manipulated inputs are exceeded,
the developed LMU reports the unfeasible part of the command to the ATC.
7.2.1 Gate Resistance-based Loss Manipulation

Gate resistance-based switching loss manipulation is a promising tool for the active thermal
control of power electronic converters. It allows the minimal invasive loss manipulation of
individual devices in a multi-device power module and it does not have any impact on the
primary operation of the power electronic converter. The effect of different gate resistances
on the switching trajectory and the losses of the device are illustrated in Figure 7.2 and
is in-depth discussed in [97, 195]. A larger gate resistance slows down the commutation
speed of the device, because it limits the gate current and thereby reduces the slop of the
device voltage and current. It thereby leads to larger switching losses of the IGBT. This
behavior is also reflected by the descriptive switching loss model that is derived in this
IGBT
work as equation (3.22). It indicates that the IGBT switching losses Ploss increase nearly
linearly with higher gate resistance Rg according to (7.1).
pIGBT
sw ∝ Rg0.81 (7.1)
As a consequence, the gate resistance provides an accessible and powerful manipulated input
for the loss manipulation of IGBTs. Note that it does barely affect the switching losses of
the freewheeling diodes which are typically negligible compared to their conduction losses
pDiode
sw pDiode
cond .
Turn-on transition Turn-off transition

400 Rg = 2.2 W Current 400
uce in V
ice in A
200 Rg = 6.8 W Voltage 200

0 0
-200 -200
20
ugate in V
Rg = 2.2 W
Rg = 6.8 W
0
-20
PlossIGBT in W
in mJ
400 Rg = 2.2 W Loss power 40

Rg = 6.8 W Loss energy
200 20
IGBT
Eloss
0
0.5 1 1.5 2 2.5 0.5 1 1.5 2 2.5
Time in ms Time in ms
Figure 7.2: Switching transients of the Hybridpack2 power module obtained with a double
pulse test at a temperature of Tj = 25 ◦C and with gate resistances of Rg =
2.2 Ω and 6.8 Ω
169
+15V +15V
HGND
LGND DC/DC -10V
Enable Lines S1 D1
LR
+3.3V GND
Driver Unit 1 2
Spwm Spwm 3 Cdc
+15V S2 D2
10
SR
Isolator SR CPLD Rgate
1
Spwm
LS
-10V
Figure 7.3: Schematic of an IGBT driver unit
Power supply (+15V/+3.3V/-10V)

(galvanically isolated)
Digital isolator ADuM
CPLD
Level-shifter
Tri-state gate drivers

(10 channels)
Gate resistances (18 W each)
Figure 7.4: IGBT driver unit
Implementation The gate resistance-based loss manipulation is implemented with six

adaptive IGBT gate drivers. Each gate driver exhibits 10 parallel gate resistances that can
be either activated or deactivated every PWM period. Thereby an adaptive gate resistance
with discrete levels is implemented that can be commanded in real-time.
A schematic of one gate driver unit for one IGBT is shown in Figure 7.3 and the corre-
sponding printed circuit board is depicted in Figure 7.4. The gate drivers use a galvanically
isolated power supply and a linear regulator to generate the required voltage levels for the
gate driver output stage and the complex programmable logic device (CPLD). The gate
signals are transferred from the low-side to the high-side potential of each driver unit with
a digital isolator. A low cost XC9572XL CPLD from Xilinx with 72 macro-cells was used
to implement the adaptive gate resistance selection. The output stage circuitry has been
derived from the gate driver unit that was developed in [120]. It exhibits 10 output chan-
nels, each connected via a discrete level shifter and an IXDD604SIA tri-state gate driver
unit from IXYS to an 18 Ω gate resistance. For simplicity, all 10 parallel channels exhibit
the identical resistance value of 18 Ω, which is used for turn-on and turn-off.
Operation principle Each gate driver unit receives one standard PWM signal spwm which
is passed to the IGBT. In addition, a second PWM signal sR at a defined frequency of 8 kHz
with a duty cycle dR is passed to the CPLD which exhibits information about the effective
170
20 2000
Device current Operation point
50 A Udc = 400 V
Loss power Ploss in W

in
100 A fpwm = 5 kHz

eff
15 1500 Tj = 40°C
Effective gate resistance Rg
200 A
400 A
10 1000
5 500
0 0
0 0.2 0.4 0.6 0.8 1 0 5 10 15 20
Duty cycle dR in pu Gate resistance Rg in
Figure 7.5: Mapping of the duty cycle to the effective gate resistances (left) and loss
generation of the IGBT as a function of gate resistance and current (right)
gate resistance Reff,0 to be applied. The CPLD enables or disables appropriate channels and
thereby parallels the activated gate resistances, each having a resistance of Rg,0 = 18 Ω.
This allows commanding a gate resistance Rg (n) every 125 µs at discrete levels that are
given by (7.2) as a function of the activated channels n.
Rg,0
Rg (n) = with n ∈ 1...10 (7.2)
n
It is important to generate a wider range of gate resistance, in particular at high gate resis-
tance values. To realize this, there is always a sequence of four gate resistance combinations
applied, each for a duration of 125 µs, that in average over 500 µs create the gate resistance
command Reff,0 . This is realized with a state machine on the DSP that also spreads the gate
drive losses equally among the 10 parallel channels. The possible effective gate resistance
combinations Reff,0 that can be achieved with that procedure are given by (7.3).
Rg (n) + Rg (m) + Rg (o) + Rg (p)

Reff,0 = with n,m,o,p ∈ 1...10 (7.3)
4
With this implementation, which is more in depth discussed in [314], sixteen discrete gate
resistance levels, nearly equally distributed between 1.8 Ω and 18 Ω, are realized that can be
applied with an update frequency of 2 kHz. The different gate resistance levels that can be
applied in this range are illustrated on the left hand side of Figure 7.5, which also illustrates
the mapping between the duty cycle dR and the applied effective gate resistance Reff,0 .
For future applications, the adaptive gate drive structure can be implemented in an inte-
grated circuit, e. g. as illustrated in [209], to make it a cheap and widely available feature.
Limitations and potential In typical applications, the HP2 is operated with a gate re-
sistance in the range between 1.5 Ω and 6 Ω. In this work, the range of selectable gate
resistances has been increased from 1.8 Ω to 18 Ω. The lower bound of the resistance range
171
is set to 1.8 Ω to avoid switching over-voltages at turn-off and large reverse recovery currents
at turn-on. The upper bound of 18 Ω ensures that a blanking time of 3.5 µs provides enough
time to turn one IGBT in a half bridge completely off before the other IGBT is turned on.
The loss manipulation that can be achieved with the proposed active gate driver can be
analyzed based on Figure 7.5 (right). It plots the total losses of an IGBT that is operated at
fsw = 5 kHz, udc = 400 V and Tj = 40 ◦C as a function of the gate resistance Rg at different
currents ice . In particular at higher currents, the gate resistance has a major influence
on the losses of the IGBT. Thus it can be effectively used to decouple fluctuations of the
load current to keep the device losses and the resulting junction temperature constant. The
dashed lines in Figure 7.5 exemplarily indicate how the gate resistance must be manipulated
to keep the device losses constant if the device current changes from one level to another.
This shows that gate resistance manipulation has a great potential as a manipulated input
for active thermal cycle reduction of power electronic modules.
7.2.2 PWM Frequency-based Loss Manipulation

A second loss manipulation input that is used in this work is the PWM switching frequency.
The switching losses of the IGBTs and the diodes (3.22), (3.24) scale linearly with the PWM
switching frequency (7.4).
pIGBT
sw ∝ fsw and pDiode
sw ∝ fsw (7.4)
As all devices of the converter are operated with the identical PWM switching frequency, it
cannot be used to manipulate the losses in individual devices. However, it can adjust the
loss manipulation range of the gate resistance by shifting the average converter losses.
Implementation For PWM frequency-based loss manipulation, a PWM frequency between

5 kHz and 10 kHz is utilized in this work. PWM frequencies below this range result in the
undesired excitation of acoustical modes of the electrical machine. Higher PWM frequencies
could potentially be used, but were avoided in this work to avoid excessive loss dissipation.
Also the rate of change of the PWM frequency must be limited. If the PWM frequency is
adapted too fast, this will also induce a significant amount of undesired voltage harmonics
that result in additional machine losses and noise. For this reason, the switching loss
manipulation that is employed in this work adjusts the PWM frequency in no smaller
steps than ∆fsw = 300 Hz. In addition, its rate of change is limited by a loss modulation
process with a low-pass filter. This does not limit the bandwidth of the loss manipulation
unit, because fast loss commands should be either way realized with the gate resistance
manipulation.
Simple PWM frequency-based thermal cycle reduction The electrothermal analysis of

the HP2 in an AC application, which is conducted in this work, reveals that the thermal
stress is high in particular at the initial acceleration and final deceleration of the drive
train. This occurs due to the simultaneous loading with high current and a low excitation
frequency that result in a high average temperature but also in severe temperature cycles
at the electrical excitation frequency at the same time.
172
Tjavg
avg
DPloss Inverse
max
i rst I peak avg Ploss
Loss Model DPloss Loss Model
max
rst Averaged M avg
Ploss avg
Converter d X conv 0
S,avg
Ploss Ploss,m Rg
Operation f avg avg
Ploss(X conv) Ploss avg
Operation Ploss
min Rgate (Ploss,m)
Udc Vector Udc
Vector
fsw avg
Ploss
min
X conv
max 0 min
Rg Rg Rg
avg
Perror
Figure 7.6: Loss manipulation unit employing gate resistance manipulation
The techniques that are developed in this work and aim to reduce the thermal cycles
of averaged junction temperature cannot reduce strong temperature cycles at the electrical
excitation frequency. However, an effective and simple way to partially decrease this thermal
stress is the reduction of the PWM frequency at low excitation frequencies. The effectiveness
of this approach is illustrated in [331]. This strategy is supported by the work conducted in
[56] that shows that the PWM frequency induced noise occurs most dominantly at medium
speeds and is reduced at low speeds. This result, which is also reflected in the results
presented in [45], underlines that reducing the PWM frequency at low speed operation is
on the hand beneficial to mitigate thermally induced strain and has on the other hand a
negligible effect on the noise emission of the drive train.
Following this perspective, this work utilizes a simple thermal feedforward control that
applies a PWM frequency reduction from 10 kHz during normal operation to 5 kHz if the
excitation frequency falls below 5 Hz.
7.2.3 Loss Manipulation Units (LMUs)

In the following, two LMUs are introduced that achieve individual loss manipulation of
devices within a multi-device power module. The basis LMU only utilizes the gate resistance
of each device as a manipulated input. It allows the manipulation of the thermal power
module characteristics with least impact on the converter operation. Consequently, an
LMU is introduced that combines gate resistances and the PWM frequency as manipulated
inputs. This enhances the loss manipulation range, but has an impact on the noise, current
and torque ripple in the motor of the drive train.
Note that both LMUs that are presented in the following manipulate the averaged device
losses over one excitation period. This is because the primarily goal of this chapter is the
active control of averaged junction temperature that requires the manipulation of averaged
device losses for consistency.
Gate resistance-based loss manipulation The state block diagram of the gate resistance-
based LMU for one converter half bridge is depicted in Figure 7.6. First, the main specifi-
cations for the loss manipulation units are introduced. If no loss manipulation commands
∆P avg
loss = 0 are applied to the loss manipulation unit, the IGBTs are operated at an opera-
tion point gate resistance of Rg0 = 5 Ω. As a consequence, the operation point losses P 0loss
173
3000
Gate resistance Operation point traces
max
Rg = 18 W
2500 0
Rg = 5 W
IGBT switching losses in W

Rgmin = 1.8 W
2000
PWM frequency
fpwm = 10 kHz
1500 fpwm = 5 kHz ge
ran
on
u lati
1000 a nip
sm
Los
500
0
0 100 200 300 400
IGBT current in A
Figure 7.7: Loss manipulation range of the Hybridpack2 IGBTs achieved by manipulation
of the gate resistance Rg at maximum and minimum PWM frequency
are generated in the IGBT. In case of a nonzero loss command ∆P avg loss , the LMU selects the
gate resistance that realizes the commanded losses in addition to the operation point losses.
Any loss manipulation that is commanded ∆P avg loss is immediately realized by increasing or
decreasing the gate resistance within the accessible loss manipulation range that is given by
the maximal and minimal gate resistance of Rgmax = 18 Ω and Rgmin = 1.8 Ω. If a part of the
commanded losses ∆P avg error is unfeasible because the maximum of minimum gate resistance
is reached, it is fed back to the higher control hierarchy. The operation principle of this loss
manipulation process is illustrated in the following.
The LMU requires the operation vector of the inverter as an input that exhibits load
current irst , duty cycle drst , dc-link voltage udc and switching frequency fsw . Based on these
dynamic variables the averaged operation variables are determined that include the peak
current I,ˆ the modulation index M and the angle between voltage and current φ. With these
averaged operation variables, the dc-link voltage udc and the junction temperature estimates
avg
T̂ j , which are provided by the thermal observer, the loss model provided by the equations
(5.38) - (5.38) determines the average losses of all devices P 0loss for the operation point gate
resistance Rg0 . In addition, it calculates the maximum and minimum average losses P max loss
and P min
loss , which can be realized within the feasible range of the gate resistances for the
given operation point and PWM frequency fpwm . The loss command from the thermal
control unit ∆P avg 0
loss is added to the operation point loss P loss . The result is clipped based
on the estimated maximum and minimum losses to ensure that the loss command P avg loss,m is
g
feasible. Finally, an inverse loss model is used to determine the gate resistances R which
realize the loss command P avg avg
loss,m . The part of the commanded losses P error that cannot be
realized is fed back to the thermal control algorithm to ensure proper handling of this loss
manipulation limit.
This process ensures a highly dynamic manipulation of the IGBT switching losses that
occur in individual devices. The resulting loss manipulation range that can be realized with
gate resistance-based loss manipulation is visualized in Figure 7.7. However, it can be seen
in Figure 7.7 that this range can be effectively increased if the PWM frequency is increased
174
Tjavg
avg
DPloss Inverse
max
i
rst
I
peak
avg Ploss
Loss Model DPloss Loss Model
max
rst Averaged M avg
Ploss avg
Converter d X conv 0
S,avg
Ploss Ploss,m Rg
Operation f avg avg
Ploss(X conv) Ploss avg
Operation Ploss
min Rgate (Ploss,m)
Udc Vector Udc
Vector
fsw avg
Ploss
min
X conv
max 0 min
Rg Rg Rg
avg
Perror max
fsw
fsw
Figure 7.8: Loss manipulation unit employing combined gate resistance and PWM
frequency-based manipulation
or reduced. As a consequence, in the following the introduced loss manipulation unit is

enhanced such that it manipulates the gate resistance and the PWM frequency.
Combined gate resistance and PWM frequency-based loss manipulation To increase

the loss manipulation range, the PWM frequency fpwm can be adjusted in addition to the
gate resistances Rg . Therefore, the original LMU is enhanced leading to the loss manipula-
tion unit that is depicted in Figure 7.8. The enhanced loss manipulation unit operates the
converter at two PWM frequencies, in this work at 5 kHz and at 10 kHz. These are selected
such that the loss manipulation range is appropriately shifted to higher or lower losses when
needed. The transition is realized via a hysteresis feedback loop to prevent jittering between
the two PWM frequencies.
The operation principle of the enhanced LMU is explained in the following. Its basis
functionality is identical to the LMU for gate resistance-based loss manipulation only. Its
primary difference is that if the maximum device loss modulation error of the converter
devices hits the hysteresis threshold, the PWM frequency changes instantaneously towards
the direction which shifts the loss modulation process out of the limit. At the same time,
the new PWM frequency is fed back to the gate resistance manipulation to adjust the
gate resistance such that a smooth loss manipulation is maintained. If the loss modulation
process reaches the opposite loss modulation limit, the PWM frequency changes back again
towards its original value. The shift of the loss modulation range, that is achieved with this
PWM frequency hysteresis, can be observed in Figure 7.7. Typically, the loss modulator
operates most of the time at the higher PWM frequency level, because of its wider span.
Only at extremely high thermal loading, e.g. at peak currents, the lower PWM frequency
is utilized with this unit, which can be observed in later simulations.
The biggest advantage of this model-based loss manipulation unit is that it uses gate
resistances to manipulate the individual losses of power devices in a multi-device power
module. It achieves this dynamically and smoothly in real time over a high bandwidth and
large operation range. Furthermore, the novel loss manipulation unit can easily be adapted
175
to include other loss manipulation variables for ATC, e.g. a variable gate supply voltage, a
modulation of the zero sequence duty cycle, or reactive power injection.
7.3 Active Thermal State Feedback Control

This section discusses the active state feedback control of junction temperatures for one
half bridge within a multi-device power module. It assumes that the loss manipulation
unit (LMU) operates ideally and applies loss commands accurately within a sampling time.
Furthermore, it is assumed that the temperature references which it receives as a command
are feasible such that they do not lead to loss commands exceeding the loss manipulation
range.
Firstly, this section discusses why the estimated averaged junction temperature is an
attractive control variable for AC applications. Then different implementation options for
the estimation of the averaged junction temperature are discussed. Finally, a thermal state
feedback control structure and a design methodology are introduced.
7.3.1 Averaged Junction Temperature Control

The major difficulty which arises in the thermal control of power modules in AC applications
is the determination of a suitable control variable. This can be observed in Figure 7.9 that
illustrates the instantaneous (switching period averaged) and averaged (excitation period
averaged) devices losses and junction temperature as an example. The instantaneous losses
occur in the form of a half-wave due to the sinusoidal nature of the AC load-current and the
characteristics of the IGBT, which conducts the current only in the forward direction. As
a consequence, the instantaneous junction temperature exhibits a fundamental cycle that
occurs at the electrical excitation frequency. This temperature cycle increases with higher
device currents and lower excitation frequencies. In contrast, it decreases significantly at a
growing electrical excitation frequency due to the decaying thermal impedance Zth (jω) at
higher bandwidth.
The control of the instantaneous junction temperature is unfeasible, because there is no
current and consequently there are no losses that occur for half of the excitation period.
For this reason, the only way to keep the fundamental temperature cycle low is to operate
the power converter at the lowest device losses possible. However, in most applications
a minimization of this fundamental cycle is not of interest. This is because it is small at
higher excitation frequency and therefore only contributes at few operation conditions to the
degradation of the power module, e.g at initial acceleration and final breaking, as discussed
in section 4.4.4.
As the control of the instantaneous junction temperature is unfeasible, the averaged losses
and temperatures over one excitation period that are illustrated in Figure 7.9 are preferably
used as control variables. By adjusting the averaged losses, which can only be achieved
during the conduction interval of the IGBT, the averaged temperature response can be
effectively manipulated, as illustrated in Figure 7.9.
The key problem, which was encountered in previous work, is that the averaged junction
temperature can barely be determined with temperature sensors without a low-pass filter,
176
Instantaneous
Temperature Losses
Averaged
Temperature, Losses
Tj
DTj Tjavg
Ploss
avg
Ploss
Time
Figure 7.9: Exemplarily instantaneous (switching period averaged) and averaged (excita-
tion period averaged) devices losses and junction temperature of a uncontrolled
(dark) and controlled (light) power device
whose averaging induces significant lag. Any lag that is introduced degrades the performance
of a state feedback controller. For this reason, nearly all reported research efforts predicted
the averaged junction temperature with an electrothermal real-time model [260, 329, 335].
Unfortunately, this results in strong sensitivity to modeling errors and disturbances. To
overcome this limitation, thermal observer structures were proposed in section 5.2, which
allow the estimation of averaged device losses and power module temperatures with nearly
zero lag over a wide bandwidth. This can reduce significantly the sensitivity of the estimation
to model errors and increase the dynamic stiffness of the thermal control algorithm.
Thus, the next section shall give an overview on how the developed observer structures
can support the averaged junction temperature estimation.
7.3.2 Implementation Options for Averaged Junction Temperature

Estimation
There exist three implementation options for the estimation of the averaged junction tem-
perature that can be utilized for the active thermal control.
• Observer-based temperature estimation using junction temperature sensing

• Observer-based junction temperature estimation using NTC temperature sensing
• Predictor-based junction temperature estimation
The observer based averaged junction temperature estimation, which utilizes junction
temperature measurements, was introduced in section 5.2.4. It determines the averaged
junction temperature, as well as 3-D spatial temperature distributions and the device losses
at high bandwidth with great accuracy and nearly zero lag and is very intensive to modeling
errors. Its major limitation is the need for high bandwidth junction temperature measure-
ments. However, these can be effectively realized in future power converters using either
on-chip temperature sensors or temperature-sensitive electrical parameter (TSEP).
An alternative way to estimate the averaged junction temperature with reduced imple-
mentation effort is an observer that requires only NTC sensor information, which is available
in most power converters. A suitable thermal observer for this purpose was introduced in
5.2.6. The NTC temperature allows the correction of modeling errors of the convection
177
process and the DCB to base plate interface. However, it can only partially correct errors
in the device loss model but cannot correct any inaccuracies of the DCB to device interface
model.
The last implementation option with no requirements for temperature sensors is based
on a predictor structure that was illustrated in 5.2.2. This implementation option is mainly
used for averaged junction temperature estimation in literature. However, it is very sensitive
to disturbances and any modeling errors of the electrothermal model that is used.
In this work, the observer-based averaged junction temperature estimation using junction
temperature measurements is utilized. Nevertheless, the framework for the active thermal
control of power electronic modules that is introduced in this chapter can be utilized with
either of the three implementation options.
7.3.3 Thermal State Feedback Control Design

In the following, it is discussed how the averaged junction temperature of the devices within
a power module can be controlled to follow a feasible reference. For the control design it is
assumed that the averaged junction temperature is accurately estimated with zero lag using
an appropriate thermal observer structure, e.g. the enhanced thermal observer structure
that was proposed in 5.2.4.2.
Analysis of the multi-variable control problem It is the objective of the control algorithm
to control the junction temperature of the individual devices by manipulation of their losses.
This represents a multi-variable control problem [197], because the losses in one device do
not only change the junction temperature of this device but also of the other devices.
Typically, the thermal cross-coupling can be eliminated by a state feedback decoupling
structure. However, as there are four devices whose heat dissipation occurs over several
lateral cross-coupled states, a dynamic decoupling is difficult. This is because it is almost
impossible to determine a physical model that is accurate over the most relevant frequency
range and allows the derivation of a decoupling structure. Fortunately, the static impedance
matrix, illustrated in Table 7.1, indicates that the amount of self-heating of each device is
approximate a factor of four larger than the cross coupling between the device and its
direct parallel neighbor. The self-heating of each device is even a decade larger than the
cross-coupling between the device and the anti-parallel devices of the half bridge. The
cross-coupling between the devices of different half bridges is far too small to be reasonably
Table 7.1: Cross coupled thermal impedance information of one HP2 halfbridge
(The structure of the half bridge is illustrated in Figure 3.2)
xy K
Rth in kW Heat Source Device x
IGBT A Diode A IGBT B Diode B
IGBT A 81 24 4 8
Sensing Device y Diode A 23 116 8 17
IGBT B 4 8 82 25
Diode B 7 17 24 116
178
dist s b
ploss qdist qdist
js sb ba
Rth Rth Rth
j s b
ploss Cth Tj Cth Ts Cth Tb Ta
Figure 7.10: Simple thermal equivalent circuit of one power device within a power module
dist s b
ploss qdist qdist
ploss 1 1 Tj js
qjs 1 1 Ts sb
qsb 1 1 Tb
j bth s bth b
Cth s Cth s Cth s
qba ba
bth Ta
Figure 7.11: State block diagram of the thermal equivalent circuit depicted in Figure 7.10
quantified. Thus, the thermal control of each device can be designed independently of the
other devices. The thermal cross-coupling between the devices is treated as a disturbance
within the control design process.
Simplified thermal model As a consequence, a 3-layer thermal Cauer model, that is il-
lustrated as a thermal equivalent circuit in Figure 7.10, is used as a starting point for the
thermal control design. It exhibits three temperature nodes, which are located vertically
below the device. The junction temperature Tj , the substrate temperature Ts , which cor-
responds to the temperature of the DCB solder, and the base plate temperature Tb . The
thermal parameters of the model are three thermal capacitances Cth and three thermal
conductance bth = 1/Rth . Note that these model parameters are not known initially. The
model inputs are the device losses Ploss and the ambient temperature of the coolant Ta . With
respect to the discussion in chapter 3.3, it should be clear that this is not a very accurate
model for the HP2. However, it reflects at least the three dominate states that are mapped
to localized temperatures.
State feedback decoupling A more insightful perspective on the open loop system dy-
namics can be obtained from the state block diagram of the Cauer model that is illustrated
in Figure 7.11. It shows that the junction temperature exclusively depends on itself, the
device losses, which are separated in the commanded losses ploss and the disturbance losses
pdist
loss , and the substrate temperature Ts . This model reveals an excellent opportunity for state
feedback decoupling [78, 191] of the heat flux qjs that is directed from the junction to the
substrate. The heat flux from the junction to the substrate qjs can potentially be estimated
if the junction temperature Tj , the substrate temperature Ts and a thermal conductance
estimate b̂jsth are known. Of course, the substrate temperature cannot be obtained by a
measurement. However, it can excellently be determined with an estimator, as illustrated
in section 5.2. Thus, the estimated heat flux q̂js can be commanded to the loss modulation
unit to decouple the heat flux that is draining from the junction to the substrate. The
remaining dynamics of the junction temperature are that of a pure thermal capacitance,
179
1 dist
ploss qdist
s b
qdist
Ki
s
Tj ref ref
ploss ploss 1 1 Tj js
qjs 1 1 Ts sb
qsb 1 1 Tb
Kp M(s) j bth s bth b
Cth s Cth s Cth s
qba ba
bth Ta
qjs js
bth
Figure 7.12: State block diagram of the thermal state feedback control structure
103 1
IGBT js
2pf Cth bth in W/K Cth,eff in J/W
0.9
IGBT 28.7 0.6
102 0.8
Diode 16.9 0.3
|Ploss(jw)/Tj(jw)| in W/K
0.7
Diode
2pf Cth
C th in J/W
1 0.6
10
0.5
100 IGBT 0.4

dist
Diode 0.3
-1 0.2
10 Without state feedback decoupling
With state feedback decoupling 0.1
10-2 0
10-2 10-1 100 101 102 10-1 100 101
Figure 7.13: Dynamic stiffness plot of the uncontrolled thermal system before and after
state feedback decoupling (left), Variation of the thermal capacitance over
the frequency range after state feedback decoupling (right)
that can be effectively controlled with a proportional and integral state feedback controller.
Parameter identification This state feedback decoupling is the key technique that is uti-
lized in the control algorithm, whose structure is depicted as a state block diagram in Fig-
ure 7.12. However, for the proposed active thermal control algorithm, the relevant model
parameters must be extracted based on the thermal state space model that was developed
in chapter 4.1.6. The extraction of the thermal conductance estimate b̂jsth is achieved by de-
termining the dc-gain of the differential thermal impedance between junction and substrate
via (7.5).
js
b̂jsth = Zth j
(s = 0) = Zth s
(s = 0) − Zth (s = 0) (7.5)
The resulting estimates as well as the dynamic stiffness of the thermal plant DS(jω) =
dist
Ploss (jω)/Tj before and after the state feedback decoupling are shown in Figure 7.13. It
can be seen that after the decoupling the system dynamics can be represented over a wide
frequency range by the thermal capacitance of the device, whose characteristic is indicated
as asymptotic in Figure 7.13 (left). By division of the dynamic stiffness and the angular
frequency ω = 2π · f , the thermal capacitance of the device can be determined as shown by
180
equation (7.6)
j |DS(jω)|
Cth (f ) = (7.6)
2π · f
The resulting thermal capacitance is plotted over the frequency range that is of interest for
the control design in Figure 7.13 (right). This plot underlines that the thermal capacitance
of the IGBT junction can be approximated with an effective value of 0.6 J K−1 whereas the
effective capacitance of the diode junction can be approximated to 0.3 J K−1 . The open loop
transfer function of the thermal system after the state feedback decoupling is given by (7.7).
1
G0 (s) = j
(7.7)
s · Cth
Consequently, the FRF of the thermal control loop with a PI feedback regulator can be
determined according to (7.8). Similarly, the DS can be determined via (7.9).
Tj (s) s · Kp + Ki
FRF(s) = = j
(7.8)
Tjref (s) s2 · Cth + s · K p + Ki
dist
1 P (s) j Ki
DS(s) = = loss = s · Cth + Kp + (7.9)
Zth (s) Tj (s) s
Thus, the closed loop dynamics of the system depend only on the proportional feedback
j
gain Kp , the integral feedback gain Ki and the thermal capacitance of the device Cth .
State feedback design and analysis The proportional and integral feedback gain Kp and
Ki can be easily determined for given bandwidths of the proportional and integral state
feedback path fbp and fbi . Following the bandwidth-based design approach, that is in-depth
discussed in [191] and [78], the feedback gains can be determined based on (7.11).
Kp = 2π · fbp · Cth
j
(7.10)
Ki = 2π · fbi · Kp (7.11)
These equations can be derived by determining the intersections of the three asymptotes
that constitute the dynamics stiffness equation of the controlled system (7.9). To avoid the
excitation of a resonance the integral state feedback bandwidth is kept a factor five below
the proportional state feedback bandwidth fbi = fbp /5.
To obtain some insight in the control design in Figure 7.14 the frequency response func-
tion (FRF), the dynamic stiffness (DS), the command step response and the √ disturbance
step response are plotted. The FRF magnitude decays to |FRF(jω)| = 1/ 2 exactly at
the specified bandwidths for the control design. Furthermore, the FRF exhibits a small
overshoot, which is visible as a 10 % overshoot in the time domain. The reason for this
overshoot is the location of the FRF zero sz = −Ki /Kp that dominates the poles of the sys-
tem due to its proximity to the imaginary axis. Note that according to [201] this overshoot
can be effectively decoupled with a first order command filter that exhibits one pole which
181
(Tj(jw)/Tjref(jw)) in ° |Tj(jw)/Tjref(jw)|
Frequency response function (FRF) Command step response
2 p p p 1.2
fb,A fb,B fb,C
1.5 i
fb,A fb,B
i i
fb,C 1
Temperature in K
1
0.8
0.5
0 0.6 p i
fb,fb in Hz Kp in W/K Ki in W/(Ks)
0
0.4 Design A 2, 0.4 8 18
-45 Design B 8, 1.6 30 303

0.2
Design C 32, 6.4 120 4851
-90 0
-2 -1 0 1 2
10 10 10 10 10 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
Frequency in Hz Time in s
6 Dynamic stiffness (DS) Disturbance step response

10 p p p 0.1
fb,A fb,B fb,C Proportional
bandwidth Disturbance source
dist (jw)/Tj(jw)| in W/K
i
fb,A fb,B
i i
fb,C Integral
bandwidth
0.08 Same device (IGBT)
Temperature in K
4 Cross coupling (parallel diode)
10 0.06
0.04
2
10 0.02
|Ploss
0
0
10 -2 -0.02
-1 0 1 2
10 10 10 10 10 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
Frequency in Hz Time in s
Figure 7.14: Performance analysis of the active thermal state feedback controller for dif-
ferent control designs
compensates the zero. The command tracking performance can be further increased with
a command feedforward path. However, this concept is not further pursued in this work,
because the effective thermal capacitance of the devices decays significant above 10 Hz ac-
cording to Figure 7.13 which makes a model-based command feedforward structure difficult
to realize.
The dynamic stiffness plot in Figure 7.14 allows evaluating the thermal response of the
controlled power device to unmodeled disturbance losses in the device itself as well as losses
from the parallel device. From the DS plot it can be observed that the minimum of the
DS is identical to the proportional feedback gain Kp . The integral state feedback gain Ki
determines the disturbance rejection strength at low frequencies. At very low frequencies
and dc, the stiffness reaches towards infinite. As a consequence, disturbance components at
this frequency range are entirely rejected. The DS of the losses that are dissipated in the
parallel device are more than one decade above the stiffness of the device itself. This is very
important to keep the impact of these cross-coupled losses to a minimum. Note that the
cross-coupling between two anti-parallel devices is too small to be reasonably quantified.
Selection of the feedback gains The thermal cycles of the averaged junction temperature
that result from load variations and should be decoupled exhibit a maximal bandwidth
of 10 Hz according to the analysis that has been made in this work. As a consequence,
182
7.4 Active Thermal Cycle Reduction
Table 7.2: Feedback design

Feedback Proportional Integral
Bandwidth fbp = 8 Hz fbi =1.6 Hz
Gain Kp =30 W K−1 fbi =606 W K−1 s−1
the active thermal state feedback control which is primarily used for the active thermal
cycle reduction does not require a bandwidth above this frequency range. That is why the
thermal control is designed with a proportional state feedback bandwidth of fbp = 8 Hz. As
discussed previously, the integral feedback bandwidth is placed a factor of five below this
at fbi = 1.6 Hz resulting to the state feedback gains summarized in Table 7.2. A higher
proportional state feedback bandwidth is undesirable, because it does not significantly help
to reduce the thermal cycles that have an impact on the lifetime of the power module but
induces more noise into the control loop. The resulting design leads to a DS minimum of
30 W K−1 , which results in a good transient disturbance rejection e.g. of the losses that are
not accurately modeled within the loss model. Fortunately, the minimum DS of the parallel
device, which results from the thermal cross-coupling, is increased to 300 W K−1 . This
shows that the thermal control loop reduces the impact of thermal cross-coupling by nearly
a decade from 23 K kW−1 , which was the cross-coupling of the power module according to
Table 7.1 without thermal feedback control, to 3.3 K kW−1 , which is achieved by the control
according to the minimum DS.
Application of the thermal state feedback controller The developed thermal state feed-
back controller can be applied together with the loss manipulation unit (LMU) to control the
junction temperatures of the power module. One application area is the over-temperature
protection, which has been addressed in [213, 237, 239], as an example. However, in this work
the thermal state feedback control is used to reduce thermal cycles in order to enhance the
lifetime of power electronic modules. Therefore, appropriate temperature references must
be generated by a trajectory filter that is discussed in the following section.
This section addresses the active thermal cycle reduction that is realized to enhance the
lifetime of the power module by reduction of the thermally induced strain. Therefore,
suitable junction temperature reference must be generated that can be passed to the thermal
state feedback controller to reduce the junction temperature cycles on the one hand but
are also feasible within the loss manipulation limits on the other hand. For this task a
methodology is proposed that generates stress reliving and feasible junction temperature
reference using a virtual heat sink.
183
Active Thermal Control

avg avg,0
DPlimit Ploss Physical Heat Sink (Power Module)
avg avg
Tj*avg DPloss DPloss,m 1 1 avg
Tspatial
PI avg
- Cth s Tj
-
avg -1
Tj - Rth
avg
DPerror
Virtual Heat Sink
* avg
DPcorr 1 1 Tspatial
Ko -
- Cth* s Tj *avg
-1 *
R th
Figure 7.15: State block diagram of the virtual heat sink concept that is embedded in the
active thermal control structure
7.4.1 Virtual Heat Sink Concept

The virtual heat sink is a thermal real-time model of the physical heat sink, the power
electronic module. However, it exhibits improved thermal properties, e.g. larger thermal
capacitances, such that it can compute stress relieving junction temperature profiles if it
is fed with the same loss profile that is applied to the power module. Furthermore, the
virtual heat sink concept exhibits an active state feedback structure which allows the smooth
operation along loss manipulation limits avoiding any anti-wind-up of the active thermal
control unit. Its structure is illustrated in Figure 7.15 and its operation is explained in the
following.
Operation principle The virtual heat sink is developed by modification of the thermal
model of the power module. The thermal model of the power module can be typically
characterized by a thermal resistance matrix Rth and a thermal capacitance matrix C th
that are combined as it is illustrated in Figure 7.15. The virtual heat sink exhibits the same
static thermal characteristics like the power module, which is modeled with the thermal
resistance matrix R∗th . However, its thermal capacitances, modeled in the capacitance matrix
C ∗th , are increased such that the virtual heat sink exhibits the desirable thermal properties
that reduce thermal cycles. The virtual heat sink is fed with the estimated averaged losses
avg,0
P̂ loss of the power module that occur at operation with the operation point gate resistance
avg,0
Rg = Rg0 and switching frequency fpwm = fpwm 0
. These operation point losses P̂ loss must be
above the minimal losses to create a positive and negative loss manipulation margin for the
active thermal control (ATC). In this work this is achieved by applying an operation point
gate resistance Rg,0 that is larger than the minimal gate resistance Rgmin .
184
The junction temperature vector T avg∗

j , that is computed by the virtual heat sink, exhibits
reduced thermal cycles in comparison to the physical heat sink due to the enhanced virtual
capacitances C ∗th > C th . The derivation of the virtual heat sink model from the physical
power module ensures that by more or less enhancement of the virtual thermal capacitances
a desired thermal cycle reduction can be achieved. Furthermore, the thermal resistances
R∗th , which are inherited from the physical model, ensure that the thermal cross-coupling
between the devices is taken into account in the virtual heat sink. This is important to avoid
that the created junction temperature references T avg∗ j are far away from the physical ones,
such that the thermal control task is unfeasible. Thereby, the virtual heat sink temperature
vector T avg∗
j is an ideal reference for feasible active cycles reduction.
The device temperature reference T avg∗j , which is generated by the virtual heat sink, as
well as the averaged device temperature estimates from the power module T avg j , which are
obtained with an observer, are passed to the thermal state feedback controller, whose struc-
ture and functionality was illustrated in the previous section. In the state block diagram,
depicted in Figure 7.15, it is shown simplified as a PI regulator. The thermal state feedback
regulator determines a loss command ∆P avg loss that is passed to the loss modulator. In case
the loss command is feasible, the loss modulator applies these losses ∆P avg loss to the power
module by commanding the right gate resistances Rg and the PWM frequency fsw . In this
case of normal operation, the virtual heat sink works as a classical trajectory filter, that
creates a references for the thermal state feedback controller.
Operation at loss manipulation limits An additional feature of the virtual heat sink that
can be provided by a simple feedback path is its ability to operate close or even on the loss
manipulation limits of the converter. In state-of-the-art control algorithms, the operation
at the limits of the manipulated input is addressed using PI regulators with anti-wind-up
to avoid the PI regulator to run into saturation. A limitation of this approach is that a
smooth transition between linear operation and operation on the limits of the manipulated
input is difficult to realize. The virtual heat sink concept overcomes this limitation with an
additional feedback path and does not require any anti-wind-up.
If the references that are generated by the virtual heat sink T avg∗
j drive the loss manip-
ulation unit into its limits, the fraction of the loss command that could not be realized
∆P avg
err is passed via an active feedback path to the virtual heat sink. This path with the
feedback gain K0 is embedded in Figure 7.15. Due to this loss error feedback, the junction
temperature of the virtual heat sink T avg∗
j starts to follow the temperature in the physical
avg
heat sink T j until the control system runs out of the limitation of the loss modulation
process. Effectively, in this operation the heat sink and the virtual heat sink have changed
their role, as the virtual heat sink is controlled by the PI regulator such that is follows the
physical heat sink.
Thereby, this structure allows the smooth reduction of thermal cycles in the presence of
loss manipulation limits.
7.4.2 Virtual Heat Sink Design

The virtual heat sink can be implemented based on various thermal model structures of the
original power electronic module. These can range from a simple Cauer-model [11], which
185
Table 7.3: Thermal model characteristics of the HP2 power module

J K cross K
Device τ in s Cth in K Rth in W Rth in W
IGBT 0.26 3.25 0.08 0.024

Diode 0.15 1.26 0.115 0.024
is extracted from data sheet parameters, to a spatially resolved 3D model [313]. This work
investigates a simple modeling approach for the virtual heat sink that is derived from the
presented thermal state space model.
Model derivation The virtual heat sink model exhibits four inputs and outputs that are
representing the heat dissipation and junction temperature at the four devices of a half
bridge. For the model derivation, firstly, the static transfer characteristic Rth has been de-
rived from the original model. Afterwards, the original model has been reduced by balanced
truncation [13] to obtained first order single-input single-output models of the IGBT and the
diode. These models allow the extraction of the effective thermal capacitances Cth and time
constants τ of the IGBTs and the diodes. The extracted parameters, which characterize the
thermal model in case of the HP2, are summarized in Table 7.3. This static and dynamic
information was used to create a simple physically insightful model according to (7.12)
dT avg∗
j avg
c·Γ + T avg∗
j = Rth P̂ loss (7.12)
dt
The transfer matrix Γ is a diagonal matrix with the time constants as entries, whereas
the input matrix Rth reflects the static system behavior. The factor c has been added to
effectively create virtual heat sinks with enhanced thermal capacitance C ∗th = c · C th .
Analysis of design options In Figure 7.16 the original thermal impedance of one IGBT
is plotted (in blue) together with ideal virtual heat sink models that have been obtained
via equation (7.12) with various factors of c ranging from 4 to 60 (in grey). Furthermore,
Figure 7.16 shows the thermal impedances with various factors of c ranging from 4 to
60 that can be emulated by the active thermal state feedback controller. It is important
to understand that the active thermal control (ATC) can only emulate the behavior of a
thermal model as virtual heat sink within its integral state feedback bandwidth. This is
because the elevated stiffness, which reaches towards infinite for dc, enforces zero error at
low bandwidth. For this reason, the ideal behavior of the virtual heat sink models and the
thermal characteristics, which can actually be emulated, deviate in proximity and above
the integral state feedback bandwidth. At high bandwidth, the thermal impedances of the
emulated virtual heat sinks align to the original thermal impedance, because the thermal
state feedback control does not reach this bandwidth. However, the larger the virtual
thermal capacitance is selected with the factor c, the stronger the thermal impedance is
reduced between 10 mHz and 5 Hz. This reduction of the thermal impedance reduces thermal
cycles within that frequency range.
This results in the question, whether there is a maximal virtual thermal capacitance
186
i
Integral bandwidth of feedback control (fb = 1.6 Hz) Original thermal impedance
10-1 Ideal virtual heat sink model
Emulated virtual heat sink

4
Scaling Factor c
|Zth(jw)| in K/W
6
8
10
10-2 c 20
30
40
50
60
10-3
90
arg(Zth(jw)) in °
45
-45
-90
10-2 10-1 100 101 102
Frequency in Hz
Figure 7.16: Thermal impedance plot of an IGBT within the power module, of the virtual
heat sink and of the thermal impedance behavior that is achieved via active
thermal control
C ∗th = c · C th that should not be exceeded by the virtual heat sink design. This design limit
depends on the loss manipulation range that is available for a specific application. If for a
given application this c is selected too ambitious, this results in an operation which drives
the thermal state feedback control from one limitation to the next. To avoid this undesirable
behavior, the virtual heat sink must be adjusted by the factor c depending on the needs to
the application to obtain an optimal performance. A good way to find an optimal design
factor c are simulations with a range of virtual heat sink designs. A subsequent analysis of
the thermal cycle reduction capability typically shows that for a design constant c above a
certain limit, no significant thermal cycle reduction capability can be achieved.
7.4.3 Design of the Error Feedback Path

Finally, the design of the error feedback path to the virtual heat sink ∆P avg corr must be
addressed. If the thermal control pushes the loss manipulator of one device in saturation,
the devices losses cannot be manipulated anymore and the control loop is opened. However,
via the error feedback path to the virtual heat sink ∆P avg
corr another control loop is closed. In
this situation, the same feedback regulator that normally controls the junction temperatures
187
of the power module starts to control the virtual heat sink. It manipulates the junction
temperature of the virtual heat sink T avg∗
j such that it does not deviate from the physical
junction temperature of the power module T avg
j until the loss manipulation limit resolves. To
guarantee that this secondary control loop operates with the same dynamics as the primary
control loop, the feedback gain is set to Ko = c according to (7.13).
∗
Cth
Ko = =c (7.13)
Cth
Thereby the systems dynamics do not change when the regulator starts to control the virtual
heat sink to keep it aligned to the physical heat, when the loss modulation unit enters a
limit.
7.5 Review of the Active Thermal Control Methodology

The state block diagram of the entire active thermal cycle reduction methodology that was
developed is depicted in Figure 7.17 Its new features that were developed in this work are
briefly summarized.
Loss manipulation The loss manipulation unit is realized least invasively by model-based
manipulation of adaptive gate resistances and the converter switching frequency in real time.
This allows the individual loss manipulation and thermal control of multiple devices within
a power module over a wide operation range that has not been achieved in prior work.
Observer based control The active thermal control uses the averaged junction tempera-
tures over one electrical excitation period as control variables. A thermal observer structure
is introduced that estimates these averaged temperatures by combination of thermal model
and sensor information. The observer technology makes this work the first to realize closed
loop control of averaged temperatures achieving an increased robustness and insensitivity
to modeling errors.
Model-based active thermal state feedback control A thermal state feedback control
algorithm is developed that uses state feedback decoupling to obtain a high control band-
width. For the design of the decoupling structure and the PI state feedback gains a compact
design procedure is proposed and important design considerations are highlighted.
Virtual heat sink A key element of the active thermal cycle reduction algorithm is a virtual
heat sink that derives feasible and stress releasing thermal trajectories. The trajectories are
applied to the power module with a unique thermal feedback structure that smoothly ma-
nipulates the averaged junction temperature of the power module, especially in the presence
of loss manipulation limits.
In the following, the performance of this active thermal cycle reduction technology is
evaluated in various simulations.
188
Power Module
abc
i
abc
Converter d Loss Generation Heat Sink Tconv Qjc
Operation Vdc X OP Tspatial
X conv Ploss 1 1 Tspatial
Tjavg * Ploss(X OP,Tj,Rg) Junction
Rg Tj T
Cth S Temperature Spatial Tj
fsw Sensing
Tj Thermal
0 -1 Ploss
R g0 fsw Rth
avg
Observer Ploss
avg
avg Tspatial
avg,0 0 0
P
loss (X OP,Rg ,fsw ) X conv T avg
Tj
X conv
1
avg,0 Ki avg Loss Modulator
Ploss Virtual Heat Sink Tconv S DPloss,i
*
Tspatial
1 1 T *avg avg Pmax avg
Tj*avg T*javg DPloss,p DPloss,m Rg(DPloss
avg
) Rg*
avg C*th S Kp
P corr Pmin fsw(DPloss) f sw
Tjavg qjc
avg
R*th-1 Perror
avg avg
DPcorr Ko DPerror
Kp Feedback Controller
Figure 7.17: Thermal control framework for active thermal cycle reduction
189
7.5 Review of the Active Thermal Control Methodology
7.6 Simulation Results

The following section presents and discusses simulation results of a Hybridpack2 power
module (HP2) that is operated with the introduced active thermal control (ATC) algorithm
for active thermal cycle reduction. It is demonstrated how the gate resistance and the
PWM frequency of the power converter can be manipulated such that the thermal cycles of
the converter are effectively reduced. In the consequent sections, the presented simulations
results are used to quantify the lifetime enhancement that is achieved with the ATC.
The simulation results are only shown for one IGBT (IGBTA) and its anti-parallel diode
(DiodeA) of a half bridge. The other device pair IGBTB and DiodeB of the half bridge
as well as the devices in the other half bridges of the power module show nearly identical
results but are just shifted in phase. Only at operation with very low or zero excitation
frequency, when two devices of each half bridge permanently conduct current whereas the
other two devices are not utilized, the thermal profile of the other device pairs deviates.
The design range of the utilized virtual heat sinks, the operation point gate resistance
and the operation point PWM frequency that are used in the simulations are summarized
in Table 7.4. The thermal state feedback control for the simulation was designed exactly as
it is discussed in 7.3.3 with the feedback gains summarized in Table 7.2.
7.6.1 Evaluation of Active Thermal Cycle Reduction for a Repetitive

Load
This section analyzes active thermal cycle reduction via gate resistance manipulation and
combined gate resistance and PWM frequency manipulation for the HP2 that is operated on
a repetitive load profile. The repetitive load profile is created by a variation of the current
amplitude between 200 A and 500 A with a frequency of 100 mHz. All remaining operation
parameters are kept constant and are summarized in Table 7.5.
Loss manipulation via gate resistance variation First, only the gate resistances are used
for loss manipulation. The simulation results that provide insight into the active thermal
cycle reduction via gate resistance manipulation are illustrated in Figure 7.18. For the initial
30 s, the converter is operated without ATC using a constant gate resistance of Rg = 3 Ω
and a PWM frequency of fpwm = 10 kHz. At t = 30 s the ATC is activated. It manipulates
the gate resistance between Rgmin = 3 Ω and Rgmax = 15 Ω using the loss manipulation unit
that was introduced in Figure 7.6. The ATC uses a virtual heat sink which exhibits a
thermal capacitance that is magnified by a factor of 60.
In the first trace of Figure 7.18, the instantaneous and averaged junction temperature
of the IGBT and the diode are depicted together with the amplitude of the load current.
The magnified view shows the thermal cycles of the instantaneous junction temperatures at
Table 7.4: Operational parameters of the virtual heat sink and the loss manipulation
∗
Magnification c = Cth /Cth Operation gate resistance Rgo o
Operation PWM frequency fpwm
10 to 60 5Ω 10 kHz
190
Table 7.5: Operation point of the repetitive load profile

Voltage amplitude cos(φ0 ) DC-link voltage Fundamental frequency PWM frequency Fluid temperature
200 V 1 400 V 30 Hz 5 and 10 kHz 40 ◦C
ATC deactivated ATC activated

Junction temperature in °C
80 800
60 600
Current in A
75
40 70
400
65 Instantaneous IGBT temperature Tj,IGBT
60
55 Averaged IGBT temperature Tj,Diode
20 2 2.1 2.2 2.3 avg
Instantaneous diode temperature Tj,IGBT 200
avg
Phase current amplitude Ir Averaged diode temperature Tj,Diode
0 0
0 10 20 30 40 50 60 70 80
80 800
Temperature in °C
60
Losses in W
600
40 400
avg
Junction temperature Tj,IGBT
20 avg* 200
Junction temperature reference Tj,IGBT
avg
Losses Ploss,IGBT
0 0
0 10 20 30 40 50 60 70 80
20 200
Resistance in W
10 100 Losses in W
0 0
-10 -100
Gate resistance Rgate
avg
-20 Manipulated losses DPloss,IGBT -200
0 10 20 30 40 50 60 70 80
Time in s
∗
Figure 7.18: Active thermal cycle reduction using a virtual heat sink with Cth = 60 · Cth
via gate resistance manipulation during a repetitive load profile at operation
conditions specified in Table 7.5
the electrical excitation frequency that occurs due to the alternating nature of the current.
The second trace shows the averaged IGBT temperature that is controlled with the active
thermal control algorithm, its control reference, which is generated with the virtual heat
sink concept, and the total losses of the IGBT. The third trace exhibits the gate resistance
and the manipulated averaged IGBT losses.
The simulation shows that the ATC manipulates the gate resistance of the IGBT such
that it is augmented at low load current and reduced at high load current. Thereby, the
loss variation of the device is partially decoupled and the thermal cycle of the junction
191
temperature is effectively reduced from ∆Tj = 30 K to ∆Tj = 18 K. It is important to take

into account that the thermal cycles that occur at the electrical excitation frequency are
not reduced by the proposed control algorithm, as it only controls averaged temperatures.
Consequently, the thermal cycles of the IGBT junction temperature cannot be further re-
duced than the fundamental cycles of ∆Tj = 11 K. The junction temperature of the diode
is not actively controlled with the discussed method. On the one hand this is not possible
with gate resistance manipulation only. On the other hand, this is not necessary for most
electrical drives, because the IGBTs are significantly more stressed compared to the diodes if
the electrical machine is not dominantly operated as a generator. Nevertheless, the thermal
cycles of the diodes are also slightly reduced from ∆Tj = 18 K to ∆Tj = 14 K. This happens
nearly exclusively due to the thermal cross-coupling from the IGBT (IGBTA) to the diode
(DiodeA), which are located next to each other in the power module. In this context, it is
important to realize that the gate resistance manipulation has a negligible impact on the
switching losses of the diode according to the loss models that were introduced in chapter
3.1.
The performance of the closed loop thermal control can be analyzed by examination
of the averaged IGBT junction temperature and its reference in the second trace. These
variables show that the control algorithm achieves accurate command tracking. Whenever
the manipulated input, in this case the gate resistor, is driven to its limits, the active
feedback path of the virtual heat sink corrects the junction temperature reference so that
it is always feasible and the system limits are never exceeded. This feature is of great
importance, as it eliminates the need for an anti-wind up that can easily excite additional
thermal cycles.
Loss manipulation via combined gate resistance and switching frequency variation In
addition to the gate resistance the PWM frequency can be used as a second manipulated
input. Both manipulated inputs are effectively combined in the loss manipulation unit that
was introduced in Figure 7.8. With this enhanced loss manipulation unit, the converter is
mostly operated with a variable gate resistance at a constant PWM frequency of 10 kHz.
However, the PWM frequency is reduced within a hysteresis band to 5 kHz if the thermal
control algorithm commands extremely low losses. In Figure 7.19, the simulation results for
this operation are illustrated.
The additional manipulation of the PWM frequency significantly increases the loss ma-
nipulation limits and enables a much stronger influence of the active thermal control on
the power module operation. Even though the PWM frequency is only manipulable at two
discrete levels, the commanded losses are applied smoothly, as the high bandwidth manipu-
lation of the gate resistance decouples harsh changes of the PWM frequency. Consequently,
the thermal cycles of the IGBT junction temperature are further reduced to ∆Tj = 14 K
due to the increased loss manipulation range. Also, the thermal cycles of the diode are
indirectly reduced to ∆Tj = 12 K due to the concurrently reduced thermal cross coupling.
The increased loss manipulation has also a beneficial effect on the long term thermal
behavior of the IGBT temperature that increases more slowly. This is the desired behavior
∗
of the virtual heat sink and is caused by its large virtual thermal capacitance of Cth = 60·Cth .
Note that this behavior could not be realized with the limited loss manipulation capability
192

80 800
60 600
Current in A
40 400
Instantaneous IGBT temperature Tj,IGBT
Averaged IGBT temperature Tj,Diode
20 avg
Instantaneous diode temperature Tj,IGBT 200
avg
Phase current amplitude Ir Averaged diode temperature Tj,Diode
0 0
0 10 20 30 40 50 60 70 80
80 800
Temperature in °C
Losses in W
60 600
40 400
avg
20 Junction temperature Tj,IGBT 200
avg*
avg
Losses Ploss,IGBT
0 0
0 10 20 30 40 50 60 70 80
Resistance in W, Frequency in kHz
20 200
10 100
Losses in W
0 0
-10 Gate resistance Rgate -100

PWM frequency fPWM
avg
-20 Manipulated losses DPloss,IGBT -200
0 10 20 30 40 50 60 70 80
Time in s
∗
Figure 7.19: Active thermal cycle reduction using a virtual heat sink with Cth = 60 · Cth
via combined gate resistance and PWM frequency manipulation during a
repetitive load profile at operation conditions specified in Table 7.5
of the gate resistance only, whose results depicted in Figure 7.18 were discussed previously.
Design review of the virtual heat sink An important design parameter for the active
∗
thermal cycle reduction concept is the virtual thermal capacitance Cth of the virtual heat
sink. It is increased by the factor c in comparison to the thermal capacitance of the power
∗
module Cth = c · Cth . In Figure 7.16 an overview of the thermal impedances is given that
can be emulated with a wide range of c. To analyze the effect of this design factor c on the
thermal cycle reduction capability, the previous simulation is repeated with a wide range of
virtual thermal capacitances with a factor c ranging from c = 10 to c = 60. The overlaid
simulation results of the averaged IGBT junction temperature and its average losses are
plotted in Figure 7.20. In this analysis, the thermal cycles of the diode are not further
discussed, because they are for all cases considerably smaller than the thermal cycles of the
IGBT and do not have a relevant impact on the lifetime of the power module.
193
90
Temperature Tj,IGBT in °C
80
avg
70
Enlargement of the virtual
60 capacity c = Cth*/Cth
10 40
50 20 50
30 60
40
0 10 20 30 40 50 60 70 80
Loss manipulation DPloss,IGBT in W
400
200
avg
-200
-400
0 10 20 30 40 50 60 70 80
Time in s
∗
Figure 7.20: Active thermal cycle reduction using virtual heat sinks with Cth = 10 · Cth
to 60 · Cth via combined gate resistance and PWM frequency manipulation
during a repetitive load profile at operation conditions specified in Table 7.5
∗
An increment of the virtual thermal capacitance Cth has two major effects. Most im-
portantly, it reduces the thermal cycles that occur repetitively with the load pattern. Fur-
thermore, it reduces the average dynamics of the IGBT junction temperature over a long
term horizon. At small virtual thermal capacitances, e.g. that are obtained with k = 10,
an increment of the virtual thermal capacitance results in a significant reduction of thermal
cycles. However, at higher virtual thermal capacitances in the range of c = 50 or c = 60
this effect saturates.
A more detailed analysis of the results can be made based on Figure 7.21. It illustrates the
thermal cycles of the instantaneous and averaged IGBT junction temperature as a function
of the magnification factor c of the thermal capacitance. In addition, the figure depicts the
ideal effect of the virtual heat sink design on the thermal cycles, that would be obtained if its
behavior could be perfectly emulated. This ideal behavior has been calculated analytically
assuming a periodic rectangular excitation leading to (7.14).
exp (T0 /τ ∗ ) − 1
∆Tj = Ploss · Rth with τ ∗ = Rth · Cth · c (7.14)
exp (T0 /τ ∗ ) + 1
The equation determines the thermal cycle as a function of the thermal resistance of the
IGBTs within the power module Rth = 0.081 K W−1 , the excitation loss Ploss = 210 W, the
rise time of the cycle T0 = 5 s and the time constant of the virtual heat sink τ ∗ = Rth Cth · c
It can be observed from Figure 7.21 that the simulated thermal cycle of the average
194
35 80
Ideal effect of the virtual reference
Averaged temperature simulation
30 Instantaneous temperature simulation 70
60
Tj in K
25
Lifetime enhancement c
50
20
IGBT thermal cycle
40
15
30
10
20
5 10
0 0
0 10 20 30 40 50 60 10 20 30 40 50 60
Mangification factor c of the virtual capacitance Mangification factor c of the virtual capacitance
Figure 7.21: Simulation of the ATC at its emulation of various virtual heat sinks (left)
Lifetime enhancement of the achieved control performance compared to the
operation without ATC (right)
junction temperature follows the ideal model with a nearly constant offset of 1 K to 2 K.
This offset is mainly due to the limited bandwidth of the active thermal control which was
discussed based on Figure 7.16. However, apart from this small offset, the ATC appropriately
emulates the behavior of the virtual heat sink.
Potential evaluation of ATC for periodic loadings The thermal cycle depth of the in-
stantaneous IGBT junction temperature is 10 K larger than the thermal cycle depth of the
averaged junction temperature due to the thermal cycles that occur at the excitation fre-
quency of the current. Note that it is the cycles of the instantaneous junction temperature
that need to be evaluated to determine the lifetime enhancement that is achieved by the
ATC for the discussed periodic loading. The thermal cycles of the diode do not need to be
evaluated for the lifetime evaluation, because they are significantly smaller than the thermal
cycles of the IGBT for all investigated scenarios. Thus, the lifetime enhancement χ that is
achieved by the ATC is determined based on (7.15).
!−b
∆TjATC (c)
χ(c) = (7.15)
∆Tjnormal
It determines the lifetime enhancement χ based on the thermal cycle depth at normal
operation ∆Tjnormal , the thermal cycle depth ∆TjATC (c) that is achieved with a virtual heat
∗
sink with a c times magnified thermal capacitance Cth and the lifetime coefficient b = 7 that
was introduced in 3.4.
The effect of the ATC on the lifetime of the power module is illustrated in Figure 7.21. It
shows that the lifetime increment that is obtained with the ATC in comparison to normal
operation grows quadratic with the magnification factor of the virtual heat sink c. This
occurs even though the reduction of the thermal cycle saturates at high k because of the
195
Table 7.6: Operation parameters of the power module within the trolleybus
Gate resistance Rg f0 PWM frequency fpwm DC-link voltage udc Coolant temperature Tconv
3 Ω to 15 Ω 5 kHz and 10 kHz 400 V 40 ◦C
exponential expression for the number of cycles to failure. For a virtual heat sink that
amplifies the thermal capacitance by a factor of 60, the lifetime of the power module can be
increased by a factor of 80. Note that for this discussed scenario the faster thermal cycles
that occur at the excitation frequency of the current with a depth of ∆Tj = 10 K have only
a negligible influence on the service life of the power module. Their influence on the power
module service life is one decade less than the influence of the load cycles.
This analysis shows that the potential of the active thermal cycle reduction for the sup-
pression of thermal cycles that are caused by strong periodic loading patterns, e.g. in
industry applications, can be significant. It allows increasing the lifetime of the power elec-
tronic module by 1 to 2 decades. An even further lifetime increment seems possible with
respect to the slop of the lifetime enhancement curve at k = 80. However, the saturation
of thermal cycle reduction and the more relevant effect of thermal cycles at the electrical
excitation frequency make this path increasingly difficult.
7.6.2 Evaluation of Active Thermal Cycle Reduction for a Trolleybus

This section investigates the effect of active thermal cycle reduction for a power module that
is operated in a trolleybus application over realistic load cycles. The previous simulations of
periodic loading conditions showed that the combined gate resistance and hysteresis-based
PWM frequency manipulation achieve a high bandwidth, smooth loss manipulation of the
power module over a wide operation range. Therefore, this loss modulation technique, illus-
trated in Figure 7.8, has been chosen for the following study of the trolleybus. Additionally,
at low excitation frequencies with f0 < 5 Hz, the ATC is deactivated and the minimum
PWM frequency of 5 kHz and gate resistances of 3 Ω are applied. This operation at min-
imal possible losses is the best way to reduce thermal cycles of an inverter module at low
excitation frequency, as discussed in section 7.2.2 and [331]. The kinematic and drive-train
model of the trolleybus as well as the investigated mission profiles have been in-depth in-
troduced in 4.2. The operation conditions of the HP2 power module are listed in Table 7.6.
The thermal behavior of the trolleybus with and without active thermal control is analyzed
for two different driving cycles, the Lublin cycle and the Paris cycle, which were introduced in
4.2. The different characteristics of both cycles represent the range of operation environment
in which a trolleybus application with an ATC could potentially operate.
Lublin cycle Simulation results for the Lublin cycle are illustrated in Figure 7.22. The first
trace of Figure 7.22 reflects the electrical load data that were derived with the simulation
framework introduced in 4.3. The second trace shows the instantaneous junction tempera-
ture of one IGBT within the HP2 that is either operated with ATC or without. In the third
trace of the figure, the corresponding averaged junction temperatures for both simulations
196
Current in A, Angle in °, Voltage in V

1000
Phase current amplitude Ir Electrical excitation frequency fex
800 Phase voltage amplitude Ur Phase angle f0 200
Frequency in Hz
600 150
400 100
200 50
0 0
0 200 400 600 800 1000 1200 1400
120
With active thermal control
Temperature in °C
100 No active thermal control
80
60
40
0 200 400 600 800 1000 1200 1400
80 800
Temperature in °C
60 600
Losses in W
40 avg 400
Junction temperature Tj,IGBT (no ATC)
Junction temperature Tj,IGBT (ATC)
20 avg* 200
avg
Losses Ploss,IGBT (ATC / no ATC)
0 0
0 200 400 600 800 1000 1200 1400
20 200
10 100
Losses in W
0 0
-10 -100
-20 PWM frequency fPWM -200
avg
Manipulated losses DPloss,IGBT
-30 -300
0 200 400 600 800 1000 1200 1400
Time in s
Figure 7.22: Evaluation of active thermal cycle reduction with a virtual thermal capaci-
∗
tance of Cth = 60 · Cth for a trolleybus application operated on the Lublin
cycle
are illustrated together with the junction temperature reference and the losses that are gen-
erated when the ATC is activated or deactivated. The final trace exhibits the manipulated
losses, the gate resistance of the IGBT and the PWM frequency of the converter that are
applied when the ATC is activated. Note that the simulation without ATC has been con-
ducted with the minimum gate resistance of Rg = 3 Ω and a switching frequency of 10 kHz
to make a fair comparison.
197

1000
Frequency in Hz
600 150
400 100
200 50
0 0
400 450 500 550 600 650 700
120
Temperature in °C
80
60
40
400 450 500 550 600 650 700
80 800
Temperature in °C
60 600
Losses in W
40 avg 400
20 avg* 200
avg
0 0
400 450 500 550 600 650 700
20 200
10 100
Losses in W
0 0
-10 -100
avg
-30 -300
400 450 500 550 600 650 700
Time in s
Figure 7.23: Magnified perspective on the active thermal cycle reduction simulation that
is depicted in Figure 7.22
The simulation results show that the thermal cycles of the instantaneous junction temper-
ature can be significantly reduced by the ATC. This is achieved by the ATC using effective
loss manipulation that decouples the variations of the dynamic load, which occurs over the
mission profile. Consequently, the losses of the IGBT that occur with ATC exhibit signif-
icantly less cycles than the IGBT losses that occur under normal operation without ATC.
Note that the temperatures and losses of the diodes are not discussed, because they have a
negligible impact on the degradation of the power module and are therefore not manipulated
198

1000
Frequency in Hz
600 150
400 100
200 50
0 0
0 200 400 600 800 1000 1200 1400 1600 1800
120
Temperature in °C
80
60
40
0 200 400 600 800 1000 1200 1400 1600 1800
80 800
Temperature in °C
60 600
Losses in W
40 avg 400
20 avg* 200
avg
0 0
0 200 400 600 800 1000 1200 1400 1600 1800
20 200
10 100
Losses in W
0 0
-10 -100
avg
-30 -300
0 200 400 600 800 1000 1200 1400 1600 1800
Time in s
Figure 7.24: Evaluation of active thermal cycle reduction via combined gate resistance
and switching frequency manipulation over the ”Paris” trolleybus profile
on purpose.
A more in-depth analysis of the ATC performance can be conducted based on Figure 7.23.
It provides a magnified view on one part of the mission profile that represents the load that
occurs when the trolleybus moves from one stop to the next. This simulation excerpt
illustrates how under normal operation conditions without ATC the peak currents during
the acceleration and acceleration intervals lead to large loss and temperature peaks. The
199
ATC decouples these excitations by transient reduction of the gate resistance and the PWM
frequency.
The simulations also show that one limitation of the ATC is a slightly elevated average
temperature in comparison to the normal operation, during which the power module is
operated permanently with the lowest gate resistances of Rg = 3 Ω. This cannot be avoided,
because one must elevate the average operation temperature, in this case by feeding the
virtual heat sink with reference losses for an operation point gate resistance of Rg,0 = 5 Ω,
to create a positive and negative loss manipulation margin.
Paris cycle Finally, the ATC is evaluated analogously for the identical trolleybus operated
on the Paris mission profile that was introduced in 4.2. In comparison to the Lublin mission
profile the Paris mission profile exhibits more stops and more and faster accelerations and
deceleration processes. Consequently, the resulting current, loss and temperature peaks
are larger and occur more frequently. However, the instantaneous and averaged junction
temperatures show that the ATC operates properly and reduces or even eliminates most
thermal cycles. This is achieved by a more dynamic manipulation of the gate resistance and
switching frequency.
In the next section, the simulation results that were obtained for the trolleybus application
are evaluated to determine the lifetime increment as well as the life cycle cost reduction that
can be achieved with the ATC methodology that was proposed.
7.7 Evaluation of Lifetime Increment and Life Cycle Costs

for a Trolleybus
This section analyzes the lifetime increment and degradation reduction that can be achieved
via the introduced active thermal cycle reduction technique for a trolleybus application.
Based on this analysis the economic potential of the active thermal cycle reduction tech-
nique is evaluated. All data that are utilized in this section and post-processed to derive
lifetime, degradation and cost parameters has been obtained with the simulations that were
introduced in the previous section.
7.7.1 Evaluation of the Lifetime Increment

First, the lifetime increment of the power module that is achieved with the ATC within the
trolleybus application is analyzed. Therefore, the simulation of ATC, which was presented
in Figure 7.22 and Figure 7.24 for the Lublin and Paris cycle, have been repeated for a wide
range of virtual heat sinks that are characterized by the magnification factor k. The obtained
instantaneous junction temperature traces of the IGBTs and diodes within one half-bridge
(IGBTA, DiodeA, IGBTB and DiodeB) have been post processed via Rain-flow counting,
linear damage accumulation and application of the empirical aging law, as illustrated in
3.4. This process allows deriving the number of mission cycles to failure as a function of
the magnification factor c which are plotted for the Lublin and Paris cycle in Figure 7.25.
In addition, Figure 7.25 indicates the number of cycles to failure that are achieved under
200
7.7 Evaluation of Lifetime Increment and Life Cycle Costs for a Trolleybus

900 400
IGBTA ATC on IGBTB ATC on IGBTA ATC on IGBTB ATC on
DiodeA ATC on DiodeB ATC on DiodeA ATC on DiodeB ATC on
800 Worst case (IGBTA) ATC off 350 Worst case (IGBTB) ATC off
Worst case (DiodeA) PWM frequency reduction Worst case (IGBTB) PWM frequency reduction
Number of cycles to failure N f/1000

700
300
600
250
500
200
400
150
300
100
200
100 50
0 0
10 20 30 40 50 60 10 20 30 40 50 60
Magnification c of the virtual capacitance Magnification c of the virtual capacitance
Figure 7.25: Number of cycles to failure of the devices within the HP2 power module in
a trolleybus application operated over the Lublin and Paris cycle that were
specified in 4.2
normal operation without any ATC and by PWM frequency reduction at low speed, which
was introduced in 7.2.2 as a comparatively simple life-time enhancement technique. For
these two cases, only the device with the worst number of cycles to failure was specified.
The analysis of the number of cycles to failure Nf shows that the IGBTs are the most
critically stressed components and are degraded much faster than the diodes. The ATC
emulates a larger virtual thermal capacitance of the IGBTs that reduces the thermal stress
and consequently increases their number of cycles to failure. The virtual thermal capacitance
of the IGBTs is manipulated by adjustment of the magnification factor c. For a magnification
factor c between 10 and 60, the number of cycles to failure increases monotonically. With
c = 60 the lifetime of a power module can be incremented by a factor of 5.3 from 75 000
to 400 000 mission cycles in case of the Lublin cycle and by a factor of 4.3 from 31 000 to
135 000 mission cycles in case of the Paris cycle. However, for an ATC whose virtual thermal
capacitance exceeds c = 60 the lifetime increment saturates in case of the Lublin cycle. The
same effect occurs in case of the Paris cycles for a slightly higher factor c. This indicates
that an even larger virtual thermal capacitance cannot be properly emulated by the ATC
anymore.
The results of the trolleybus with the simple thermal feedforward control introduced
in 7.2.2, that reduces the PWM frequency at low electrical excitation frequencies, show
that this simple measure alone can achieve a very modest lifetime increment in case of the
Lublin cycle. However, in case of the Paris cycle the lifetime of the power module can be
incremented by approximately a factor of two. This is because during the Paris cycles the
power module is more frequently operated at very low speed and high currents. From this
observation it can be concluded that for mission cycles which exhibit harsh acceleration and
201
0.08
Thermal resistance Rth in K/W

0.06
0.04
0.02
0
10 % 15 % 20 % 30 % 40 %
Physical scaling of the power module
Figure 7.26: Effect of power module scaling on the thermal resistance Rth of the IGBT
deceleration profiles and a large number of stops, such as the Paris cycle, a feedforward
control is a very cost-effective and efficient technology for increasing the service life.
7.7.2 Lifetime Increment by Physical Scaling of the Power Module

After the in-depth analysis of the service life extension that could be achieved via ATC this
section investigates how the identical service life extension can be realized by physical scaling
of the power module. Therefore, the thermal modeling methodology that was developed in
this work has been used to derive thermal models of scaled HP2s power modules that are
stretched along their width by 10 % to 40 %. The physical scaling of the power module
primarily affects the static thermal resistance and thereby scales the magnitude of thermal
impedances Zth of IGBTs and diodes. This change of the thermal resistance is illustrated in
Figure 7.26 for the investigated scalings. This effect occurs because the scaling creates a wide
thermal path allowing stronger heat spreading within the power module. This heat spreading
reduces the total thermal resistance but does not change any thermal time constants of the
power module.
The physical scaling also has an impact on the losses within the power module [205]. Since
the current of the scaled power modules is distributed to more IGBT cells, the conduction
losses are reduced. However, the switching losses remain constant, as the occurrence of
switching losses in more cells and the distribution of the current to them approximately
cancel out each other.
The resulting electrothermal models of the scaled power modules have been applied in the
mission cycle simulation without any ATC. Based on the simulated temperature data, the
number of cycles to failure Nf of the physically scaled power modules have been computed.
The number of cycles to failure Nf of the power devices have been plotted as a function
of the physical power module scaling in Figure 7.27. The results show that the number of
cycles to failure grows linearly with the power module scaling.
To make an effective comparison between the physically scaled power module and the
ATC, the number of cycles to failure that could be achieved with ATC at k = 60 are also
plotted in Figure 7.27. Thereby it can be identified how much physical scaling there is
necessary to achieve the same service life that can be realized with ATC. Assuming that
202

5 5
10 10
IGBTA scaled IGBTB scaled IGBTA scaled IGBTB scaled
DiodeA scaled DiodeB scaled DiodeA scaled DiodeB scaled
Cycles to failure with ATC (k = 60) Cycles to failure with ATC (k = 60)
Cycles to failure with neither scaling nor ATC Cycles to failure with neither scaling nor ATC

4 4
10 10
35 %
103 103
20 %
2 2
10 10
Module scaling achieving same lifetime like ATC Module scaling achieving same lifetime like ATC
1 1
10 10
10 15 20 25 30 35 40 10 15 20 25 30 35 40
Physical module scaling in % Module enhancement in %
Figure 7.27: Number of cycles to failure of the devices within the HP2 power module in a
trolleybus application operated over the Lublin and Paris cycle as a function
of the physical module size that was scaled in 5 % steps to 40 %
the physical scaling is only feasible in 5 % steps, the points of intersection in Figure 7.27
lead to the following result: The power module must be scaled by 35 % in case of the Lublin
cycle and by 20 % in case of the Paris cycle to achieve the lifetime that can potentially be
realized with ATC.
7.7.3 Impact of Active Thermal Cycle Reduction on Degradation

In a next step, the thermal cycles that occur during the operation of the trolleybus with and
without ATC at IGBTA, the upper IGBT in the half bridge, are categorized with respect
to their number of occurrences and the resulting degradation. The results for the Lublin
cycle are depicted in Figure 7.28. For this investigation, a virtual thermal heat sink has
been used whose thermal capacitance is magnified by a factor of c = 60.
The data of the uncontrolled power module reflect properties that have already been
identified and discussed in chapter 4.4: The large majority of the thermal cycles have a
cycle depth ∆Tj < 30 K. However, these thousands of thermal cycles do rarely contribute
to the degradation of the power module. Instead, very few cycles with a cycle depth of
∆Tj > 30 K that occur over the mission profile are responsible for more than 90 % of the
power module degradation.
The active thermal control (ATC) is able to reduce the degradation of IGBTA within
the power module to less than 25 % in case of the Lublin cycle. This results in a life time
increment of the IGBT by a factor of four. In case of the Paris cycle, which is not further
investigated, the result is in a similar range. This lifetime enhancement is achieved primarily,
because the ATC is able to reduce the large thermal cycles. Note that the IGBT lifetime
203
Categorization of the Lublin profile cycles Degradation of the categorized cycles

5 0.45
10
IGBTA Fraction IGBTA
0.4 Accumulated 2
Accumulated degradation in in pu
4
10
0.35
Degradation in in pu
Number of cycles Nf
0.3 1.5
3
10
0.25
2 0.2 1
10
0.15
1
10 0.1 0.5
With ATC 0.05 With ATC

0 Without ATC Without ATC
10
0 0
0 10 20 30 40 50 60 0 10 20 30 40 50 60
Thermal cycle DTj in K Thermal cycle DTj in K
Figure 7.28: Degradation analysis of IGBTA with and without ATC at trolleybus opera-
tion over the Lublin cycle. The ATC was operated with a virtual heat sink
with k = 60
increment of the entire power module is slightly higher because the thermal stress removal
at IGBTB is even stronger.
For a more effective analysis of the ATC, the 20 cycles that have most influence on the
degradation of IGBTA are illustrated in Figure 7.29. Figure 7.29 reflects that the primary
driving factor for degradation is the thermal cycle depth ∆Tj . However, also the maximum
temperature Tmax as well as the cycle period Ton have a smaller but relevant influence on
the degradation. That is why the severance of degradation does not always correspond with
the thermal cycles depth ∆Tj .
In case of normal converter operation without ATC, the four most severe thermal cycles
cause nearly 70 % of the IGBT degradation. The ATC is able to reduce the four most severe
cycles by 5 K to 10 K. The reduction of only these four thermal cycles results in a reduction
of degradation by approximately a factor of three. Furthermore, the ATC can reduce the
thermal cycles that follow in their severity to the mentioned four cycles such that they only
have a very small effect on the lifetime of the IGBT.
This demonstrates the effectiveness of the introduced active thermal control methodology.
It is able to efficiently reduce the thermal cycles that result into the most critical degrada-
tion and nearly eliminates the degradation effects of most other cycles. Thereby, it reduces
the degradation stress of the IGBTs by a factor of four such that they are not the life-time
limiting devices of the power module. For an even larger active thermal cycle reduction, it
becomes necessary to increase the loss manipulation range, because the thermal control can-
not perform above these limits resulting in the saturation that was observed in Figure 7.25.
One promising way to increase the loss manipulation range is the additional manipulation
of the zero-sequence duty cycle that can be used to distribute the conduction losses between
diodes and IGBTs more effectively. As the diodes are not the lifetime limiting devices, a
shift of conduction losses from the IGBTs to the diodes is a promising future technology.
204
Accumulated degradation in pu
0.25
Degradation in pu
No ATC Fraction
0.2 1
ATC Accumulated
0.15 0.75
0.1 0.5
0.05 0.25
0 0
2 4 6 8 10 12 14 16 18 20
Individual cycles
T in K
50
No ATC
40 ATC
Thermal cyclej
30
20
10
0
2 4 6 8 10 12 14 16 18 20
Individual cycles
120
Maximal temperature in K
No ATC
100 ATC
80
60
40
2 4 6 8 10 12 14 16 18 20
Individual cycles
600
No ATC
Cycle period in s
ATC
400
200
0
2 4 6 8 10 12 14 16 18 20
Individual cycles
Figure 7.29: Analysis of the 20 most severe thermal cycles of IGBTA with and without
ATC at trolleybus operation over the Lublin cycle. The ATC was operated
with a virtual heat sink with k = 60
205
7.7.4 Potential of Active Thermal Cycle Reduction for Life Cycle Cost
Reduction
Finally, the economic potential of the ATC in a trolleybus application is going to be evalu-
ated. Therefore, the trolleybus has been simulated with and without ATC over the Lublin
cycle and the Paris cycle as described in 7.6.2. The ATC that has been used operates with
combined gate resistance and switching frequency-based loss manipulation and exhibits a
∗
virtual heat sink that exhibits a virtual capacitance of Cth = 60 · Cth .
For an economical evaluation, the life costs of the ATC-based power module operation
are compared with two alternatives:
• Regular replacement of the power module at its end-of-life
• Physical up-scaling of the converter
The replacement of the power module at its end-of-life is the simplest approach. However,
it requires to estimate when the end-of-life is reached, e.g. with the monitoring system that
was introduced in section 6. Alternatively, the end-of-life must be estimated based on
lifetime simulations, e.g. as illustrated in section 4.4, and by applying a significant safety
margin. However, in the following we assume that the end-of-life can be determined and
a predictive maintenance can assure the regular replacement of a fully degraded converter
module.
The second option requires the physically scaling of the power module such that its
improved electrothermal characteristic reduces the occurring thermal cycles resulting in a
similar life time increment that was achieved with ATC. For this purpose, the thermal model
of the HP2 has been scaled in its width and the loss model has been adapted to reflect the
larger chip area. The scaling that is necessary for this purpose was presented in section
7.7.2. In case of the Lublin cycle, the power module must be scaled by 35 %. However, in
case of the Paris cycle, the power module must be scaled by 20 % only.
Operation conditions In Table 7.7, key information on the power converter operation,
which is extracted from various simulations of the power module over the Paris and the
Lublin load profile, is summarized. The table provides information about the lifetime related
variables, e.g. the number of cycles to failure, operational time to failure and the lifetime
increment, which is achieved via ATC. As the Paris cycle with a duration of 1400 s is 28 %
longer than the Lublin cycle with 1800 s, the life cycle costs that are obtained within this
analysis are normalized by the operation hours to enable a comparison of the results from
both cycles. If this normalization is used to derive the operation time to failure based on
the mission cycles to failure, the result shows that the Paris cycle creates approximately
twice the thermal stress compared to the Lublin cycle. The ATC, with k = 60, can better
reduce the thermal stress of the moderate Lublin cycle compared to the more severe Paris
cycle, which is reflected in the lifetime increment factor of 5.3 and 4.4.
Furthermore, Table 7.7 provides information on the power module scaling that results in
the same lifetime like the ATC, the converter losses over one mission cycle and the changes
of converter losses that occur either at ATC or after physical scaling. A physical scaling
of the power module by 35 % in case of the Lublin cycle and by 20 % in case of the Paris
206
Table 7.7: Lifetime, loss and scaling parameters of the trolleybus operated on the Lublin
and Paris cycle that were derived from the previous simulations
Cycle Lublin Paris
Cycle duration 1400 s 1800 s
Mission cycles to failure Nf (no ATC) 75 000 31 000
Mission cycles to failure Nf (ATC) 400 000 135 000
Operation time to failure (no ATC) 29 100 h 15 500 h
Operation time to failure (ATC) 155 555 h 67 500 h
Lifetime increment via ATC 5.3 4.4
Physical scaling enabling same lifetime 35 % 20 %
Normal converter losses per cycle 484 W h 781 W h
Loss change per cycle due to ATC 36 W h −57 W h
Loss change per cycle due to scaling −58 W h −72 W h
Table 7.8: Survey of general cost parameters

Cost category Minimum cost Maximum cost
Electricity cost 0.06 e/kWh 0.12 e/kWh
Converter cost 5000 e 10 000 e
Physical scaling cost 50 e/% 100 e/%
Driver and sensor costs for ATC 100 e 100 e
Replacement costs 800 e 1600 e
cycle leads to the identical lifetime like the ATC. If the power module is scaled, its losses
are reduced in case of both cycles, because the same load current is distributed to more
IGBT cells. The ATC increases the converter losses in case of the Lublin cycle because it
operates at a higher operation point gate resistance Rg0 , which is explained in section 7.4.1.
However, in case of the Paris cycle, the ATC reduces the losses, because the PWM frequency
reduction is more often applied. This occurs over the Paris cycle more often than over the
Lublin cycle due to its many stops and lower average speed and has a much larger effect on
the converter losses than the higher operation point gate resistance.
Cost conditions To make an economic comparison of the ATC and the two introduced
alternatives that achieve the same lifetime, the costs of electricity, the power converter,
physical scaling, drivers and sensors for ATC and power module replacement need to be
specified. In Table 7.8 the minimum and maximum of the costs for the subsequent study
are listed. Nowadays, for a trolleybus application in Germany the cost of electricity can be
estimated to 10.69 ct/kWh which is supported by the report [303]. Based on this value, a
price range of 0.06 e to 0.12 e was assumed for the cost of electricity. The price of power
converters for electric vehicle applications has been intensively studied for power ratings
between 100 kVA to 200 kVA in [86]. However, for a trolleybus application these data can
only be used as an orientation, because the number of produced power converter units for a
trolleybus are significantly lower than the range that has been investigated in [86]. Based on
this information, the following study assumes costs for the entire converter system between
207
Table 7.9: Summary of the economic evaluation condition

Electricity costs 0.06 e/kWh Electricity costs 0.12 e/kWh
Converter/Replacement costs 5000 e/800 e Condition 1 Condition 2
Converter/Replacement costs 10 000 e/1600 e Condition 3 Condition 4
Table 7.10: Cost evaluation of operation with ATC in comparison to regular replacement
and to physical power module scaling by 35 % over the Lublin cycle for con-
dition 1/2
Cost A. Regular replacement B. Physical scaling C. Active thermal control
Cost condition 1/2 1 2 1 2
Power converter cost 5000 e 5000 e 5000 e 5000 e 5000 e
Replacement cost 4266 e 0e 0e 0e 0e
Scaling cost 0e 1750 e 1750 e 0e 0e
Sensor/Driver cost ATC 0e 0e 0e 100 e 100 e
Loss change by ATC 0e 0e 0e 864 e 1728 e
Loss change by scaling 0e −1392 e −2784 e 0e 0e
Summation over lifetime 9266 e 5358 e 3966 e 5964 e 6828 e
Cost per 1000 h operation 59.57 e 34.44 e 25.50 e 38.34 e 43.89 e
5000 e and 10 000 e. The costs for the physical scaling are determined in proportion to
the full price of the power converter. The ATC requires temperature sensors and a smart
gate driver whose costs are estimated at 100 e. Finally, the replacement cost of the power
module are estimated between 800 e and 1600 e. This estimation is based on the market
prize of the Hybridpack2 power module (HP2) and the estimated cost for the installation
of the new power module.
With this information it is possible to approximately estimate the costs that result from
the operation of the trolleybus over an extended lifetime via active thermal cycles reduction
in comparison to the two introduced alternatives. The cost estimation has been conducted
for four conditions that are summarized in Table 7.9 and include low and high cost levels for
electricity as well as for the power converter, its scaling and its replacement. The analysis of
these four cost conditions is carried out to determine under which circumstances the ATC
is an attractive option in terms of the resulting life cycle costs.
Cost evaluation The costs for the power module and its operation that occur if the trol-
leybus is operated with the Lublin cycle over 400000 cycles under conditions 1 and 2 have
been calculated in Table 7.10. Note that the converter losses that occur in the unmodified
power module under normal operation conditions and are listed in Table 7.7 are not taken
into account for the cost comparison. These are considered as operational costs that occur
for all scenarios equally. Thus, only losses that occur additionally or are eliminated in the
specific scenarios are taken into account.
In case of scenario A, the power module is always replaced in a predictive maintenance
when it reaches its en-of-life. To endure the 400000 cycles, the power module must be
replaced five times. However, the power module that is used during the final operation
208
Table 7.11: Cost evaluation of operation with ATC in comparison to regular replacement
and to physical power module scaling by 20 % over the Paris cycle for condition
1/2
Power converter cost 5000 e 5000 e 5000 e 5000 e 5000 e
Loss change by ATC 0e 0e 0e −461 e −1166 e
Summation over lifetime 8483 e 5416 e 4833 e 4638 e 4176 e
stage is not fully degraded, such that only the utilized percentage of the acquisition cost
is taken into account. Thus, in this scenario costs need to be considered for the power
converter and its regular replacement.
Similarly, the costs of scenario B are analyzed that achieves a lifetime of 400000 mission
profiles over the Lublin cycle via scaling the power module by 35 %. For this scenario, the
relevant costs are the power converter costs, the scaling costs and the cost reduction that
occur because the scaled converter exhibits less device losses.
Finally, the scenario that achieves a lifetime of 400000 mission cycles via ATC is analyzed.
The relevant cost factors for this scenario are the power converter cost, the costs for the
advanced driver circuitry and the sensors, which are needed for the ATC, and the costs that
occur because of the additional device losses due to loss manipulation.
A similar costs summary has been made for the Paris cycle at cost conditions 1 and 2 in
Table 7.11. Note that one major difference, in case of the Paris cycle, lies in the cost that
occur due to a change of the device losses at operation with the ATC. In case of the Paris
cycle the ATC does not lead to additional losses, but leads to less losses, which has been
discussed within this section.
The cost summary for high converter and replacement costs (cost condition 3/4 in Ta-
ble 7.9) have been done analogously and are depicted in Table 7.12 and Table 7.13.
Operation cost comparison A comparison of the three scenarios, ATC, physical scaling
and in-time replacement, has been made for the four cost conditions. This comparison di-
rectly comes to the result that the in-time replacement is the most cost intensive option
independent of the mission profile and the cost conditions. Consequently, the two competi-
tive concepts, the ATC and the physical scaling, are compared for both mission profiles and
the 4 cost conditions 1, 2, 3 and 4. The comparison is done based on the bar plots that are
illustrated in Figure 7.30.
It can be observed from Figure 7.30 that in case of the Paris mission profile the ATC
leads to a cost reduction in the range of 13 % to 16 % for all investigated cost conditions.
209
Table 7.12: Economic evaluation of ATC over the Lublin cycles in comparison to regular
replacement before failure and to physical scaling of the power module by 35 %
achieving the identical lifetime for condition 3/4
Power converter cost 10 000 e 10 000 e 10 000 e 10 000 e 10 000 e
Loss change by ATC 0e 0e 0e 864 e 1728 e
Summation over lifetime 18 533 e 12 108 e 10 716 e 10 964 e 11 828 e
Table 7.13: Economic evaluation of ATC over the Paris cycles in comparison to regular
replacement before failure and to physical scaling of the power module by 20 %
achieving the identical lifetime for condition 3/4
Power converter cost 10 000 e 10 000 e 10 000 e 10 000 e 10 000 e
Loss change by ATC 0e 0e 0e −416 e −923 e
Summation over lifetime 16 967 e 11 416 e 10 833 e 9638 e 9176 e
In case of the Lublin cycle the ATC only leads to cost reductions compared to the physical
scaling scenario if the electricity costs are low and the power converter and scaling costs
are high. In this particular case, the ATC can achieve cost savings of 9 %. For all other
cost conditions of the Lublin cycle, the selection of a larger power module leads to lower life
cycle costs and is the preferable option in comparison to the ATC. This applies in particular
to high electricity costs and low inverter and scaling costs, since in this case the physical
scaling is 40 % superior to the ATC.
Figure 7.30 also reflects that for all four costs conditions and scenarios the Paris cycle
results in significantly higher life cycle costs than the Lublin cycle. This can be explained
by the higher operational stress that occurs in case of the Paris cycle because of its harsh
and frequently occurring accelerations and decelerations.
Potential evaluation and discussion This economical potential evaluation shows that the
ATC can lead to cost savings up to 10 % or even slightly higher at the right cost conditions.
In particular low electricity costs and high component costs, can lead to superior life cycle
210
7.8 Summary
Low electricity costs 6 ct/kWh High electricity costs 12 ct/kWh

200 200
Physical scaling Physical scaling
Active thermal control Active thermal control
Low converter costs
150 Cost condition 1 150 Cost condition 2
100 100
14 % 13 %
10 % 41 %
50 50
0 0
Lublin cycle Paris cycle Lublin cycle Paris cycle
200 200
Physical scaling 16 % Physical scaling
15 %
Active thermal control Active thermal control
High converter costs
150 Cost condition 3 150

Cost condition 4
100 100
9% 9%
50 50
0 0
Lublin cycle Paris cycle Lublin cycle Paris cycle
Figure 7.30: Operation cost comparison of the ATC and a physically scaled power module
for the Paris and Lublin cycle operation at different cost conditions
costs of the ATC in comparison to a scaling of the power converter. However, besides the
development of cost conditions, the load profile has a strong impact on the life cycle costs of
the ATC and on the questions whether it is superior over a physical scaling strategy. A load
profile, like the profile derived for the Paris mission cycle, that exhibits large current peaks
and transients in particular at low excitation frequencies can most easily benefit from the
ATC. However, for other types of load profiles, as the Lublin cycle, the economic potential
depends on the precise boundary conditions, in particular the costs.
Nevertheless, this study underlines that the ATC should be treated as an interesting
operating option for power converters in traction applications that can effectively reduce
the life cycle costs of the converter system.
7.8 Summary
It was demonstrated in this chapter how active thermal cycle reduction techniques increase
the reliability and service life of power electronic modules. They directly reduce thermally
induced strain and simultaneously decrease fatigue. This chapter presents important tech-
nologies that are required for closed loop active thermal cycle reduction of multi-device
power modules and can be linked to a strong methodology.
• A thermal observer structure that estimates averaged junction temperature with high
bandwidth and nearly zero lag is firstly utilized in a thermal controller to realize true
state feedback control of averaged junction temperature.
211
• A minimal invasive loss manipulation unit for individual power devices was developed
that effectively combines gate resistance and switching frequency as manipulated in-
puts for the decoupled loss manipulation of the power module.
• This loss manipulation unit is cascaded by a model-based control algorithm that con-
trols the averaged junction temperatures, which are estimated with the aforementioned
observer.
• A virtual heat sink concept is proposed that is utilized as a trajectory filter for the
derivation of stress relieving temperature references that are feasible within the loss
manipulation limits.
The active thermal cycle reduction with the proposed methodology has been evaluated
for a periodic load operation, e.g. as it occurs in an industrial drive, and for a trolleybus
application over typical mission profiles. The evaluation of the ATC over the periodic load
operation indicates that this technology can enable a lifetime increment by one to two
decades as it effectively decouples load the strong periodic load variations. The application
of the ATC in a trolleybus shows that the service life of the power module can be increased
by a factor of 4-5. Compared to a power module that achieves the same lifetime through
physical scaling, the active thermal cycle reduction can achieve a life cycle cost reduction
of approximately 10% if it is operated over a metropolitan mission profile.
212
8 Experimental Evaluation
This chapter presents experimental results that demonstrate the accuracy of the developed
models and the feasibility of the proposed technologies for thermal monitoring and control of
power modules. The chapter starts by introducing the experimental setup that consists of an
electric load emulator and the device under test (DUT) converter based on the Hybridpack2
power module (HP2). Afterwards, the electrothermal models that have been developed
within this work in chapter 4 are experimentally evaluated and their accuracy is discussed.
In a next step, the techniques for electrothermal and degradation monitoring of power
modules that were proposed in chapter 5 and 6 are experimentally evaluated with the
device under test (DUT) on the load emulator. Finally, the active thermal cycle reduction
techniques that have been proposed in chapter 7 are investigated experimentally.
Important contributions to the experimental setup have been made by Lukas A. Ruppert
in his Bachelor thesis [253] and Hao Zeng in his Master thesis [349] that were co-supervised
as a part of this dissertation. Selected contributions and results of this chapter have been
published in [305, 311–313, 315].
8.1 Experimental Setup

The experimental investigations of this work were conducted with a DUT power converter
on a load emulator and are introduced in the following.
8.1.1 Electric Load Emulator

For the evaluation of the spatial electrothermal models as well as for the experimental
evaluation of the proposed monitoring and control structures, an electric load emulator test
bench has been designed and developed in collaboration with Dr. Jochen von Bloh and
AixControl GmbH, Aachen. The following section describes the topology and operation
principle of this load emulator test bench.
Topology and operational principle The load emulator was designed such that it is capa-
ble of operating a three-phase inverter module under realistic electrothermal load conditions,
e.g. as they occur during operation of an industrial drive or of an electric vehicle. The max-
imum ratings of the test bench in terms of its dc-link voltage udc , phase current amplitude
Ir , power angle φ, fundamental frequency f0 and pulse width modulation (PWM) frequency
fpwm are summarized within Table 8.1. It was a key design objective to develop the test
bench such that it can operate from the utility grid with a peak supply power of 20 kW, e.g
from a 3-phase, 400 V, 32 A grid interface, that is widely available in German laboratories.
For testing inverter modules within the operating range specified in Table 8.1 up to a rated
power of 300 kW with a power supply that sources only 20 kW, a classical back-to-back
213
Ri Load Emualtor idcu Device under Test (DUT)
Lf iduta
Udc *
udc Cdc idutb Cdut udut
idutc
idcd
3 inductors (0.5mH/0.3mH) Driver board

XCS 2000 control platform Hybridpack2 power module
Load emulator converter LT25F infra-red sensors
Figure 8.1: Load emulator with DUT
Table 8.1: Maximum amplitude ratings of the test bench hardware

udc Ir φ f0 fpwm
50 V to 800 V 0 A to 600 A °
−180 to 180 ° 0 Hz to 300 Hz 2 kHz to 20 kHz
configuration of two three-phase buck converters is used. The topology of the test bench as
well as images of the involved components are shown in Figure 8.1.
The DUT inverter, which is the HP2 in this work, is connected with a three-phase induc-
tor to the three-phase load emulator. The interface inductance that has been used for the
experiments in this work exhibits an inductance of Lf = 0.5 mH. Both converters are oper-
ated with a synchronized pulse-width modulation (PWM) at the identical PWM frequency
fpwm . An electrical mission profile is applied to the DUT inverter by commanding a three
phase voltage to the DUT itself, which applies this voltage to the inductor, while the load
emulator is operated such that it controls the three phase currents according to the given
current references. Thereby, arbitrary electrical mission profiles can be applied to the DUT
inverter to monitor its thermal response and evaluate its stationary and transient load ca-
pability. This test bench topology provides the advantage that it exhibits a simple structure
and that the power can circulate between the two converters. Thereby, the power supply
must only compensate the losses of the load emulator and the DUT. However, it requires
both converters to be operated at the same dc-link voltage. This presents no limitation for
linear PWM operation, but it does not allow tests in over-modulation or six-step operation.
The hardware setup of the test bench and the DUT is depicted in Figure 8.1. The load
emulator is a modified universal stack test bench, that is primarily developed for end-of-line
214
8.1 Experimental Setup
tests and is commercially available from AixControl GmbH. For the supervision, control
and communication of the test bench, a XCS2000 rapid control prototyping system from
AixControl is employed. It utilizes a Shark DSP from Analog Devices that is programmed
in C++ and a Spartan 6 FPGA from Xilinx that generates the PWM pattern and triggers
AD conversion processes.
User interface The communication interface of the test bench is implemented on the Shark
DSP. An UART based serial communication protocol is used to create a communication link
between the DSP and a MATLAB based Graphical User Interface (GUI) that is operated
on a conventional computer. The MATLAB GUI allows an arbitrary mission profile to act
as a command to the control platform by submitting an operation vector given by (8.1) with
an update rate of fupdate = 5 Hz.
X conv = (IDUT VDUT f0 fpwm udc φ) (8.1)
The operation vector includes the DUT current amplitude IDUT , the DUT voltage amplitude
VDUT or modulation index MDUT = 0.5 · VDUT /udc , the fundamental frequency f0 , the PWM
frequency fpwm , the dc-link voltage udc and the phase angle φ. This operation vector X conv
can be extracted from a simulation, e.g. from a long term drive train simulation of an
electric vehicle.
The DSP system continuously updates its internal voltage and current references, v abc
DUT
and v abc
ref , based on the command vector X conv every sampling period Ts = 1/fpwm . The
references are determined via (8.2) to (8.4) with n = 0,1,2 for each phase.
θ(k) = θ(k − 1) + 2π · Ts (k) · f0 (k) (8.2)

x 2π
iref (k) = IDUT · sin θ(k) − n · − φ(k) (8.3)
3

x 2π
vdut (k) = VDUT · sin θ(k) − n · (8.4)
3
Furthermore, the PWM frequency fpwm as well as the sampling and control period Ts =
1/fpwm are synchronously updated if the command for fpwm changes. Finally, changes of
the dc-link voltage command u∗dc are commanded to the dc power supply unit. For more
in-depth information of the test bench it is referred to [315, 349].
8.1.2 Device under Test (DUT)

This section introduces the DUT converter that is used to evaluate the electrothermal
modeling, monitoring and control techniques, which were developed in this work.
Power module A power converter based on a decapsulated Hybridpack2 power module

[107] is used as a DUT in this work. The decapsulation of the power module has been
achieved using Ardrox 2312 silicone rubber remover. After the power module has been
decapsulated and dried, it is sprayed with a matt dark grey paint to achieve a high and
homogeneous emissivity of the surface of the power module. The resulting device under
215
Figure 8.2: Photo of a decapsulated and dark grey colored Hybridpack2 power module
(HP2) that has been used as a DUT
test is depicted in Figure 8.2. The decapsulation limits the voltage capability of the power
electronic module. To avoid the triggering of critical discharge mechanisms the dc-link
voltage has been kept at 100 V for all experiments. Thereby, the dc-link voltage is kept at
25 % of its rated value. This brings the disadvantage, that the loss manipulation capability
of the gate driver introduced in chapter 7.2.1 is reduced by a factor of 10. The pin-fin
array heat sink of the HP2 is cooled with Ethylene-Glycol water coolant at a temperature
between 20 ◦C to 30 ◦C. However, the coolant temperature can be assumed constant for
one experiment, which typically lasts 1 min, because of the large thermal capacitance of the
cooling circuit.
Features and limitations of the DUT For this work, smart gate drivers have been devel-
oped, as a part of [253], which allow real-time manipulation of the gate resistances. They
have been in-depth introduced in 7.2. They are attached to the large printed circuit board
(PCB), depicted in Figure 8.1, that exhibits a CPLD. The CPLD supervises the commands
for the gate driver and is interfaced to a NTC temperature evaluation circuitry for immedi-
ate operation shut down in case of over-temperatures. The large PCB is connected to the
power module via 3 PCB bridges that keep the power module DCBs uncovered so that the
surface temperatures can be monitored. The gate connectors within the PCB bridges have
been designed shielded and with a minimal possible inductance to avoid a strong impact
on the switching transients and consequently on the losses. Despite this measure, the gate
connectors had inductances of 45 nH to 65 nH, which has a relevant impact on the switching
transients and the resulting switching losses. For this reason, the switching loss parame-
ters that were used for the experiment were slightly adjusted compared to the parameters
obtained with double pulse tests using some of the introduced technologies.
Temperature measurement Four LT25F IR sensors from Optris have been used to mea-
sure the junction temperature of the IGBTs and diodes of one power module half bridge
in real-time with a sampling frequency of 500 Hz. The information of these sensors is fed
to the DSP system that commands the load emulator test bench and also executes ther-
mal monitoring and control algorithms. Unfortunately, their maximum usable bandwidth is
limited to 20 Hz at high load currents due to measurement noise, that is primarily induced
216
8.2 Electrothermal Model Evaluation via Dynamic Load Emulation
by magnetic coupling into the IR sensors. In addition to the IR sensors that monitor the
junction temperature, the NTC temperature information is measured and passed to the
DSP in real-time. Furthermore, one half bridge of the power module is monitored by an
IR camera. Note that the information captured by the IR cameras was not used for real-
time monitoring but for the subsequent analysis of the temperature distributions that occur
during operation.
Implementation of thermal real-time monitoring and control Finally, the implemen-

tation of the thermal real-time monitoring and control algorithms is discussed. Similar to
the control algorithm of the load emulator test bench, these algorithms are executed on the
Shark DSP from Analog Devices that is embedded in the XCS2005 rapid control prototyping
platform from AixControl. As mentioned before, the temperature information of the four
IR sensors are directly transmitted to the DSP. In addition, the DSP exhibits the complete
information on the operation variables, e.g. voltage, currents, NTC temperatures, PWM
frequency, commanded gate resistances, dc-link voltage, excitation frequency and power
factor. Thereby, it has all information necessary for the monitoring algorithms that were
presented in this work. Also, if the ATC is operated, it can command the individual gate
resistances of the devices and change the PWM frequency of the converter. The sampling
and computation frequency of the thermal monitoring and control algorithms is fixed to
1 kHz. As a consequence, the gate resistance manipulation and the PWM frequency are
updated at this frequency. Despite this, the sampling and computation frequency of the
current control is kept synchronized to the PWM frequency as illustrated in [306].
8.2 Electrothermal Model Evaluation via Dynamic Load

Emulation
In the following section, it is illustrated how the load emulator is used for the experimental
evaluation of the electrothermal model. The operation of the power module via a load
emulator test bench allows reproducing the electrothermal loads that normally occur in real
applications in a laboratory environment. Thereby, the 2-D surface temperature distribution
can be extracted with an IR camera in the laboratory if the power module is decapsulated.
Following this concept, an exemplary load profile that was derived from the Lublin mission
profile was applied to the decapsulated DUT power module with the operation conditions
summarized in Table 8.2.
The load profile, which is depicted in the first trace of Figure 8.3, reflects the characteris-
tics of an acceleration followed by a deceleration process. From the temperature distribution
that was captured with an ImageIR 8300 IR camera from InfraTec sampling at 355 Hz, the
device temperatures were extracted and were plotted in the second and third trace of Fig-
ure 8.3 together with simulation results for the same load profile. The device temperature
is the measured temperature at the device surface metallization in the center of the device.
It is assumed to be identical to the junction temperature in the following even though there
might be a small temperature gradient across the device. In addition to the extracted and
measured instantaneous junction temperatures, the averaged junction temperatures were
217
Voltage in V, Frequency in Hz
Current in A, Angle in ° 600 60
Peak current in A
400 40
Peak voltage in V
Frequency in Hz
200 20
Load angle in °
0 0
-200 -20
0 10 20 30 40 50 60
45
IGBTA Simulation Instantaneous
40 Measurement Averaged
35
40
30
T in °C
35
30
22 22.5 23
25
0 10 20 30 40 50 60
45
DiodeA Simulation Instantaneous
40 Measurement Averaged
35
30
25
0 10 20 30 40 50 60
4
Averaged error in K
IGBT
2 Diode
-2
0 10 20 30 40 50 60
Time in s
Figure 8.3: Electrothermal characterization of the HP2 with an ImageIR 8300 IR camera
from InfraTec during a transient load profile overlaid with simulation results
obtained from the developed 3-D electrothermal model
calculated in a post processing step, using a lag free moving average filter, and were plotted
in the same plots. In the fourth trace of Figure 8.3, the error of the averaged junction
temperatures is depicted overlaid on the instantaneous junction temperatures.
The comparison of the data from simulation and experiment reveals that the electrother-
mal model exhibits an excellent accuracy. The estimation errors of the averaged junction
temperatures do not deviate more than 1 K for nearly the entire cycle. The instantaneous
218
8.3 Electrothermal Real-Time Monitoring
Table 8.2: Operation conditions of the HP2 power module

PWM frequency Gate resistance Coolant fluid Coolant temperature
fpwm = 5 kHz Rg = 7 Ω Ethylene-Glycol Water 50/50 Tconv = 20 ◦C to 30 ◦C
Figure 8.4: Comparison of 2-D surface temperature distributions obtained via electrother-
mal simulation and measurement with an InfraTec ImageIR 8300 camera
junction temperature estimation for the IGBT matches the experimental results also with
great accuracy, as can be seen in the zoomed excerpt in the second trace. Only the instan-
taneous junction temperature estimation for the diode shows little deviations. The reason
for these deviations are either inaccuracies in the loss model of the diode. Otherwise, the
area within the IR image selected to extract the junction temperature might not accurately
reflect the average junction temperature calculated by the electrothermal simulation.
In a next step, the 2-D surface temperature distributions that can be estimated with the
3-D electrothermal model are compared with experimental results. Therefore, the transient
mission profile that is depicted in Figure 8.3 was fed in a 3-D electrothermal state space
model of the HP2 power module that was reduced to 200 states via Singular Perturbation
Approximation. The resulting simulated 2-D surface temperature of the power module is
depicted for one time instant t = 15 s in Figure 8.4 overlaid on an image of the Hybridpack2
power module (HP2) next to an IR-thermography image that is extracted at the same time
instant of the loading.
The comparison of the results from the experiment and the model shows that the model
can estimate the 2-D temperature distribution with good accuracy. Of course the model
does not reflect the temperature elevations at the bond wires, because the bond wires were
not modeled within the electrothermal model. However, the temperature distribution over
the devices and the DCB are well captured by the electrothermal model.

This section experimentally investigates the thermal real-time monitoring solutions that
were derived within this work. First, the real-time model itself is implemented on a DSP
219
SNR in dB arg(Tj(jw)/Tj(jw)) in ° |Tj(jw)/Tj(jw)|

IGBT Measurement Operation point
2 Diode point
Ir = 200 A
1 Ur = 10 V
Udc = 100 V
0
40
cos(f) = 200 A
20 fpwm = 200 A
0 Rg = 7 W
-20
-40
-60
40
20
0
10-1 100 101
Frequency in Hz
Figure 8.5: Estimation accuracy evaluation of the electrothermal real-time model
to evaluate its performance. Then it is combined with temperature measurements to eval-

uate the thermal observer structures that have been proposed for accurate monitoring of
instantaneous and averaged temperature-distributions and device losses. Finally, the adap-
tive loss model calibration concept that has been proposed in this work is experimentally
investigated.
8.3.1 Real-Time Model Evaluation

For a systematic evaluation of the electrothermal model in the frequency domain, the elec-
trothermal model has been implemented as a real-time model on the test bench DSP ac-
cording to chapter 5.2.2. Therefore, the model has been truncated to a rank of 14 with the
singular perturbation approximation method, which was discussed in 4.1.8. Several exper-
iments were carried out in which the power module was operated one excitation frequency
after the other with constant loading. During the experiments, the electrothermal real-time
model was operated open loop on the DSP with a sampling frequency of 1 kHz. Its estimates
and the device temperature measurements, which were obtained with IR sensors attached
to the DUT, were recorded. After the experiment, the fundamental spectral component of
the measured and estimated temperature was extracted via Fourier Analysis in magnitude
and phase to determine the estimation accuracy. The estimation accuracy plot is illustrated
in Figure 8.5 together with the SNR of the temperature measurement.
The plot shows that the real-time model exhibits a maximum deviation of 20 % within
a bandwidth of 20 Hz. Above 20 Hz, the signal to noise ratio is low due to noise that is
induced by magnetic coupling into the IR sensors making the extraction of the estimation
accuracy difficult. Nevertheless, this result underlines the good accuracy of the truncated
model within an important bandwidth. However, even above this bandwidth the estimation
accuracy is not expected to show strong deviations. This perspective is motivated by the
220
good matching between simulations and experiments that were compared in the previous
section and the little accuracy loss of the junction temperature after model truncation,
which was observed in chapter 3.3.
8.3.2 Monitoring of Device Losses and 3-D Temperature Distributions

This section investigates the performance of the thermal observer structures presented in
chapter 5.2 that are formulated with the evaluated electrothermal real-time model. First,
the observer based estimation of instantaneous temperatures and losses is discussed. In a
next step, the enhanced observer is evaluated that allows the estimation of instantaneous
and averaged temperature and loss information via the bandwidth partitioning concept.
Thermal observer for instantaneous loss and temperature estimation For the instan-
taneous loss and temperature estimation the observer structure developed in 5.2.3 is utilized
and is operated with a sampling frequency of fs = 1 kHz. The thermal observer is exper-
imentally evaluated on the load emulator using the same load profile that was used for
the transient evaluation of the electrothermal model in 8.2. The experimental results are
illustrated in Figure 8.6. For the sake of clarity, only the temperature and loss data of the
IGBTA and the DiodeA are depicted in this and the following figures.
The thermal observer estimates the following electrothermal state variables of the power
module, whose location is illustrated in Figure 4.14:
• Junction temperature of the IGBTs T̂jIGBT and the diodes T̂jDiode

x
• Temperature of the upper DCB solder layer below every device T̂Sd,up
x
• Temperature of the lower DCB solder layer below every device T̂Sd,down
• Temperature at the NTC T̂NTC
IGBT Diode
• Device losses of the IGBTs P̂loss and the diode P̂loss
IGBT Diode
• Device loss corrections of the IGBTs ∆P̂loss and the diode ∆P̂loss
The estimated junction temperatures follow nicely the junction temperature measure-
ments that are obtained from IR sensors. However, the observer only corrects deviations
between the estimates and the measurements below its state feedback bandwidth of 6 Hz.
Above this bandwidth, the observer reconstructs the junction temperature based on the
electrothermal real-time model. Thereby, the observer effectively suppresses the noise from
its estimates that can be identified in the measured junction temperature traces. With its
3-D real-time model, the observer is able to estimate the temperature at various locations
within the power module with insensitivity to model inaccuracies. This enables the real-time
stress evaluation at critical material interfaces, e.g at the solder joints between the power
devices and the DCB and between the DCB and the base plate. Thereby, the thermal
observer can provide valuable inputs to life-time prognosis algorithms that are discussed in
[84]. Furthermore, the thermal stress can be used to manipulate the thermal loading, e.g.
by reducing the PWM frequency or the maximum load current, as discussed in [213, 237].
IGBT Diode
The closed loop estimation of the losses, P̂loss and P̂loss , is an excellent way to ob-
tain information about the losses that occur during real operation. The accuracy of this
221
Ipeak in A, fload in ° 600 60
Upeak in V, fe in Hz
Peak current
400 Peak voltage 40
Frequency
200 20
Load angle
0 0
-200 -20
0 10 20 30 40 50 60
T j IGBT
Tj in °C
Tj Diode
30
20
0 10 20 30 40 50 60
TSd,up IGBT
TSd,up Diode
Tx in °C
30 TSd,down IGBT
T Sd,downDiode
T NTC
20
0 10 20 30 40 50 60
600
Ploss IGBT
Ploss in W
400 P loss Diode
200
0
0 10 20 30 40 50 60
600
DPloss in W
DPloss IGBT
400 DPloss Diode
200
0
0 10 20 30 40 50 60
Time in s
Tj and Tj in °C
Estimates: T j IGBT Tj Diode Measurement: T j IGBT Tj Diode
30
20
11 11.5 12 12.5 13 13.5 14 14.5 15 15.5
TSd,up IGBT TSd,up Diode TSd,down IGBT T Sd,downDiode T NTC
Tx in °C
30
20
11 11.5 12 12.5 13 13.5 14 14.5 15 15.5 16
Time in s
Figure 8.6: Observer based monitoring of the instantaneous device losses and temperature
distributions within the HP2. The utilized observer was presented in chapter
5.2.3 and exhibits a bandwidth of fbp = 6 Hz and fbi = 1.2 Hz
222
information is bounded by the precision of the thermal model, which in this case of a liquid-
cooled power module can be obtained with good accuracy. With the obtained loss data
over the mission profile, the full 3-D temperature distribution of the power module can be
computed in a post processing step. That allows an accurate evaluation of the occurring
spatiotemporal dynamics leading to thermo-mechanically induced strain.
IGBT Diode
The explicit extraction of the loss errors ∆P̂loss and ∆P̂loss is also very important
information. As the thermal real-time model exhibits a good precision if the converter is
not yet degraded, the loss estimation error provides valuable information about inaccuracies
of the loss model. This information can be strategically used to calibrate the device loss
model. One example, how this can be accomplished is illustrated in 5.2.5. Furthermore, if
the loss estimation error is tracked over the life-time of the power module, a change of this
variable is a strong indicator for various degradation mechanisms. Most obviously, it can
easily detect a change of the thermal resistance Rth . However, also bond wire lift-offs and
the resulting redistribution of the load current on fewer IGBT cells leading to higher losses
can potentially be observed.
Thermal observer for instantaneous and averaged loss and temperature estimation
This paragraph evaluates the enhanced thermal observer introduced in chapter 5.2.4.2 that
estimates the device losses and power module temperatures instantaneously and averaged
over one electrical excitation period. The observer utilizes the same real-time model that
was used in the previous sections. Thus, it estimates the same electrothermal variables
instantaneously and averaged with a sampling rate of 1 kHz. The experimental results that
are depicted in Figure 8.7 are obtained for the identical load profile that was used for
previous experiments.
The experimental results show that the enhanced thermal observer estimates instanta-
avg
neous and averaged junction temperature, T̂ j and T̂ j , with good accuracy and zero lag. In
avg
particular, the accurate estimation of the averaged junction temperature T̂ j with zero lag
is of great importance, because it is the preferred variable for most thermal management
techniques. The experimentally obtained averaged junction temperature slightly reflects the
effect of the strong integral state feedback path as it shows a little pulsation. However, as
this pulsation is very small, this is an excellent indicator that the bandwidth partitioning
approach works properly and a consistent proportional and integral feedback is applied.
The enhanced thermal observer also estimates the averaged temperatures at the predefined
avg
locations of the power module that are labeled T̂ x in the fourth trace of Figure 4.14 with
x indicating the location of the temperature node. These state variables can be excellently
used for monitoring and thermal management. As an example, they are used within the
multi-variable thermal state feedback control approach that is introduce in chapter 7.3.3.
In addition to the instantaneous loss P̂ loss and loss estimation error ∆P̂ loss , the observer
avg avg
also estimates their averaged value P̂ loss and ∆P̂ loss over one electrical excitation period
avg
without any lag. In particular, the average loss estimation error ∆P̂ loss is an attractive
variable. It entirely rejects the loss pulsations, which appear in the instantaneous loss
estimation error ∆P̂ loss at the excitation frequency due to the alternating nature of the
current. This can be excellently observed by comparing the 5th trace of Figure 8.6 with the
final trace of Figure 8.7, one showing the instantaneous loss estimation error and the other
223
Ipeak in A, fload in °
600 60
Peak current
400 Peak voltage 40
Frequency
200 20
Load angle
0 0
-200 -20
0 10 20 30 40 50 60
avg
T j IGBT Tj IGBT
avg
Tj Diode Tj Diode
Tj in °C
30
20
0 10 20 30 40 50 60
avg
T j IGBT T j IGBT Tj IGBT
Tj in °C,Tj in °C
30 Measurements:
Tj Diode
Estimates:
Tj Diode Tj
avg
Diode
25
20
0 1 2 3 4 5 6 7 8 9 10
Time in s
avg
TSd,up IGBT
avg
TSd,up Diode
30 avg
Tx in °C
TSd,down IGBT
avg
T Sd,downDiode
avg
T NTC
20
0 10 20 30 40 50 60
400 Ploss IGBT

avg
Ploss IGBT
Ploss in W
avg
P loss Diode P loss Diode
200
0 10 20 30 40 50 60
40 avg
DPloss IGBT
avg
DPloss in W
DPloss Diode
20
-20
0 10 20 30 40 50 60
Time in s
Figure 8.7: Observer based monitoring of instantaneous and averaged device losses and
temperature distributions within the HP2 with the thermal observer presented
in chapter 5.2.4.2 that exhibits a bandwidth of fbp = 6 Hz and fbi = 1.2 Hz
224
Table 8.3: Operation variables for evaluation of NTC based fluid temperature estimation
Current Voltage DC-link voltage Excitation frequency Power factor PWM frequency
200 A 10 V 100 V 5 Hz cos(φ) = 1 10 kHz
showing the averaged loss estimation error. The averaged loss estimation error provides
direct insight into the average deviations that exist between the real-time model and the
physical power module. This cannot be extracted from the instantaneous loss estimation
error due to the presence of the loss pulsations and the induced measurement noise. That
avg
makes the average loss estimation error ∆P̂ loss an important variable for the device loss
calibration, but also for the detection of anomalies that can reflect critical degradation
modes after long-term converter operation.
8.3.3 NTC Sensor-based Coolant Temperature Observer

This section conducts an experimental evaluation of the NTC based coolant temperature
observer that has been introduced in chapter 5.2.6. The NTC based coolant temperature
observer structure is combined with the enhanced thermal observer introduced in 5.2.4.2.
This allows the accurate estimation of the temperatures and device losses within the power
module as well as the temperature of the coolant fluid, which is not measured with an
additional sensor. For the experimental evaluation, a constant electrical load profile has
been applied to the DUT, whose characteristics are summarized by Table 8.3
In Figure 8.8, the results of the experimental evaluation are illustrated. At a time of
t = 0.8 s, a disturbance of ∆Tf = −15 K is on purpose introduced in the fluid temperature
estimate to emulate a deviation of this value. Consequently, the junction temperatures
and also all other monitored temperatures within the power module immediately decay
by the induced disturbance of ∆Tf = −15 K. The enhanced thermal observer reacts to
the resulting deviation between the estimated junction temperature T̂ j and the junction
temperature measurement Tj . It firstly increases the loss estimation error ∆P̂loss via its
proportional and integral state feedback path, because it anticipates that the temperature
change occurred due to errors in the loss estimation. Of course, this observer feedback
can correct the junction temperature estimates within less than a second. However, this
action did not handle the root cause of the error, which is an incorrect fluid temperature
estimate. Because of this, the NTC temperature estimate T̂ NTC still shows a deviation
of 5 K from the NTC temperature measurement TNTC at the time of t = 1.5 s. Also, the
substrate temperature estimate T̂ s did not fully recover to its original value like the junction
temperature estimate did within a duration of 1 s. If there was not the additional NTC based
fluid temperature estimation that compensates the induced disturbance, these errors would
remain permanently.
However, the NTC based fluid temperature correction loop, whose structure is illustrated
in Figure 5.32, pics up on the limitation by slowly compensating the induced fluid temper-
ature disturbance ∆Tf . As a result, the fluid temperature estimate slowly recovers back to
its original value, which can be observed in the fourth trace. This reduces the error of the
NTC temperature estimate T̂ NTC . Furthermore, it reduces the loss estimation error and the
error of the substrate temperature estimate T̂ s over a horizon of 4 s. After 5 s, the NTC
225
40
Tj and Tj in °C
30
20 IGBT junction temperature

avg
Tj Tj Tj
10
0 1 2 3 4 5 6 7 8 9 10
Estimated IGBT device losses

400 avg
P loss P loss
Ploss in W
200
0
0 1 2 3 4 5 6 7 8 9 10
200
IGBT loss estimation error
DPloss in W
avg
DP loss
100
-100
0 1 2 3 4 5 6 7 8 9 10
40
Fluid temperature NTC temperature
TFluid TNTC TNTC
30
T in °C
20
10
0 1 2 3 4 5 6 7 8 9 10
40
Tj and Ts in °C
30
20 IGBT junction/substrate temperature

Tj Ts
10
0 1 2 3 4 5 6 7 8 9 10
Time in s
Figure 8.8: Experimental evaluation of the enhanced thermal observer combined with ad-
ditional NTC based fluid temperature estimation according to Figure 5.32
sensor-based fluid temperature observer achieved that the root cause error, a disturbance of
the fluid temperature estimate, was accurately decoupled by correcting the fluid estimate.
As a consequence, the temperatures and losses within the power module are accurately mon-
itored again. An important advantage of this approach in comparison to other approaches
is that it rejects the noise of the NTC measurement that is entirely suppressed in the NTC
estimate. This is achieved because of the intrinsic low-pass filtering of the observer state
feedback.
The presented evaluation shows that the NTC temperature based feedback correction
can excellently estimate fluid temperature. Thus, this technology can either replace the
coolant temperature sensor or ensure a redundancy, which is interesting for reliability critical
applications.
226
Table 8.4: Operation variables for adaptive loss model calibration

Current Voltage DC-link voltage Excitation frequency Power factor Average PWM frequency
300 A 10 V 100 V 20 Hz cos(φ) = 0.98 7 kHz
8.3.4 Evaluation of Adaptive Loss Parameter Identification

This section presents experimental results that demonstrate the feasibility of the adaptive
switching loss model identification, which was introduced in chapter 5.2.5. Therefore, the
adaptive observer that excites the device losses by PWM frequency variations to correct the
switching loss model based on the loss estimation error was implemented on the test bench
DSP. The results of the experiment that were obtained with the HP2 power module on the
load emulators at the operation point specified in Table 8.4 are illustrated in Figure 8.9
The first three traces show the long term behavior of the instantaneous and averaged junc-
tion temperature estimates T̂j and T̂javg , the total loss estimate P̂loss and the loss estimation
error ∆P̂loss and the adaptively estimated switching loss model coefficient K0 together with
the short term averaged correlated error ¯. In the fourth trace, the operation conditions in
terms of PWM frequency, current and duty cycle are depicted over a small time excerpt of
3 s. The last three traces provide a zoomed view of the first three traces.
The adaptive loss coefficient calibration is enabled by the pulsation of the PWM frequency
between 6.5 kHz and 7.5 kHz at a frequency of approximately 2.2 Hz. This leads to a periodic
loss estimation error, because the switching loss model parameter K0 is initialized at 50 % of
its value. The periodic loss estimation error is extracted via the observer in ∆P̂loss , but it is
too small to be observed with the bare eye. However, the short term averaged correlation ¯
of the excitation signal ∆fsw (t) and the loss estimation error ∆P̂loss reveal that this periodic
error of the loss estimates exists whenever there is an error in the loss model. The same
correlation of the excitation signal ∆fsw (t) and the loss estimation error ∆P̂loss , which is
typically referred to as the coherent power of model reference error, is integrated to adapt
the switching loss coefficient K0 . It can be seen in Figure 8.9 that this adaption process
moves the estimated loss model coefficient K0 towards its true value. This slowly reduces
the loss estimation error ∆P̂loss that originally resulted from the operational load and the
deviation of the loss model. At the same time, also the short-term averaged correlation ¯ is
reduced until it reaches zero and thereby stops the adaptation process.
This experimental evaluation demonstrates that the developed model reference adaptive
observer is able to automatically calibrate its device loss model.
227
Tj IGBT
Tj avg IGBT
Tj in °C
35
30
0 10 20 30 40 50 60 70
150
Ploss IGBT
DPloss in W
Ploss in W
100 DPloss IGBT 30

20
50
10
0 0
0 10 20 30 40 50 60 70
1
300
Ko/ Ko in pu
-1
e in K s
200
0.5
Loss model coefficient K0
100
0 Short time averaged correlated error e 0
0 10 20 30 40 50 60 70
Time in s
10 1
PWM frequency fsw
ir in kA d in pu
fsw in kHz
Phase current ir
5 Duty cycle d 0.5
0 0
10 10.5 11 11.5 12 12.5 13
Tj IGBT
Tj avg IGBT
35
Tj in °C
30
10 10.5 11 11.5 12 12.5 13
150
Ploss IGBT
DPloss in W
Ploss in W
100 DPloss IGBT 30

20
50
10
0 0
10 10.5 11 11.5 12 12.5 13

Ko/ Ko in pu
0.5
0
10 10.5 11 11.5 12 12.5 13
Time in s
Figure 8.9: Adaptive observer for switching loss model calibration according to Figure 5.29
with a PWM frequency pulsation at 2.2 Hz and an MRAS feedback gain of
km = 0.3 ns/A2
228
8.4 In-Situ Thermal Impedance Spectroscopy (ITIS)
20
Ploss in W, Rgate in W Excitation loss Ploss
avg
10 q,avg
Quadrature excitation Ploss
0
-10
8.5 9 9.5 10 10.5 11 11.5 12 12.5
40
48 Instantaneous temperature estimate Tj
44 Averaged temperature estimate Tj avg
Tj in °C
20 40
Estimated excitation response Tj,ex
19.8 20 20.2
0
0 5 10 15 20 25 30 35 40 45 50
|Z th (jw)| in K/W
0.06
0.04
0.02
0
0 5 10 15 20 25 30 35 40 45 50
50
arg(Z th (jw)) in °
-50
-100
0 5 10 15 20 25 30 35 40 45 50
Time in s
Figure 8.10: ITIS of an IGBT within the HP2 power module at a frequency of 1 Hz at
converter operation specified in Table 8.5
8.4 In-Situ Thermal Impedance Spectroscopy (ITIS)

Within this thesis, a concept for ITIS has been proposed that is able to estimate the FRF
of the thermal impedance Zth (jω) without interrupting normal converter operation. Its
operational principle and application areas have been in-depth discussed in chapter 6.4. In
the following, this ITIS concept is experimentally evaluated with the Hybridpack2 power
module (HP2) on the load emulator test bench for the operation conditions summarized in
Table 8.5. The ITIS has been implemented on the test bench DSP with a sampling rate of
1 kHz. For the device loss excitation, the model-based gate resistance manipulation unit,
which has been introduced in chapter 7.2, was used.
Figure 8.10 illustrates the ITIS for an excitation frequency of 1 Hz. At t = 8 s, the IGBT
losses are excited with a loss amplitude of 15 W via real-time gate resistance manipulation
avg
between Rg = 3 Ω and Rg = 12 Ω. The loss excitation reference P̂loss , its quadrature
229
Table 8.5: Operation variables for the in-situ thermal impedance spectrocopy
Current Voltage DC-link voltage Excitation frequency Power factor PWM frequency
350 A 20 V 100 V 50 Hz cos(φ) = 0.97 5 kHz
10-1
|Z th (jw)| in K/W
On-line extracted Z th
Model based Z th
10-2
0
arg(Z th (jw)) in °
-20
-40
-60
-80
10-1 100 101

Frequency in Hz
Figure 8.11: Frequency response function FRF of the HP2 extracted with ITIS and from
the electrothermal model that was developed within this work
q,avg
signal P̂loss and the resulting gate resistance command Rg are depicted in the first trace
of Figure 8.10. In the second trace of Figure 8.10 it can be seen that the loss manipulation
causes a very small temperature response T̂jex whose amplitude T0 = 0.75 K is a factor of
two smaller than the device temperature variation caused by the current alternation. The
modified thermal observer, which was introduced in Figure 6.4, is able to separate this
response T̂jex from the remaining junction temperature signal. Thereby, the loss excitation
avg q,avg
P̂loss , its quadrature component P̂loss and the thermal response T̂jex can be effectively
processed by the orthogonal correlation unit that computes the thermal impedance Zth (jω0 )
in magnitude and phase. All uncorrelated noise and also dc-offsets get suppressed by the
averaging process within the orthogonal correlation unit resulting in a smooth estimate of
the thermal impedance.
This process was repeated for excitation frequencies of 50 mHz to 5 Hz to determine the
FRF of the thermal impedance Zth (jω) over a frequency range in which important informa-
tion on various degradation mechanisms can be collected. The extracted FRF of the thermal
impedance Zth (jω) is plotted in Figure 8.11 in comparison to the thermal impedance data
that is obtained by the electrothermal model that was developed within this work. The
extracted FRF of the Zth exhibits a maximum deviation of 13 % in magnitude and 2.3° in
phase from the model. That demonstrates that the proposed ITIS concept is able to ex-
tract the Zth FRF over a wide frequency range with excellent precision without interrupting
converter operation.
230

The following section experimentally investigates the feasibility of the proposed active ther-
mal control (ATC), which was introduced in chapter 7 for thermal cycle reduction. The
experiment was conducted with a decapsulated Hybridpack2 power module (HP2) on the
load emulator test bench. The ATC algorithms and the utilized enhanced thermal observer
were implemented as discussed in chapter 7 with some minor modifications.
The dc-link voltage of the decapsulated power module voltage needed to be limited to
100 V to prevent the power module from electric discharge damage. As a consequence,
the loss manipulation range was significantly reduced by a factor of 60, according to the
switching loss model developed in chapter 3.1. At this operation point, the virtual heat sink
that was used for all simulations in this work with the virtual capacitance amplification
of 60 does not lead to smooth feasible trajectories, because it drives the loss manipulation
from one saturation to the other. Therefore, within the experimental evaluation a virtual
heat sink with a virtual capacitance amplification of 10 is used.
The entire thermal control algorithm, including the observer, was operated with an exe-
cution frequency of 1 kHz on the test bench DSP.
8.5.1 Periodic Load Profile

The experimental results of the ATC applied during a repetitive load profile are depicted in
Figure 8.12. The first trace of Figure 8.12 shows the load profile that is applied to the HP2.
At a time instant of t = 8 s, the ATC is activated The resulting change of the estimated
junction temperature profile and its control reference that is generated by the virtual heat
sink can be observed in the second trace. The junction temperature is accurately controlled
by the thermal state feedback control and follows its reference smoothly with negligible
error. As a result, the ATC emulates the behavior of the virtual heat sink and reduces the
major thermal cycle of the junction temperature from 11.5 K to 9.5 K by 17 %.
In the last three traces the instantaneous and averaged loss estimates, the manipulated
losses and the manipulated gate resistance and the PWM frequency are depicted. Note that
the total losses are not significantly changed by the ATC, because a strong loss manipulation
was not possible at the low dc-link voltage. However, the small loss manipulation of less
than 40 W that is applied as feasible command from the thermal state feedback controller is
sufficient to manipulate the thermal cycle by 17 % resulting in a potential life time increment
by a factor of 3.8. Furthermore, it can be observed that the losses commanded by the state
feedback controller do not significantly exceed the feasible losses. This indicates that the
designed virtual heat sink with a virtual capacitance increment of 10 is a good design
compromise.
The manipulated inputs, gate resistance and PWM frequency, show that the losses are
primarily augmented by increasing both variables at low load and consequently low junction
temperature of the IGBT. A more detailed evaluation shows that the gate resistance is
manipulated with high bandwidth to ensure a smooth loss manipulation, whereas the PWM
frequency is only adjusted within a hysteresis between 5 kHz and 10 kHz to increase the loss
manipulation range. This shows that the loss manipulation unit works exactly as it is
supposed to according to the considerations made in 7.2.
231
Ipeak in A, fload in °
Current
200 Peak voltage 20
Frequency
0 Load angle 0
-200 -20
0 5 10 15 20 25
45 Instantaneous Tj
Tj in °C
avg
Averaged Tj
40 Reference T,ref
avg
j
35
DT = 11.5 K DT = 9.5 K
0 5 10 15 20 25
Device losses
Ploss in W
400 Instantaneous Ploss

avg
Averaged Ploss
200
0
0 5 10 15 20 25
100
Manipulated losses
Pm,loss in W
avg
Controller output Ploss,m
avg
Feasible losses Ploss,feas
0
-100
0 5 10 15 20 25
Rgate in W,fpwm in kHz
20
Manipulated inputs
PWM frequency fpwm
10
0
0 5 10 15 20 25
Time in s
Figure 8.12: Active thermal cycle reduction of the IGBT junction temperature during a
periodic load profile
8.5.2 Modified Trolleybus Load Profile

After the evaluation of the ATC during the repetitive load profile, this section investigates
the behavior of the identical ATC during the mission profile that was derived from a trol-
leybus application and was continuously used throughout this experimental chapter. In
Figure 8.13 the experimental results are depicted. Within the first trace, the electrical load
profile is illustrated. The second trace shows the estimated instantaneous IGBT junction
temperature with and without ATC. The third trace shows the averaged IGBT junction
temperature with and without activated ATC. For the activated ATC, the third trace ad-
ditionally shows the junction temperature reference. A comparison of averaged junction
temperature estimate and its control reference shows that the ATC accurately tracks the
reference. Consequently, the active thermal state feedback control emulates the behav-
ior of the virtual heat sink which results in a visible reduction of thermal cycles. This is
achieved via the loss manipulation process that is illustrated in the fourth and fifth trace
of Figure 8.13. The fourth trace shows that the active thermal cycle reduction only slightly
effects the averaged losses that occur during the operation. In the fifth trace the controller
output and the feasible part of the loss command are depicted for the activated ATC. The
232
60
iload in A, fload in ° 600
Current
400 Peak voltage 40
Frequency
200 20
Load angle
0 0
-200 -20
0 10 20 30 40 50 60
60
Without ATC
50
With ATC
Tj in °C
40
30
0 10 20 30 40 50 60
50
avg
Without ATC Tj
in °C
45 avg
With ATC Tj
avg
ATC reference Tj,ref
avg
40
Tj
35
0 10 20 30 40 50 60
Device losses
200
Ploss in W
Without ATC
With ATC
100
avg
0
0 10 20 30 40 50 60
100
Manipulated losses of ATC
Pm,loss in W
avg
Controller output Ploss,m
avg
Feasible losses Ploss,feas
0
-100
0 10 20 30 40 50 60
Rgate in W,fpwm in kHz
20
Manipulated inputs
PWM frequency fpwm
10
0
0 10 20 30 40 50 60
Time in s
Figure 8.13: Active thermal cycle reduction of the IGBT temperature during a dynamic
mission profile
small deviation between both shows that the 10 times magnified virtual thermal capacitance
was a good design choice.
The final trace depicts the gate resistance and the PWM frequency that were manipulated
in case of the ATC to reduce the thermal cycles. It shows that whenever a load change
occurs, both manipulated inputs are effectively manipulated to decouple its effect such
that the thermal cycles are reduced. It can also be seen how the loss manipulation unit
effectively combines the gate resistance and the PWM frequency as manipulated input to
233
create a smooth loss manipulation.

Overall, the active thermal control algorithm is able to effectively reduce thermal cycles
over a repetitive load profile and over a long term mission profile of an electric drive train
by emulation of the virtual heat sink’s thermal characteristics. This leads to the reduction
of thermally induced strain and consequently increases the lifetime of the power module,
as it was in-depth discussed in 7.7. However, it is important to keep in mind that this
experimental evaluation, which already showed remarkable results, suffers from the reduced
dc-link voltage. Consequently, the active thermal cycle reduction methodology is going to
be far more effective if the power module is operated at its rated dc-link voltage of 400 V,
which must be investigated in future work.
8.6 Summary
This chapter demonstrated the experimental feasibility of the thermal monitoring and con-
trol techniques that were proposed within this thesis. The entire experimental validation
was conducted with a decapsulated Hybridpack2 power module (HP2) on a load emulator.
First, the accuracy of the utilized 3-D electrothermal real-time model was evaluated in a
comparison with measurements that were made with a high performance IR camera. The
comparison showed no more than 1 K deviation between the model and the experiment,
thus demonstrating the excellent accuracy of the model.
Afterwards, various thermal observer structures with a wide range of new features have
been experimentally evaluated. It was demonstrated with the proposed enhanced ther-
mal observer that the averaged power module temperatures can be estimated with consis-
tent feedback correction using real-time junction temperature information. The adaptive
switching loss model calibration was successfully evaluated, as it estimated its key loss
model parameter during normal converter operation. Furthermore, the NTC-based coolant
temperature observer demonstrated that the NTC temperature can be used to accurately
estimate the temperature of the coolant. Thereby, it can potentially replace the coolant
temperature measurement or provide redundancy.
For monitoring degradation of the thermal power module interface, the in-situ thermal
impedance spectroscopy (ITIS) was developed in this thesis. This chapter experimentally
demonstrated that the ITIS can estimate the thermal impedance frequency response func-
tion with nearly zero phase error and minimal magnitude error over a wide bandwidth with-
out interrupting normal converter operation. This is an important step for the real-time
identification and quantification of different degradation modes in future power converters.
Finally, the proposed active thermal control methodology for thermal cycle reduction
was experimentally evaluated. It was demonstrated that the observer based thermal state
feedback control, the real-time loss manipulation by combined gate resistance and PWM
frequency variation and the virtual heat sink concept provide a powerful methodology that
reduces thermal cycles.
234
9 Conclusions
The objective of this work was to develop a methodology that comprises techniques for elec-
trothermal modeling, monitoring and control of power electronic modules. The developed
techniques contribute to the transformation of power devices that are nowadays utilized as
a switch but are going to become reliable multi-physics actuators and sensors in the next
decade. Overall, this transformation shall lead towards a smart, safe and reliable operation
of highly integrated cost-effective future converter systems.
To address this objective, first, an electrothermal modeling framework was developed that
allows fast and accurate simulation of the losses and 3-D temperature distributions within
power electronics modules. Furthermore, it can be used to derive compact electrothermal
real-time models that are ideally suited for monitoring temperatures at reliability critical
material interfaces of the power module, e.g. at the devices, solder interfaces or the base
plate, on a conventional digital signal processor.
For real-time monitoring of power electronic modules, the electrothermal real-time models
can be effectively combined with junction temperature sensors in thermal observer struc-
tures. Therefore, a junction temperature sensing technique was developed that reconstructs
the junction temperature of an IGBT based on the gate voltage plateau and the load current.
Various observer structures have been developed that estimate instantaneous and averaged
temperature distributions of power modules with an outstanding accuracy and nearly zero
lag over a wide bandwidth. In addition, the observer can estimate the losses of the power
module within the bandwidth of their state feedback paths. This allows a simplified cali-
bration of device loss models and can detect possible degradation of the power module. For
the loss model calibration an observer based model reference adaptive system (MRAS) was
developed that can calibrate the key coefficient of the switching loss model during normal
converter operation.
To monitor structural degradations of the power module, an in-situ thermal impedance
spectroscopy technique was developed. It excites the power devices by small signal loss
injection, extracts the temperature response with a unique filtering technique and computes
the thermal impedance in magnitude and phase over a wide bandwidth. In particular, the
phase information is a key indicator of structural degradation and can be extracted with zero
error. Consequently, the frequency response information is effectively processed by artificial
neural networks to separate and quantify localized degradation modes. This creates an
excellent sensor for remote state-of-health diagnosis and prognosis of future power modules
in the field via the Internet of Things (IoT).
Finally, this work proposed a methodology for the systematic active thermal cycle re-
duction that reduces the degradation and thus increases the life-time of power electronic
modules. It comprises a loss manipulation unit, a thermal observer structure and an active
thermal cycle reduction algorithm. The developed loss manipulation unit combines gate
resistance and switching frequency as manipulated inputs for minimal invasive and precise
235
9 Conclusions
loss manipulation. This loss manipulation unit is cascaded by a model-based control al-
gorithm that controls the averaged junction temperatures, which are estimated with the
aforementioned observer. For the derivation of stress relieving temperature references that
are feasible within the loss manipulation limits, a virtual heat sink concept was developed
that is utilized as a trajectory filter. The evaluation of the active thermal cycle reduction
with the proposed methodology for a trolleybus application over typical mission profiles
shows that the service life of the power module can be increased by a factor of up to five.
Compared to a power module that achieves the same lifetime through physical scaling, the
active thermal cycle reduction achieves a life cycle cost reduction of approximately 10 %.
9.1 Contributions and Key Outcome

In the following, the contributions and key outcome of this work are summarized:
• Electrothermal real-time modeling

• Combination of finite volume modeling and model reduction via singular per-
turbation approximation results in compact, accurate and high bandwidth 3-D
thermal real-time models of power modules enabling:
• Detailed simulation of temperature distributions over long term load profiles
• Real-time monitoring of temperatures at critical material interfaces, e.g. at
the devices, solder and sinter interconnections or the base plate
• Estimation accuracy and Hankel singular values (HSV) together provide an effec-
tive tool for the accuracy evaluation of reduced order thermal models reflecting
the compromise between compactness and high bandwidth accuracy.
• A versatile software for 3-D thermal finite volume modeling of typical power
module geometries was developed.
• Reliability-oriented simulation over realistic load profiles

• A drive train simulation environment of a trolleybus was derived that creates
realistic load information for thermal and reliability oriented simulation of power
modules.
• Analysis of thermal cycles within a drive-train power module reveals that:
• The vast majorities of thermal cycles that occur within a power module at
medium and small magnitude, also those at the excitation frequency, have
negligible impact on power module degradation.
• The dominant degradation (>90 %) is caused by very few, typically less than
10 strong thermal cycles over a mission profile, whose peaks result from high
current and low excitation frequency operation, when averaged temperature
and excitation frequency induced temperature pulsation both are large.
236
9.1 Contributions and Key Outcome
• Junction temperature sensing

• Gate plateau voltage and load current information can be used as a TSEP for
robust estimation of IGBT junction temperature over a wide operation range.
• Empirical and physical models for the IGBT gate plateau voltage were derived
as a function of junction temperature, device current, electrical power module
characteristics and gate driver properties.
• A methodology was proposed that allows the systematic evaluation of TSEPs
by determining maximum junction temperature estimation errors over the entire
operation range of the devices.
• A circuitry for the minimal invasive sensing of gate plateau voltage was derived
and evaluated at rated operating conditions of the power module.
• The gate plateau and load current based junction temperature estimation was
experimentally evaluated, resulting in a worst case estimation error of 7.5 K.
• Thermal real-time monitoring

• Ultra-compact 3-D electrothermal models were implemented on a DSP to esti-
mate device losses and 3-D distributed temperatures in real time.
• An observer structure was developed that combines measured junction tempera-
ture and electrothermal models via a bandwidth partitioning and enables:
• Accurate estimation of instantaneous and averaged 3-D distributed tempera-
tures throughout the power with nearly zero lag over a wide frequency range
• Accurate closed-loop estimation of instantaneous and averaged device losses
within the observer bandwidth
• Estimation of the loss estimation error that allows long term tracking of the
device loss behavior changes and can help to indicate degradation mechanism
• Development of an observer based model reference adaptive system (MRAS) for
adaptive calibration of loss model coefficients at normal converter operation.
• Proposal of an NTC-based fluid temperature observer that accurately estimates
coolant temperature even from nosy NTC temperature data.
• Degradation monitoring and diagnosis

• A concept for in-situ thermal impedance spectroscopy was introduced that ex-
tracts the frequency response function of thermal impedances Zth (jω) without
interrupting converter operation by combination of:
• A loss modulation unit that injects periodic losses in the power devices real-
ized in this work by gate resistance manipulation
• A thermal observer structure that uses bandwidth-partitioning with a reso-
nant state-feedback path for separation of the excitation response from the
load-induced temperature profile
237
9 Conclusions
• Orthogonal correlation-based system identification that extracts the frequency

response function Zth (jω) insensitive to noise and dc-offsets
• In-situ thermal impedance spectroscopy can extract the thermal impedance mag-
nitude |Zth (jω)| with minimal error and phase arg(Zth (jω)) with zero error.
• The thermal impedance frequency response function Zth (jω) is identified as an
indicator for localized degradation in power modules.
• Phase information arg(Zth (jω)) is identified as the preferable component of Zth (jω)
for degradation monitoring, as it can be extracted without errors.
• A systematic method for detecting and quantifying localized degradation based
on the thermal impedance frequency response function Zth (jω) is introduced that
is based on artificial neural networks.
• Active thermal cycle reduction

• A model-based loss manipulation unit for multi-chip power modules was devel-
oped that employs combined gate resistance and switching frequency manipula-
tion.
• The first true junction temperature state feedback control in AC applications was
enabled by utilization of observer-based averaged junction temperature estimates
as control variables that were obtained with zero lag.
• The virtual heat sink method yields control trajectories that effectively reduce
thermal cycles of power electronic modules within loss manipulation limits.
• A potential evaluation of the proposed active thermal cycle reduction methodol-
ogy in drive train converters shows that:
• For applications with repetitive loading, e.g. in the manufacturing industry,
ATC can lead to a lifetime extension by a factor of 80.
• For application within a trolleybus drive train, ATC can enhance the lifetime
of a power module by a factor of 4-5 leading to potential life cost savings of
10 % in comparison to other alternatives.
9.2 Recommended Future Work

This work provides a comprehensive methodology on thermal modeling, monitoring and
control of power modules and can be a strong basis for further promising research in this
area, which is identified below:
• Electrothermal real-time modeling

• Bond wires can be included in the presented electrothermal model for a more
accurate acquisition of the thermal stress that occurs at the interface between
bond wires and the power devices.
• The thermal modeling software framework can be enhanced such that it allows
modeling of nonlinearities, e.g. temperature dependent material properties.
238
9.2 Recommended Future Work
• By coupling the electrothermal model with mechanical strain models the ther-
mally induced strain at reliability critical material interfaces can be estimated.
• Reliability-oriented simulation over realistic load profiles

• The degradation simulation can more accurately reflect the accelerating nature
of aging if the thermal model is continuously adapted such that it reflects the
changes of the thermal impedance that occurs as a consequence of the degradation
process. For this, an empirical model must be developed that determines the
thermal impedance as a function of the accumulated thermal cycles.
• The developed framework for reliability investigations can be applied for other
applications, e.g. grid-tied converter systems in PV or wind farms, to investigate
electrothermal stress and degradation.
• Junction temperature sensing

• In-depth investigations of fast and simple calibration measurements are necessary.
• The variance of the device parameters over a large number of devices must be
evaluated. If devices from identical wafers have nearly identical properties, this
allows the calibration effort to be reduced.
• Degradation effects on the gate plateau voltage over the lifetime of the IGBT
must be investigated thoroughly.
• It must be evaluated in which operation range a temperature estimation via gate
plateau sensing voltage can be applied for SiC-based converters.
• Thermal real-time monitoring

• The analytical loss model can be replaced by self-learning artificial neural net-
works that should after a short learning period be able to predict the losses of
the power module accurately without the need for cost intensive calibrations.
• Adaptive thermal observers that need to be developed can continuously adapt
the thermal model parameters to reflect temporary and permanent deterioration
of the power module accurately.
• The potential of on-chip temperature sensors and TSEP based temperature sens-
ing for thermal observers must be investigated.
• State-of-health diagnostics
• The in-situ thermal impedance spectroscopy must be evaluated with temperature
sensors that can be applied in real applications. These can be on-chip temper-
ature sensors, TSEPs that are extracted by the gate driver unit or NTC based
temperature sensors that are mounted in close proximity of the device.
• Various loss excitation methods for the in-situ thermal impedance spectroscopy
can be evaluated. Examples for these loss excitation methods are the manip-
ulation of the switching frequency, zero-sequence modulation or reactive power
injection.
239
9 Conclusions
• The capability of the artificial neural network for categorizing validated damage
must be investigated. This requires a significant number of sample power modules
that must be degraded via power cycling while extracting the thermal impedance.
After a defined degradation stage has been reached the power modules must be
carefully examined to quantify the degradation, e.g. delamination.
• Active thermal cycle reduction

• Long term experiments must be applied to validate the life-time enhancing effect
of active thermal cycle reduction.
• The loss modulation unit can be enhanced by manipulating the modulation
scheme via the zero-sequence duty cycle. This can potentially help to better
distribute the thermal stress between the IGBTs and the diodes.
• The active thermal cycle reduction algorithms can be enhanced such that all de-
vices degrade in an equal speed. This can be achieved by thoughtful distributions
of the thermal stress between the power devices.
• The life-time increment and economic potential of the introduced methodology
can be evaluated for other high-reliability applications, e.g. wind power systems
or solid state transformers.
240
A Appendix
A.1 Derivation of Averaged Conduction Losses

This section derives the excitation period averaged conduction losses of the devices within
an IGBT-based power converter for AC applications.
For the derivation it is assumed that the converter operates at steady-state with purely
sinusoidal currents. The current ix (t) of one half-bridge x, which was used as an example
in this section, depends only on the current amplitude Î x and the excitation frequency ω 0
according to (A.1).
ix (t) = Î x · sin (ω 0 · t) (A.1)
The duty cycle of the half bridge dx (t) depends on the used modulation scheme [172]. In case
of a standard sine-triangular modulation, which has been investigated in [57], it exhibits a
constant and a sinusoidal component according to (A.2).
1 Û x
dx (t) = · (1 + M · sin (ω 0 · t + φ0 )) with M= (A.2)
2 udc
It is a function of the modulation index M , which is the ratio between the voltage amplitude
Û x and the dc-link voltage udc , the excitation frequency ω 0 and the phase angle φ0 between
voltage Û x and current Î x . In the following, the calculation of the average conduction losses
IGBT,avg
over one excitation period of the upper IGBT Ploss,cond is illustrated in detail. Afterwards,
it will be argued how the loss in the remaining device can be derived from the obtained
expression. The averaged losses, which occur in the upper IGBT over one excitation period,
can be determined based on its collector-emitter current ice and the junction temperature
Tj by averaging of (3.1) which leads to (A.3).
ˆ T0 ˆ T0
IGBT,avg 1 1
Ploss,cond = pIGBT
cond (ice ,Tj )dt = ice · uce (ice ,Tj )dt (A.3)
T0 t=0 T0 t=0
Using the definition of the device voltage (3.3), the following expression can be obtained:
ˆ T0
IGBT,avg 1 3
Ploss.cond = Uce,0 (Tj ) · ice + Rce (Tj ) · i2ce + Sce (Tj ) · ice
2
dt (A.4)
T0 t=0
This equation can be simplified by making the assumption that Uce,0 , Rce and Sce are
constant over the integration interval T0 . By introduction of the average device current i¯ce ,
¯
= i¯2ce and the expression ice according to (A.6), equation
2 3/2
the squared rms current irms
ce
241
A Appendix
(A.4) can be simplified to (A.5).

¯23
IGBT,avg
Ploss.cond = Uce,0 · i¯ce + Rce · i¯2ce + Sce · ice (A.5)
ˆ T0 ˆ T0 ˆ T0
1 1 ¯32 1 3
i¯ce = ice (t)dt i¯2ce i2ce (t)dt ice = ice
2
(t)dt (A.6)
T0 t=0 T0 t=0 T0 t=0
In a last step, the three introduced expressions (A.6) must be derived as a function of the
current amplitude Î x , the modulation index M and the phase angle φ0 between voltage and
current. As all expressions require to average the current ice over an entire excitation period
T0 , it is a tolerable approximation to replace the instantaneous current ice (t) in the integral
expressions of (A.6) by its short term average over one switching cycle Tsw :
ice (t) ≈ i¯ce (t) (A.7)
This short term average device current i¯ce (t) can be determined according to (A.8) using
the phase current ix and the duty cycle dx .
ˆ Tsw ˆ Tsw (
1 1 ix (t) · dx (t) for ix ≥ 0
i¯ce (t) = ice (t)dt = ix (t) · dx (t)dt ≈ (A.8)
Tsw t=0 Tsw t=0 0 for ix < 0
The error made by the approximation in (A.8) is negligible, as illustrated in [211], because
the current ix (t) as well as the duty cycle are nearly constant over one switching period Tsw .
With the short term averaged current (A.8), the three expressions required to determine
the average losses over one excitation period can be calculated:
ˆ T0 ˆ T0
1 1 2 1 M · cos(φ0 )
i¯ce = ice (t)dt ≈ x x
i (t) · d (t)dt = Î x · + (A.9)
T0 t=0 T0 t=0 2π 8
ˆ T0 ˆ T0
1 1 2 1 M · cos(φ0 )
i¯2ce = 2
ice (t)dt ≈ x 2 x
i (t) · d (t)dt = Î x · + (A.10)
T0 t=0 T0 t=0 8 3π
ˆ T0 3 ˆ T0
¯23 1 1 2 3
ice = ice
2
(t)dt ≈ ix (t) 2 · dx (t)dt = Î x · (0.139 + 0.1144 · M · cos(φ0 )) (A.11)
T0 t=0 T0 t=0
Inserting the results into (A.5) allows the derivation of an averaged conduction loss model
for the upper IGBT within a half bridge.

IGBT,avg 1 M · cos(φ0 ) 2 1 M · cos(φ0 )
Ploss.cond = Uce,0 · Î x · + + Rce · Î x · +
2π 8 8 3π
3
+ Sce · Î x2 · (0.139 + 0.1144 · M · cos(φ0 ))
(A.12)
Due to the symmetrical operation of the upper IGBT and the lower IGBT within a half
242
A.2 Switching Loss Characterization
bridge, the averaged losses of the lower IGBT over one excitation period can be calculated
with the identical equation.
IGBTB,avg IGBTA,avg
Ploss.cond = Ploss.cond (A.13)
The excitation period averaged losses in the diodes can be determined using the identical
calculation approach leading to the following loss model:
¯ = U · i¯ + R · i¯2 + S · i¯2
3
Diode,avg
Ploss.cond = pDiodeB
cond T T T T T T (A.14)
ˆ T0 ˆ T0
1 1 2 1 M · cos(φ0 )
i¯T = iT (t)dt ≈ ix (t) · (1 − dx (t))dt = Î x · − (A.15)
T0 t=0 T0 t=0 2π 8
ˆ T0 ˆ T0
1 1 2 1 M · cos(φ0 )
i¯2T = 2
iT (t)dt ≈ x 2 x
i (t) · (1 − d (t))dt = Î x · − (A.16)
T0 t=0 T0 t=0 8 3π
ˆ T0 3 ˆ T0
¯3 1 1 2 3
iT2 = iT2 (t)dt ≈ ix (t) 2 · (1 − d)x (t)dt = Î x · (0.139 − 0.1144 · M · cos(φ0 ))
T0 t=0 T0 t=0
(A.17)

The switching loss characterization of the HP2 that is necessary to parameterize the switch-
ing loss model was carried out with a double-pulse test bench that has been developed in
[95, 121]. The topology and functional principle of the double-pulse test bench is depicted
in Figure A.1. Different from the well-known clamped inductive switch test, which is used
for most double-pulse characterizations described in literature [14, 202, 273], the topology
shows strong similarity to the Weil-Dobke circuit [280]. Thereby, a wide range of voltages
and currents can be applied to the DUT without any adjustments of the circuitry. The op-
erational principle of the double-pulse test bench for switching loss extraction is illustrated
in Figure A.1. For a more detailed explanation it is referred to [121].
However, in this work, the double-pulse tests have not only been conducted at different
voltages, currents and gate resistances but also at various temperatures. To ensure a con-
trolled tempering of the devices a Peltier module based tempering unit has been applied,
SHV
iL ice uce Turn-off Turn-on
-uT DDUT
SLV
DHV L iT
ice CHV UHV
0 t iL
SLV on SDUT
DLV uce
SDUT ULV CLV
on
SHV off
Figure A.1: Double pulse test bench - topology and functional principle
243
A Appendix
Figure A.2: Double pulse test bench setup
Table A.1: Double pulse measurement equipment

Oscilloscope Shunt resistance Differential probe (uce ) Differential probe (uge )
HDO6104 (Lecroy) Namexy TT-SI 200 (Testec) TT-SI 200 (Testec)
which has been introduced in [96]. It was specifically designed to control the temperature
of the HP2 heat sink accurately.
The complete experimental setup including the DUT double-pulse circuitry, the tempering
unit and the measurement devices is depicted in Figure A.2. The measurement equipment
that has been employed to characterize the turn-on and turn-off loss energies is summarized
in Table A.1. It consists of a 12 bit 1 GHz data storage oscilloscope, one low inductance
coaxial shunt and two differential voltage probes. The IGBT gate driver unit, the posi-
tive and negative rail voltages and the range of gate resistances used are summarized in
Table A.3. With the presented test setup, the switching transients of the collector emitter
voltage uce , the collector-emitter current ice and the gate voltage uge of the HP2 power
module have been recorded for a wide operation range given in Table A.2.
Switching loss measurement As an example, in Figure A.3 the turn-on and turn-off
transients of the IGBT are exemplarily depicted for different device currents ice . As the
gate resistance of all traces is kept constant, the slope of the device current dice /dt is nearly
identical. However, if the load current iL is higher, the commutation times and the resulting
switching loss energy increase. This results in the linear relationship between load current
and IGBT switching losses that has been identified in chapter 4.1.1.
Switching loss energy derivation To establish an empirical switching loss model based
on the measurements, a standardized procedure to determine the turn-on and turn-off loss
energies must be defined. In general, the switching losses energies of the IGBT and diode
can be determined based on the collector emitter voltage uce and current ice and based on
244
Table A.2: Operation range of the double-pulse tests

DC-Link voltage Device current Temperature Gate resistance
200 V − 400 V 20 A − 400 A −10 ◦C − 80 ◦C 2.2, 6.8, 15 Ω
Table A.3: Characterization of the driver parameters

Driver IC Driver voltage Driver resistance range
2SC0435T (Power Integration) 15/ − 10 V 2.2 − 15 Ω
Turn-on transition Turn-off transition
400 400
uce in V
ice in A
200 200
0 0
-200 -200
0.5 1 1.5 2 2.5 3 0.5 1 1.5 2 2.5 3
20
ugate in V
-20
0.5 1 1.5 2 2.5 3 0.5 1 1.5 2 2.5 3
Eloss in mJ
400 40
Ploss in W
200 20
0
0.5 1 1.5 2 2.5 3 0.5 1 1.5 2 2.5 3
Time in ms Time in ms
Figure A.3: Turn-on and turn-off transition of the HP2 IGBTs at three current levels with
a gate resistance of Rg = 2.2 Ω
the forward voltage uT and the diode current iT according to (A.18) and (A.19).
ˆ t2 ˆ t4 ˆ t6
IGBT IGBT IGBT IGBT Diode
Eon = psw,loss (t)dt Eoff = psw,loss (t)dt Eon = pDiode
sw,loss (t)dt
t1 t3 t5
(A.18)
pIGBT
sw,loss = uce · ice pDiode
sw,loss = uT · i T (A.19)
The integration of the losses during the switching transient that result into the switching
loss energies are shown for the IGBT at three operation points in Figure A.3. However, to
reduce the impact of measurement offsets and to separate switching and conduction losses
reasonable limits t1 , t2 ,t3 and t4 must be set on the integrals. In this work, the integration
limits are determined such that the instantaneous power reaches 4 % of its peak value at
these time instants.
Following this procedure, the double-pulse data generated over the operation range sum-
245
A Appendix
D1 SA D1 SA
DUT SB DUT SB
isense uce iheat isense uce iheat
ugate ugate
ice ice
Heat-up ice Sensing

iheat
Calibration Data
isense Tj Device Characeristic

(Ice = 100 mA)
Time
uce Tj
uce
Time
Figure A.4: Topology and operation principe of the transient thermal impedance charac-
terization test bench
marized in Table A.2 were processed to obtain the turn-on and turn-off switching loss
energies of the IGBT and diode. The resulting switching loss energies, that are obtained
from the double-pulse experiments are depicted for the IGBT and the diode on the right
hand side of Figure 4.2 and Figure 4.3 in chapter 4.1.1.
A.3 Transient Thermal Impedance Test Bench

In this work, a transient thermal impedance test bench is used in chapter 4.1.7 to evaluate
the accuracy of the developed thermal model of the HP2. The transient thermal impedance
test bench, which is used for the characterization in this work, has been developed by
Alexander Sewergin in [276] and in following projects in collaboration with Marcus Conrad.
The basic principle of the transient thermal impedance characterization is introduced in
the following based on Figure A.4 that shows the test bench topology and the sequences of
the standardized test. Before the actual test, the forward voltage of the power devices is
characterized over a large temperature range. This characterization is typically conducted in
a heating chamber at a sensing current of Isense = 100 mA to obtain a calibration function.
At the beginning of the following thermal impedance characterization a heating current
(red), which was set to Iheat = 290 A in this work, and a sensing current Isense = 100 mA
(blue) are both injected into one device of the DUT, which is continuously turned via the
gate with uge = 15 V. When the junction temperature Tj has settled, the power dissipation
Pheating = uce ·ice is measured. Afterwards, the heating current is commutated to an auxiliary
branch SB , such that only the sensing current remains flowing through the DUT. After a
short delay of 100 µs, the commutation is completed and the forward voltage over the device
uce that results from the sensing current is measured during the temperature decay. Based
246
A.4 Derivation of a Base Transformation for the Balanced Realization
on the previously recorded calibration data, this forward voltage uce can be directly related
to the device junction temperature Tj .
With this procedure, the negative thermal step response is obtained. After subtraction of
the maximal temperature measurement T̂j,max , normalization by the heating power Pheating
and inversion, following (A.20), the transient thermal impedance Zth (t) is obtained.
T̂j (t) − T̂j,max

Zth (t) = − (A.20)
Pheating
It is important to keep in mind that due to the delay of approximately 100 µs, introduced
by the commutation, the thermal impedance test bench slightly underestimates the thermal
impedance. More details on this characterization technique can be found in [147, 276, 289,
292].
A.4 Derivation of a Base Transformation for the Balanced

Realization
In chapter 3.3, it was not addressed how to find the transformation matrix M̃, which brings
the system G in its balanced realization G̃. Therefore, in the following, a conceptual way
to find M̃ is illustrated. However, in most linear algebra programs, for example MATLAB,
more efficient algorithms, for example the methods presented in [181] and [254], are em-
ployed. They do not explicitly determine the transformation matrix and instead directly
determine the reduced order balanced realization.
As a starting point, the system Gramians P and Q must be determined by solving the
Lyapunov equations (3.87) and (3.88). Then the eigenvalues of P · Q are determined, which
are the squared HSV of the system G. They form the diagonal matrix Σ2 . To determine
the transformation matrix M, (3.90) can be used as a starting point.
Σ2 = P̃ · Q̃ = MPQM−1 (A.21)
By definition, the observability Gramian Q is symmetrical and positive definite if the sys-
tem is observable. Thus, it can be expressed according to (A.22) by the matrix product
of an invertible matrix M and its transpose MT that can be obtained with a Cholesky
decomposition.
Q̃ = RT R (A.22)
Σ2 = MPRT RM−1 (A.23)
This expression can be expanded to (A.25) using the following identity (A.24) for invertible
matrices M and R.
−1
RM−1 = MR−1 (A.24)
247
A Appendix
−1
Σ2 = RM−1 RPRT RM−1

(A.25)
As RPRT is symmetrical, positive definite and similar to Σ2 , the Cholesky decomposition

provides an orthogonal matrix N with NNT = I such that (A.26) holds.
RPRT = NΣ2 NT (A.26)
Now, it is possible to state a definition for M (A.27), whose correctness is demonstrated in

the following.
1
M = Σ 2 NT R
1
M−1 = R−1 NΣ 2 (A.27)
To proof the correctness of (A.27) the transformation M is inserted into (3.89) leading to
(A.28) and (A.29)
1 1

Q̃ = M−T QM−1 = Σ− 2 NT R−T Q R−1 NΣ− 2
1 1

= Σ− 2 NT R−T RT R R−1 NΣ− 2 = Σ (A.28)
1 1

P̃ = MPMT = Σ− 2 NT R P RT NΣ− 2
1 1
= Σ− 2 NT NΣ2 NT NΣ− 2 = Σ (A.29)
The result shows that the transformation γ according to (A.27) indeed results in the unique
transformation, which brings the system G to a balanced realization.
A.5 Synthetic Machine Model

In the following section, the synthetic machine model that is used in the system level sim-
ulation of the trolleybus is derived.
To develop a synthetic induction machine model which has the optimal ratings for driv-
ing the trolleybus Trollino 12 and is operated with the HP2 power module the following
boundary conditions must be known.
• Rated stator voltage Usr
• Rated torque Telr
• Rated speed v r
• Pole pair number p
The HP2 converter module is operated with a maximal dc-link voltage of udc = 400 V
[107]. This results in a rated stator voltage Usr , which is given by the maximal feasible
248
1.2
Power and torque in pu

0.8
0.6
0.4
0.2 Torque
Power
0
0 500 1000 1500 2000 2500
Machine speed n in 1/min
0 17.5 35 52.5 70
Trolleybus speed v in km/h
Figure A.5: Desired characteristics of the synthesized induction machine
voltage using sine triangle modulation and a voltage margin of 10 %.

udc
Usr = · 0.9 (A.30)
2
The Trollino 12 trolleybus requires a rated torque of Telr = 1000 Nm according to Table 4.7.
This directly determines the rated torque for the induction motor Telr .
The pole pair number is selected based on a compromise between joke thickness and iron
losses according to [151, 286]. A higher number of pole pairs allows the reduction of the
stator and rotor yoke thicknesses and thereby increases the torque density of the motor.
However, this also results in higher iron losses in the stator at high excitation frequencies.
For this work the pole pair number was chosen to p = 3 as the excitation frequency in the
given application is not very high and this is a common pole pair number in machines for
these applications.
In a final step, the rated speed v r of the trolleybus at which the machine still is capable
of providing the rated torque must be determined. At higher speed the feasible torque is
reduced due to field weakening. The rated speed is set to v r = 35 km. Given a peak speed
of v max = 70 km this allows operating at the peak torque over half the speed range.
As a result, the synthesized machine model exhibits a rated power of approximately
165 kW, given an efficiency of 94 %, and a rated excitation frequency of 60 Hz. The basic
characteristics of the power train are illustrated in Figure A.5. Based on the discussed
boundary conditions the electrical circuit properties of the induction machine can be derived
based on [224, 225]. These references show how the circuit parameters of induction machines
scale over a wide power range. The most fundamental property, which scales with the power
of a machine, is the pole pitch, the arc length between two adjacent poles. It scales with
the rated power of a machine according to (A.31) and can be used to determine the circuit
249
A Appendix
Table A.4: Induction machine parameters

Stator leakage inductance Lσs 0.1 mH
Rotor leakage inductance Lσr 0.1 mH
Mutual inductance Lm 1.9 mH
Stator resistance Rs 5 mΩ
Rotor resistance Rr 6.1 mΩ
Coupling factor 0.07
Pole pair number p 3
Machine inertia J 0.056 kgm2
parameters of the motor.

236
Pr

τp = 0.09 m (A.31)
kW · p2
Based on the pole pitch, estimates for the stator and rotor resistance can be derived accord-
ing to (A.32) and (A.32).
Rs 0.0033 m
r
= (A.32)
Z τp
Rr 0.004 m
r
= (A.33)
Z τp
Note that the derivations are for normalized values. It requires the rated impedance Z r
of the machine to determine the resistance values. The r
machine impedance is defined by
the ratio of rated voltage and rated current Z r = UI rs . The rated voltage Usr was one of
s
the initially determined boundaries, whereas the rated current can be approximated to
Isr ≈ 620 A assuming a power factor of cos(φ) ≈ 0.9.
Similar to the machine resistances, the magnetizing and leakage inductances can be de-
rived based on (A.35).
Lσs + Lσr
Zr
= 0.2 (A.34)
ω
r
Lm τp
Zr
= 10 · (A.35)
ω
p
They require in addition to the rated impedance Z r the rated angular velocity of the machine
ωr ≈ 200 rad s−1 which can be determined based on the rated speed of the trolleybus v r . It is
assumed that the stator leakage inductance and the rotor leakage inductance are equal Lσs =
Lσr . The leakage inductances and the magnetizing inductance can be used to determine
the stator inductance Ls = Lσs + Lm and the rotor inductance Lr = Lσr + Lm as well as the
coupling factor σ = 1 − L2m /(Ls Lr ).
Finally, the inertia of the machine can be approximated via the mechanical time constant
250
τm that scales via (A.36) according to [225].

p−1
τm = 15 · (A.36)
p
Based on the mechanical time constant, which is defined according to (A.37) and the Kloss
equation (A.38) the inertia of the motor can be approximated to J = 0.018 kgm2 .
J · ωslip
τm = (A.37)
pTelr
ωslip 3
= · pIsr 2 · Lm · τ (A.38)
Telr 2
With these properties all information of a fundamental induction machine model can be
calculated. They are summarized in Table A.4.
251
252
Acronyms
1-D 1-dimensional
2-D 2-dimensional
3-D 3-dimensional
Al aluminum
ANN artificial neural network
ATC active thermal control
BTM balanced truncation method
CPLD complex programmable logic device

CST Control System Toolbox
CTE coefficient of thermal expansion
DCB direct copper bond

DEG degradation estimation accuracy
DS dynamic stiffness
DSP digital signal processor
DUT device under test
EA estimation accuracy
EMI electro-magnetic interference
EV eigenvalues
FDM finite difference method

FEM finite element method
FRF frequency response function
FVM finite volume method
HP2 Hybridpack2 power module

HSV Hankel singular values
IFO indirect rotor field orientation

IGBT insulated-gate bipolar transistor
IOT internet-of-things
IR infrared
ITIS in-situ thermal impedance spectroscopy
253
Acronyms
LMU loss manipulation unit

LUT lookup table
MIMO multiple-input multiple-output

MOR model order reduction
MPC model predictive control
MRAS model reference adaptive system
NTC negative temperature coefficient thermistor
PCB printed circuit board

PDE partial differential equation
PI proportional-integral
PWM pulse-width-modulated
RFC rain-flow counting
SAM scanning acoustic microscopy

Si silicon
SISO single-input single-output
SNR signal-to-noise ratio
SOD state-of-degradation
SPA singular perturbation approximation
TSEP temperature-sensitive electrical parameter
254
Symbols
Type
|X| absolute value
X̂ amplitude or estimate
X ∗ complex conjugate
X−1 inverse of a matrix
X matrix
X mean value
X avg mean value
X xy space vector in xy-frame
X T transpose of a vector or matrix
X~ vector field
X vector
Roman letters
A surface
C capacitance
D diameter
E energy
F force
G heat generation
H height
I current
J inertia
L inductance
L length
M modulation index
N number
N cycles
P r Prandtl number
P power
Q heat flux
R resistance
S staggered positioning
Ts sampling time
T temperature
T period
T torque
U voltage
V volume
255
Symbols
W width
Zth transient thermal impedance
Z impedance
Uheat thermal energy
Cth thermal capacitance
Rth thermal resistance
bth thermal conductance
cρ specific heat capacitance
kth thermal conductivity
cW drag-coefficient
d duty cycle
f bandwidth, e.g. of a control loop
f frequency
g heat generation density
g gravitational constant
h heat transfer coefficient
i current
m index in x-direction
m mass
n index in y-direction
p index in z-direction
p power
p pole pair number
q heat flux density
r radius
t time
u voltage
v speed
w work per volume
Greek letters
∆η degradation that a cycle contributes
α temperature coefficient e.g. of a resistance
α slope
γ coefficient of empirical degradation law
ω angular frequency
ρ density
σ stress
τp pole pitch (arc length between two adjacent poles)
SOD state of degradation (from 0 to 1) e.g. of a power module
θ pseudo temperature e.g. after base transformation
ε strain
Superscripts
X DiodeA Upper Diode within a half bridge
256
Symbols
X DiodeB Lower Diode within a half bridge

X Diode Diode
X D discrete variable
X IGBTA Upper Insulated Gate Bipolar Transistor within a half bridge
X IGBTB Lower Insulated Gate Bipolar Transistor within a half bridge
X IGBT Insulated Gate Bipolar Transistor
X avg average
X max maximum (e.g., maximum current)
X min minimum (e.g., minimum current)
X on on (e.g., turn-on angle)
X ref reference
X rise rise
X rst stator referred 3-phase system
X r rated (e.g., rated power)
X x xth phase component of 3-phase system
X rms root mean square value
Subscripts
X 0 fundamental (e.g. fundamental frequency)
X D diagonal
X L longitudinal
X NTC temperature at NTC (negative temperature coefficient thermistor)
X NTC NTC (negative temperature coefficient) temperature sensor
X T cathode-anode
X T transversal
X σ leakage e.g. leakage flux/inductance)
X a ambiente.g. ambient temperature of the power module
X b base plate e.g. of the power module
X b boundary, e.g. of a boundary condition of a differential equation
X case case e.g. case of the power module
X ce collector-emitter
X cond conduction e.g. conduction losses
X conv convection
X cycle cycle e.g. thermal cycle
X c collector
X drive drive train e.g inertia of the drive train
X d gate driver
X eff effective
X el electric (e.g., electrical frequency)
X error error, e.g. control error
X ex excitation e.g. of the power module
X f failure e.g. device failure
X f fluid e.g. coolant fluid
X ge gate-emitter
X g gate
257
Symbols
X heat heat e.g. describing heat flux

X init initial
X i internal, e.g. internal gate resistance
X j junction, e.g. of a power semiconductor
X loss Loss
X m magnetization e.g. magnetization flux/inductance
X m manipulated input variable
X m measurable
X m mechanical (e.g., mechanical position)
X out output (e.g., output power)
X pwm pulse width modulation e.g. PWM frequency, modulation
X p plateau e.g. gate voltage plateau
X rec recovery e.g. recovery losses
X r rotor quantity
X sd,down solder layer between based plate and DCB)
X sd,up solder layer between DCB and device
X sim simulation, e.g.
X slip slip e.g. of an induction machine
X spatial spatial, e.g. spatial temperature
X sw switching e.g. switching losses, switching energy
X s stator quantity
X s supply, e.g. power supply
X th,b thermal path in back direction (along z-axis)
X th,d thermal path in down direction (along y-axis)
X th,f thermal path in front direction (along negative z-axis)
X th,l thermal path in left direction (along negative x-axis)
X th,r thermal path in right direction (along x-axis)
X th,u thermal path in up direction (along negative y-axis)
X th threshold e.g. threshold voltage of a device
X th thermal path property
X t transient
X b break, e.g. breaking torque
X d drag e.g. drag force
X g gear e.g. gear constant
X i inclination e.g. inclination force
X slope slope e.g. of the road
X w wheel e.g. wheel radius
258
Symbols
259
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290
Curriculum Vitae
Christoph Henrik van der Broeck
Personal Information
Date of birth 23. März 1988
Place of birth Düren, Germany
Nationality German
Education
10/2007–11/2013 Studies in Electrical Engineering and Information Technology at RWTH
Aachen University; Bachelor and Master of Science degree
07/1998–06/2007 Franken-Gymnasium in Zülpich (high school)
Work Experience
01/2014–today Research Associate at the Institute for Power Electronics and Electrical
Drives (ISEA) of RWTH Aachen University under the supervision of
Prof. Rik W. De Doncker in the Research Group Power Electronics
08/2017–03/2018 DAAD Research Scholarship at the Wisconsin Electric Machine and
Power Electronic Consortium (WEMPEC), Madison, WI, USA
08/2016–07/2017 Lecturer at the University of Applied Sciences Aachen for the course
’Analog and Digital Control Technology’
07/2012–12/2013 Internship and Master Thesis at AixControl GmbH, Aachen
07/2011–06/2012 Fulbright Scholarship at the University of Wisconsin-Madison under
Supervision of Prof. Robert D. Lorenz, Madison, WI, USA
10/2010–06/2011 Student research assistant at the Power Electronics Group of the Insti-
tute for Power Electronics and Electrical Drives (ISEA), RWTH Aachen
University, Prof. Rik W. De Doncker
09/2009–02/2010 Teaching assistant at the Institute for Electrical Engineering (EECS),
RWTH Aachen University, Prof. Tobias Noll
09/2008–02/2010 Student research assistant with the Chair for Electrochemical Energy
Conversion and Storage Systems at the Institute for Power Electronics
and Electrical Drives (ISEA), RWTH Aachen University, Prof. Dirk
Uwe Sauer
Aachener Beiträge des ISEA
ABISEA Band 1 ABISEA Band 7 ABISEA Band 14

Eßer, A. Langheim, J. Backhaus, K.
Berührungslose, kombinierte Einzelradantrieb für Spannungseinprägendes
Energie- und Informations- Elektrostraßenfahrzeuge Direktantriebssystem mit
übertragung für bewegliche 1. Auflage 1993, 215 Seiten schnelllaufender
Systeme ISBN 3-86073-123-8 geschalteter
1. Auflage 1992, 130 Seiten (vergriffen) Reluktanzmaschine
ISBN 3-86073-046-0 1. Auflage 1995, 156 Seiten
ABISEA Band 8 ISBN 3-86073-234-X
ABISEA Band 2 Fetz, J. (vergriffen)
Vogel, U. Fehlertolerante Regelung
Entwurf und Beurteilung von eines Asynchron- ABISEA Band 15
Verfahren zur Doppelantriebes für ein Reinold, H.
Hochausnutzung des Rad- Elektrospeicherfahrzeug Optimierung dreiphasiger
Schiene-Kraftschlusses 1. Auflage 1993, 136 Seiten Pulsdauermodulations-
durch Triebfahrzeuge ISBN 3-86073-124-6 verfahren
1. Auflage 1992, 130 Seiten (vergriffen) 1. Auflage 1996, 116 Seiten
ISBN 3-86073-060-6 ISBN 3-86073-235-8
ABISEA Band 9
ABISEA Band 3 Schülting, L. ABISEA Band 16
Redehorn, Th. Optimierte Auslegung Köpken, H.-G.
Stromeinprägendes induktiver Bauelemente für Regelverfahren für
Antriebssystem mit den Mittelfrequenzbereich Parallelschwingkreis-
fremderregter Synchron- 1. Auflage 1993, 136 Seiten umrichter
maschine ISBN 3-86073-174-2 1. Auflage 1996, 125 Seiten
1. Auflage 1992, 130 Seiten (vergriffen) ISBN 3-86073-236-6
ISBN 3-86073-061-4
ABISEA Band 10 ABISEA Band 17
ABISEA Band 4 Skudelny, H.-Ch. Mauracher, P.
Ackva, A. Stromrichtertechnik Modellbildung und
Spannungseinprägendes 4. Auflage 1997, 259 Seiten Verbundoptimierung bei
Antriebssystem mit ISBN 3-86073-189-0 Elektrostraßenfahrzeugen
Synchron-maschine und 1. Auflage 1996, 192 Seiten
direkter Stromregelung ABISEA Band 11 ISBN 3-86073-237-4
1. Auflage 1992, 135 Seiten Skudelny, Ch.
ISBN 3-86073-062-2 Elektrische Antriebe ABISEA Band 18
3. Auflage 1997, 124 Seiten Protiwa, F.-F.
ABISEA Band 5 ISBN 3-86073-231-5 Vergleich dreiphasiger
Mertens, A. Resonanz-Wechselrichter in
Analyse des ABISEA Band 12 Simulation und Messung
Oberschwingungsverhaltens Schöpe, F. 1. Auflage 1997, 178 Seiten
von taktsynchronen Delta - Batterie-Management für ISBN 3-86073-238-2
Modulationsverfahren zur Nickel-Cadmium
Steuerung von Akkumulatoren ABISEA Band 19
Pulsstromrichtern bei hoher 1. Auflage 1994, 156 Seiten Brockmeyer, A.
Taktzahl ISBN 3-86073-232-3 Dimensionierungswerkzeug
1. Auflage 1992, 170 Seiten (vergriffen) für magnetische Bau-
ISBN 3-86073-069-X elemente in Stromrichter-
ABISEA Band 13 anwendungen
ABISEA Band 6 v. d. Weem, J. 1. Auflage 1997, 182 Seiten
Geuer, W. Schmalbandige aktive Filter ISBN 3-86073-239-0
Untersuchungen über das für Schienentriebfahrzeuge
Alterungsverhalten von am Gleichspannungs-
Bleiakkumulatoren fahrdraht
1. Auflage 1993, 100 Seiten 1. Auflage 1995, 125 Seiten
ISBN 3-86073-097-5 ISBN 3-86073-233-1

Apeldoorn, 0. Karden, E. Schönknecht, A.
Simulationsgestützte Bewer- Using low-frequency Topologien und Regelungs-
tung von Steuerverfahren für impedance spectroscopy for strategien für das induktive
netzgeführte Stromrichter characterization, monitoring, Erwärmen mit hohen
mit verringerter Netzrück- and modeling of industrial Frequenz-Leistungs-
wirkung batteries produkten
1. Auflage 1997, 132 Seiten 1. Auflage 2002, 154 Seiten 1. Auflage 2004, 170 Seiten
ISBN 3-86073-680-9 ISBN 3-8265-9766-4 ISBN 3-8322-2408-4

Lohner, A. Karipidis, C.-U. Tolle, T.
Batteriemanagement für A Versatile DSP/ FPGA Konvertertopologien für ein
verschlossene Blei-Batterien Structure optimized for aufwandsarmes, zwei-
am Beispiel von Unter- Rapid Prototyping and stufiges Schaltnetzteil zum
brechungsfreien Digital Real-Time Simulation Laden von Batterien aus
Stromversorgungen of Power Electronic and dem Netz
1. Auflage 1998, 144 Seiten Electrical Drive Systems 1. Auflage 2004, 150 Seiten
ISBN 3-86073-681-7 1. Auflage 2001, 164 Seiten ISBN 3-8322-2676-1
ISBN 3-8265-9738-9
Reinert, J. ABISEA Band 28 Götting, G.
Optimierung der Betriebs- Kahlen, K. Dynamische Antriebs-
eigenschaften von Antrieben Regelungsstrategien für per- regelung von Elektro-
mit geschalteter Reluktanz- manentmagnetische Direkt- straßenfahrzeugen unter
maschine antriebe mit mehreren Berücksichtigung eines
1. Auflage 1998, 168 Seiten Freiheitsgraden schwingungsfähigen
ISBN 3-86073-682-5 1. Auflage 2003, 158 Seiten Antriebsstrangs
ISBN 3-8322-1222-1 1. Auflage 2004, 166 Seiten
ABISEA Band 23 ISBN 3-8322-2804-7
Nagel, A. ABISEA Band 29
Leitungsgebundene Inderka, R. ABISEA Band 35
Störungen in der Direkte Drehmoment- Dieckerhoff, S.
Leistungselektronik: regelung Geschalteter Transformatorlose Strom-
Entstehung, Ausbreitung Reluktanzantriebe richterschaltungen für Bahn-
und Filterung 1. Auflage 2003, 190 Seiten fahrzeuge am 16 2/3Hz Netz
1. Auflage 1999, 160 Seiten ISBN 3-8322-1175-6 1. Auflage 2004, 158 Seiten
ISBN 3-86073-683-3 ISBN 3-8322-3094-7
ABISEA Band 30
ABISEA Band 24 Schröder, S. ABISEA Band 36
Menne, M. Circuit-Simulation Models of Hu, J.
Drehschwingungen im An- High-Power Devices Based Bewertung von DC-DC-
triebsstrang von Elektro- on Semiconductor Physics Topologien und Optimierung
straßenfahrzeugen - 1. Auflage 2003, 124 Seiten eines DC-DC-Leistungs-
Analyse und aktive ISBN 3-8322-1250-7 moduls für das 42-V-Kfz-
Dämpfung Bordnetz
1. Auflage 2001, 192 Seiten ABISEA Band 31 1. Auflage 2004, 156 Seiten
ISBN 3-86073-684-1 Buller, S. ISBN 3-8322-3201-X
Impedance-Based Simu-
ABISEA Band 25 lation Models for Energy
von Bloh, J. Storage Devices in
Multilevel-Umrichter zum Advanced Automotive
Einsatz in Mittelspannungs- Power Systems
Gleichspannungs- 1. Auflage 2003, 136 Seiten
Übertragungen ISBN 3-8322-1225-6
1. Auflage 2001, 152 Seiten
ISBN 3-86073-685-X

Detjen, D.-0. Linzen, D. Thele, M.
Characterization and Impedance-Based Loss A contribution to the
Modeling of Si-Si Bonded Calculation and Thermal modelling of the charge
Hydrophobie Interfaces for Modeling of Electrochemical acceptance of lead-acid
Novel High-Power BIMOS Energy Storage Devices for batteries - using frequency
Devices Design Considerations of and time domain based
1. Auflage 2004, 146 Seiten Automotive Power Systems concepts
ISBN 3-8322-2963-9 1. Auflage 2006, 150 Seiten 1. Auflage 2008, 168 Seiten
ISBN 3-8322-5706-3 ISBN 978-3-8322-7659-1
ABISEA Band 38
Walter, J. ABISEA Band 44 ABISEA Band 51
Simulationsbasierte Zuver- Fiedler, J. König, A.
lässigkeitsanalyse in der Design of Low-Noise High Temperature DC-to-DC
modernen Leistungs- Switched Reluctance Drives Converters for Downhole
elektronik 1. Auflage 2007, 183 Seiten Applications
1. Auflage 2004, 134 Seiten ISBN 978-3-8322-5864-l 1. Auflage 2009, 160 Seiten
ISBN 3-8322-3481-0 ISBN 978-3-8322-8489-3
ABISEA Band 45
ABISEA Band 39 FuengwarodsakuI, N. ABISEA Band 52
Schwarzer, U. Predictive PWM-based Dick, C. P.
IGBT versus GCT in der Direct Instantaneous Torque Multi-Resonant Converters
Mittelspannungsanwendung Control for Switched as Photovoltaic Module-
- ein experimenteller und Reluctance Machines Integrated Maximum Power
simulativer Vergleich 1. Auflage 2007, 150 Seiten Point Tracker
1. Auflage 2005, 184 Seiten ISBN 978-3-8322-6210-5 1. Auflage 2010, 192 Seiten
ISBN 3-8322-4489-1 ISBN 978-3-8322-9199-0
ABISEA Band 46
ABISEA Band 40 Meyer, C. ABISEA Band 53
Bartram, M. Key Components for Future Kowal, J.
IGBT-Umrichtersysteme für Offshore DC Grids Spatially-resolved
Windkraftanlagen: Analyse 1. Auflage 2007, 196 Seiten impedance of nonlinear
der Zyklenbelastung, Mo- ISBN 978-3-8322-6571-7 inhomogeneous devices -
dellbildung, Optimierung und using the example of lead-
Lebensdauervorhersage ABISEA Band 47 acid batteries -
1. Auflage 2006, 195 Seiten Fujii, K. 1. Auflage 2010, 214 Seiten
ISBN 3-8322-5039-5 Characterization and ISBN 978-3-8322-9483-0
Optimization of Soft-
ABISEA Band 41 Switched Multi-Level ABISEA Band 54
Ponnaluri, S. Converters for STATCOMs Roscher, M.
Generalized Design, 1. Auflage 2008, 206 Seiten Zustandserkennung von
Analysis and Control of ISBN 978-3-8322-6981-4 LiFeP04-Batterien für
Grid side converters with Hybrid- und
integrated UPS or Islanding ABISEA Band 48 Elektrofahrzeuge
functionality Carstensen, C. 1. Auflage 2011, 194 Seiten
1. Auflage 2006, 163 Seiten Eddy Currents in Windings ISBN 978-3-8322-9738-l
ISBN 3-8322-5281-9 of Switched Reluctance
Machines ABISEA Band 55
ABISEA Band 42 1. Auflage 2008, 190 Seiten Hirschmann, D.
Jacobs, J. ISBN 978-3-8322-7118-3 Highly Dynamic
Multi-Phase Series Piezoelectric Positioning
Resonant DC-to-DC ABISEA Band 49 1. Auflage 2011, 156 Seiten
Converters Bohlen, 0. ISBN 978-3-8322-9746-6
1. Auflage 2006, 185 Seiten Impedance-based battery
ISBN 3-8322-5532-X monitoring
ISBN 978-3-8322-7606-5

Rigbers, K. Bragard, M. Brauer, H.
Highly Efficient Inverter Tue Integrated Emitter Turn- Schnelldrehender
Architectures for Three- Off Thyristor. An Innovative Geschalteter Reluktanz-
Phase Grid Connection MOS-Gated High-Power antrieb mit extremem
of Photovoltaic Generators Device Längendurchmesser-
1. Auflage 2011, 254 Seiten 1. Auflage 2012, 172 Seiten verhältnis
ISBN 978-3-8322-9816-9 ISBN 978-3-8440-1152-4 1. Auflage 2013, 202 Seiten
ISBN 978-3-8440-2345-9
Kasper, K. Gerschler, J. B. ABISEA Band 69
Analysis and Control of the Ortsaufgelöste Modellbil- Thomas, S.
Acoustic Behavior of dung von Lithium-Ionen- A Medium-Voltage Multi-
Switched Reluctance Drives Systemen unter spezieller Level DC/DC Converter with
1. Auflage 2011, 214 Seiten Berücksichtigung der High Voltage Transformation
ISBN 978-3-8322-9869-2 Batteriealterung Ratio
1. Auflage 2012, 350 Seiten 1. Auflage 2014, 236 Seiten
ABISEA Band 58 ISBN 978-3-8440-1307-8 ISBN 978-3-8440-2605-4
Köllensperger, P.
The Internally Commutated ABISEA Band 64 ABISEA Band 70
Thyristor - Concept, Design Neuhaus, C. Richter, S.
and Application Schaltstrategien für Digitale Regelung von PWM
1. Auflage 201 J, 212 Seiten Geschaltete Reluktanz- Wechselrichtern mit
ISBN 978-3-8322-9909-5 antriebe mit kleinem niedrigen Trägerfrequenzen
Zwischenkreis 1. Auflage 2014, 134 Seiten
ABISEA Band 59 1. Auflage 2012, 144 Seiten ISBN 978-3-8440-2641-2
Schoenen, T. ISBN 978-3-8440-1487-7
Einsatz eines DC/DC-Wand- ABISEA Band 71
lers zur Spannungs- ABISEA Band 65 Bösing, M.
anpassung zwischen Antrieb Butschen, T. Acoustic Modeling of
und Energiespeicher in Dual-ICT- A Clever Way to Electrical Drives - Noise and
Elektro-und Hybrid- Unite Conduction and Vibration Synthesis based
fahrzeugen Switching Optimized on Force Response
1. Auflage 2011, 138 Seiten Properties in a Single Wafer Superposition
ISBN 978-3-8440-0622-3 1. Auflage 2012, 178 Seiten 1. Auflage 2014, 208 Seiten
ISBN 978-3-8440-1771-7 ISBN 978-3-8440-2752-5
ABISEA Band 60
Hennen, M. ABISEA Band 66 ABISEA Band 72
Switched Reluctance Direct Plum, T. Waag, W.
Drive with Integrated Design and Realization of Adaptive algorithms for
Distributed Inverter High-Power MOS Turn-Off monitoring of lithium-ion
1. Auflage 2012, 150 Seiten Thyristors batteries in electric vehicles
ISBN 978-3-8440-0731-2 1. Auflage 2013, 130 Seiten 1. Auflage 2014, 242 Seiten
ISBN 978-3-8440-1884-4 ISBN 978-3-8440-2976-5
ABISEA Band 61
van Treek, D. ABISEA Band 67 ABISEA Band 73
Position Sensorless Torque Kiel, M. Sanders, T.
Control of Switched Impedanzspektroskopie an Spatially Resolved Electrical
Reluctance Machines Batterien unter besonderer In-Situ Measurement
1. Auflage 2012, 144 Seiten Berücksichtigung von Techniques for Fuel Cells
ISBN 978-3-8440-IO 14-5 Batteriesensoren für den 1. Auflage 2014, 138 Seiten
Feldeinsatz ISBN 978-3-8440-3121-8
ISBN 978-3-8440-1973-5

Baumhöfer, T. Wang, Y. Budde-Meiwes, H.
Statistische Betrachtung Development of Dynamic Dynamic Charge
experimenteller Alterungs- Models with Spatial Acceptance of Lead-Acid
untersuchungen an Lithium- Resolution for Electro- Batteries for Micro-Hybrid
Ionen Batterien chemical Energy Converters Automotive Applications
1. Auflage 2015, 174 Seiten as Basis for Control and 1. Auflage 2016, 168 Seiten
ISBN 978-3-8440-3423-3 Management Strategies ISBN 978-3-8440-4733-2
ABISEA Band 75 ISBN 978-3-8440-4303-7 ABISEA Band 85
Andre, D. EngeI, S. P.
Systematic Characterization ABISEA Band 80 Thyristor-Based High-Power
of Ageing Factors for High- Ecker, M. On-Load Tap Changers
Energy Lithium-Ion Cells Lithium Plating in Lithium- Control under Harsh Load
and Approaches for Lifetime Ion Batteries: An Conditions
Modelling Regarding an Experimental and Simulation 1. Auflage 2016, 170 Seiten
Optimized Operating Approach ISBN 978-3-8440-4986-2
Strategy in Automotive 1. Auflage 2016, 170 Seiten
Applications ISBN 978-3-8440-4525-3 ABISEA Band 86
1. Auflage 2015, 210 Seiten VanHoek, H.
ISBN 978-3-8440-3587-2 ABISEA Band 81 Design and Operation
Zhou, W. Considerations of Three-
ABISEA Band 76 Modellbasierte Auslegungs- Phase Dual Active Bridge
Merei, G. methode von Tempe- Converters for Low-Power
Optimization of off-grid rierungssystemen für Applications with Wide
hybrid PV-wind-diesel power Hochvolt-Batterien in Voltage Ranges
supplies with multi- Personenkraftfahrzeugen 1. Auflage 2017, 242 Seiten
technology battery systems 1. Auflage 2016, 192 Seiten ISBN 978-3-8440-5011-0
taking into account battery ISBN 978-3-8440-4589-5
aging ABISEA Band 87
1. Auflage 2015, 194 Seiten ABISEA Band 82 Diekhans, T.
ISBN 978-3-8440-4148-4 Lunz, B. Wireless Charging of
Deutschlands Stromversor- Electric Vehicles - a Pareto-
ABISEA Band 77 gung im Jahr 2050 Based Comparison of Power
Schulte, D. Ein szenariobasiertes Electronic Topologies
Modellierung und experi- Verfahren zur vergleich- 1. Auflage 2017, 156 Seiten
mentelle Validierung der enden Bewertung von ISBN 978-3-8440-5048-6
Alterung von Blei-Säure Systemvarianten und
Batterien durch inhomogene Flexibilitätsoptionen ABISEA Band 88
Stromverteilung und 1. Auflage 2016, 196 Seiten Lehner, S.
Säureschichtung ISBN 978-3-8440-4627-4 Reliability Assessment of
1. Auflage 2016, 168 Seiten Lithium-Ion Battery Systems
ISBN 978-3-8440-4216-0 ABISEA Band 83 with Special Emphasis on
Hofmann, A. Cell Performance
ABISEA Band 78 Direct Instantaneous Force Distribution
Schenk, M. Control Key to Low-Noise 1. Auflage 2017, 202 Seiten
Simulative Untersuchung Switched Reluctance ISBN 978-3-8440-5090-5
der Wicklungsverluste in Traction Drives
Geschalteten Reluktanz- 1. Auflage 2016, 244 Seiten
maschinen ISBN 978-3-8440-4715-8
ISBN 978-3-8440-4282-5

Käbitz, S. Magnor, D. Masomtob, M.
Untersuchung der Alterung Globale Optimierung netz- A New Conceptual Design
von Lithium-Ionen-Batterien gekoppelter PV-Batterie- of Battery Cell with an
mittels Elektroanalytik und systeme unter besonderer Internal Cooling Channel
elektrochemischer Berücksichtigung der 1. Aufl. 2017, 167 Seiten
Impedanzspektroskopie Batteriealterung DOI: 10.18154/RWTH-2018-
1. Auflage 2016, 258 Seiten 1. Auflage 2017, 210 Seiten 223281
DOI: 10.18154/RWTH-2016- DOI: 10.18154/RWTH-2017-
12094 06592 ABISEA Band 100
Marongiu, A.
ABISEA Band 90 ABISEA Band 95 Performance and Aging
Witzenhausen, H. Iliksu, M. Diagnostic on Lithium Iron
Elektrische Elucidation and Comparison Phosphate Batteries for
Batteriespeichermodelle: of the Effects of Lithium Electric Vehicles and
Modellbildung, Salts on Discharge Vehicle-to-Grid Strategies
Parameteridentifikation und Chemistry of Nonaqueous 1. Aufl. 2017, 222 Seiten
Modellreduktion Li-O2 Batteries DOI: 10.18154/RWTH-2017-
1. Auflage 2017, 286 Seiten 1. Aufl. 2018, 160 Seiten 09944
DOI: 10.18154/RWTH-2017- DOI: 10.18154/RWTH-2018-
03437 223782 ABISEA Band 101
Gitis, A.
ABISEA Band 91 ABISEA Band 96 Flaw detection in the coating
Münnix, J. Schmalstieg, J. process of lithium-ion
Einfluss von Stromstärke Physikalisch- battery electrodes with
und Zyklentiefe auf elektrochemische acoustic guided waves
graphitische Anoden Simulation von Lithium- 1. Aufl. 2017, 132 Seiten
1. Auflage 2017, 178 Seiten Ionen-Batterien: DOI: 10.18154/RWTH-2017-
DOI: 10.18154/RWTH-2017- Implementierung, 099519
01915 Parametrierung und
Anwendung ABISEA Band 102
ABISEA Band 92 1. Aufl. 2017, 176 Seiten Neeb, C.
Pilatowicz, G. DOI: 10.18154/RWTH-2017- Packaging Technologies for
Failure Detection and 04693 Power Electronics in
Battery Management Automotive Applications
Systems of Lead-Acid ABISEA Band 97 1. Aufl. 2017, 132 Seiten
Batteries for Micro- Soltau, N. DOI: 10.18154/RWTH-2018-
Hybrid Vehicles High-Power Medium- 224569
1. Auflage 2017, 212 Seiten Voltage DC-DC Converters:
DOI: 10.18154/RWTH-2017- Design, Control and ABISEA Band 103
09156 Demonstration Adler, F. S.
1. Aufl. 2017, 176 Seiten A Digital Hardware Platform
ABISEA Band 93 DOI: 10.18154/RWTH-2017- for Distributed Real-Time
Drillkens, J. 04084 Simulation of Power
Aging in Electrochemical Electronic Systems
Double Layer Capacitors: ABISEA Band 98 1. Aufl. 2017, 156 Seiten
An Experimental and Stieneker, M. DOI: 10.18154/RWTH-2017-
Modeling Approach Analysis of Medium-Voltage 10761
1. Aufl. 2017, 179 Seiten Direct-Current Collector
DOI: 10.18154/RWTH-2018- Grids in Offshore Wind
223434 Parks
1. Aufl. 2017, 144 Seiten
DOI: 10.18154/RWTH-2017-
04667

Becker, J. Lewerenz, M. Burkhart, Bernhard
Flexible Dimensionierung Dissection and Quantitative Switched Reluctance
und Optimierung hybrider Description of Aging of Generator for Range Extender
Lithium- Lithium-Ion Batteries Using Applications - Design, Control
Ionenbatteriespeichersyste Non-Destructive Methods and Evaluation
me mit verschiedenen Validated by Post-Mortem- 1. Aufl. 2018
Auslegungszielen Analyses
1. Aufl., 2017, 157 Seiten 1. Aufl. 2018 ABISEA Band 117
DOI: 10.18154/RWTH-2017- Biskoping, Matthias
09278 ABISEA Band 111 Discrete Modeling and Control
Büngeler, J. of a versatile Power Electronic
ABISEA Band 105 Optimierung der Verfüg- Test Bench with Special
Warnecke, A. barkeit und der Lebens- Focus on Central Photovoltaic
Degradation Mechanisms in dauer von Traktionsbatterien Inverter Testing
NMC Based Lithium-Ion für den Einsatz in Flurförder- 1. Aufl. 2018
Batteries fahrzeugen
1. Aufl. 2017, 158 Seiten 1. Aufl. 2018 ABISEA Band 118
DOI: 10.18154/RWTH-2017- Schubert, Michael
09646 ABISEA Band 112 High-Precision Torque Control
Wegmann, R. of Inverter-Fed Induction
ABISEA Band 106 Betriebsstrategien und Machines with Instantaneous
Taraborrelli, S. Potentialbewertung hybrider Phase Voltage Sensing
Bidirectional Dual Active Batteriespeichersysteme in 1. Aufl. 2018
Bridge Converter using a Elektrofahrzeugen
Tap Changer for Extended 1. Auflage 2018
Voltage Ranges
1. Aufl. 2017 ABISEA Band 113
Nordmann, H.
ABISEA Band 107 Batteriemanagementsysteme
Sarriegi, G. unter besonderer Berück-
SiC and GaN sichtigung von Fehlererken-
Semiconductors – The nung und Peripherieanalyse
Future Enablers of Compact 1. Aufl. 2018
and Efficient Converters for
Electromobility ABISEA Band 114
1. Aufl. 2017 Engelmann, G.
Reducing Device Stress and
ABISEA Band 108 Switching Losses Using
Senol, M. Active Gate Drivers and
Drivetrain Integrated Dc-Dc Improved Switching Cell
Converters utilizing Zero Design
Sequence Currents 1. Aufl. 2018
1. Aufl. 2017
ABISEA Band 115
ABISEA Band 109 Klein-Heßling, A.
Koijma, T. Active DC-Power Filters for
Efficiency Optimized Control Switched Reluctance Drives
of Switched Reluctance during Single-Pulse Operation
Machines 1. Aufl. 2018
1. Aufl. 2017
The reliable and safe operation of power electronics is of great
importance in most applications. A conservative approach is
the strategic oversizing of converters. In contrast, this work
proposes a model-based methodology for thermal monitoring
and control of power modules as a cost-saving alternative that
avoids oversizing with a variety of new technologies.
By combination of finite volume modeling and model reduction

techniques, ultra-compact real-time models were developed for
accurate observer-based monitoring of 3-D distributed temper-
atures at critical material interfaces. In-situ thermal impedance
spectroscopy is introduced to characterize the thermal interface
of power modules. This enables the identification and diagnosis
of degradation mechanisms based on artificial neural networks.
Active thermal state-feedback control actively reduces thermal
cycles by manipulating adaptive gate resistances and the switch-
ing frequency to extend the lifetime of power modules.
The proposed methodology aims to ensure safe and reliable op-

eration of compact converters over a longer lifetime.
ISSN 1437-675X

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Christoph H.

van der Broeck

Power Loss Manipulation

Aachener Beiträge des ISEA Band 119

Methodology for Thermal Modeling,

Von der Fakultät für Elektrotechnik und Informationstechnik

Christoph Henrik van der Broeck, M. Sc.

Tag der mündlichen Prüfung: 26. November 2018

Diese Dissertation ist auf den Internetseiten

AACHENER BEITRÄGE DES ISEA

Copyright ISEA and Christoph H. van der Broeck, 2019

Institute for Power Electronics and Electrical Drives (ISEA)

Aachen, im Dezember 2018 Christoph van der Broeck

3 Methods for Electrothermal and Degradation Modeling 23

3.4.2 Experimental Assessment of Degradation . . . . . . . . . . . . . . . . 50

4 Electrothermal Simulation and Lifetime Estimation over Mission Cycles 57

5 Thermal Monitoring 101

5.2.5 Adaptive Observer for Switching Loss Model Calibration . . . . . . . 138

6 Real-Time Degradation Monitoring and Diagnosis 147

7 Active Thermal Cycle Reduction 167

8 Experimental Evaluation 213

8.1.2 Device under Test (DUT) . . . . . . . . . . . . . . . . . . . . . . . . 215

1.1 Motivation and Background

1.2 Research Objective

1.3 Outline of this Thesis

Chapter 2 - State-of-the-Art Review The second chapter reviews the state-of-the-art

Chapter 4 - Electrothermal Simulation and Lifetime Estimation over Mission Cycles

Chapter 6 - Real-Time Degradation Monitoring and Diagnosis In the sixth chapter

Chapter 8 - Experimental Evaluation The eighth chapter discusses experimental results

2.1 Reliability-Oriented Electrothermal Modeling and

2.1.1 Loss Modeling

2.1.2 Thermal Modeling

Analytical models A well-known alternative are analytical modeling approaches. For

2.1.3 Model Order Reduction Techniques

• Rational Krylov Method

• Balanced truncation method (BTM)

• Approximate balanced truncation

• Singular perturbation approximation (SPA)

• Hankel norm approximation

2.2 Thermal Monitoring

2.2.1 Real-time Junction Temperature Sensing of IGBTs

Figure 2.1: Hybridpack2 power module and IR image during operation

2.2.2 Thermal Monitoring

implemented observers for junction temperature estimation of power electronics. In [141,

Averaged and instantaneous temperature and loss estimation Thermal monitoring of

Loss prediction and degradation detection In addition to the temperatures estimation,

2.3 Condition Monitoring and State of Health Estimation

2.3.1 Failure Indicators

2.3.2 State-of-Health Diagnosis

2.3.3 Lifetime Prognosis

2.4 Active Thermal Control Techniques

2.4.1 Reference Generation

2.4.2 Active Thermal Control of AC Applications

2.4.3 Device Loss Modulation Techniques

2.5 Summary of Identified Research Opportunities

Identification and sensitivity analysis of IGBT temperature-sensitive electrical param-

Monitoring of switching- and excitation-period averaged 3-D temperature distributions

Identification and quantification of localized degradation mechanism via in-situ mon-

Application of feasible and stress relieving thermal trajectories to power modules by

These research opportunities were individually addressed in the following publications

3.1 Loss Modeling

3.1.1 Conduction Loss Modeling

IGBT at 25°C Datasheet Diode at 25°C Datasheet

3.1.1.1 Instantaneous Loss Modeling